From 3e747ba6cc6c938d19f55a22e88b4c25c7cd4445 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Fri, 25 May 2012 14:31:34 +0900 Subject: [PATCH] 3.4-stable patches added patches: drm-i915-don-t-clobber-the-pipe-param-in-sanitize_modesetting.patch drm-i915-use-hw-scheduler-for-fixed-function-shaders.patch --- ...e-pipe-param-in-sanitize_modesetting.patch | 49 ++++++++++ ...scheduler-for-fixed-function-shaders.patch | 95 +++++++++++++++++++ queue-3.4/series | 2 + 3 files changed, 146 insertions(+) create mode 100644 queue-3.4/drm-i915-don-t-clobber-the-pipe-param-in-sanitize_modesetting.patch create mode 100644 queue-3.4/drm-i915-use-hw-scheduler-for-fixed-function-shaders.patch diff --git a/queue-3.4/drm-i915-don-t-clobber-the-pipe-param-in-sanitize_modesetting.patch b/queue-3.4/drm-i915-don-t-clobber-the-pipe-param-in-sanitize_modesetting.patch new file mode 100644 index 00000000000..2cc9210f9d9 --- /dev/null +++ b/queue-3.4/drm-i915-don-t-clobber-the-pipe-param-in-sanitize_modesetting.patch @@ -0,0 +1,49 @@ +From a9dcf84b14ef4e9a609910367576995e6f32f3dc Mon Sep 17 00:00:00 2001 +From: Daniel Vetter +Date: Sun, 13 May 2012 22:29:25 +0200 +Subject: drm/i915: don't clobber the pipe param in sanitize_modesetting + +From: Daniel Vetter + +commit a9dcf84b14ef4e9a609910367576995e6f32f3dc upstream. + +... we need it later on in the function to clean up pipe <-> plane +associations. This regression has been introduced in + +commit f47166d2b0001fcb752b40c5a2d4db986dfbea68 +Author: Chris Wilson +Date: Thu Mar 22 15:00:50 2012 +0000 + + drm/i915: Sanitize BIOS debugging bits from PIPECONF + +Spotted by staring at debug output of an (as it turns out) totally +unrelated bug. + +v2: I've totally failed to do the s/pipe/i/ correctly, spotted by +Chris Wilson. + +Reviewed-by: Chris Wilson +Reviewed-by: Eugeni Dodonov +Signed-Off-by: Daniel Vetter +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_display.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -7617,10 +7617,11 @@ static void intel_sanitize_modesetting(s + { + struct drm_i915_private *dev_priv = dev->dev_private; + u32 reg, val; ++ int i; + + /* Clear any frame start delays used for debugging left by the BIOS */ +- for_each_pipe(pipe) { +- reg = PIPECONF(pipe); ++ for_each_pipe(i) { ++ reg = PIPECONF(i); + I915_WRITE(reg, I915_READ(reg) & ~PIPECONF_FRAME_START_DELAY_MASK); + } + diff --git a/queue-3.4/drm-i915-use-hw-scheduler-for-fixed-function-shaders.patch b/queue-3.4/drm-i915-use-hw-scheduler-for-fixed-function-shaders.patch new file mode 100644 index 00000000000..06767e40137 --- /dev/null +++ b/queue-3.4/drm-i915-use-hw-scheduler-for-fixed-function-shaders.patch @@ -0,0 +1,95 @@ +From a1e969e0332de7a430e62822cee8f2ec8d83cd7c Mon Sep 17 00:00:00 2001 +From: Ben Widawsky +Date: Sat, 14 Apr 2012 18:41:32 -0700 +Subject: drm/i915: [GEN7] Use HW scheduler for fixed function shaders + +From: Ben Widawsky + +commit a1e969e0332de7a430e62822cee8f2ec8d83cd7c upstream. + +This originally started as a patch from Bernard as a way of simply +setting the VS scheduler. After submitting the RFC patch, we decided to +also modify the DS scheduler. To be most explicit, I've made the patch +explicitly set all scheduler modes, and included the defines for other +modes (in case someone feels frisky later). + +The rest of the story gets a bit weird. The first version of the patch +showed an almost unbelievable performance improvement. Since rebasing my +branch it appears the performance improvement has gone, unfortunately. +But setting these bits seem to be the right thing to do given that the +docs describe corruption that can occur with the default settings. + +In summary, I am seeing no more perf improvements (or regressions) in my +limited testing, but we believe this should be set to prevent rendering +corruption, therefore cc stable. + +v1: Clear bit 4 also (Ken + Eugeni) +Do a full clear + set of the bits we want (Me). + +Cc: Bernard Kilarski +Reviewed-by (RFC): Kenneth Graunke +Signed-off-by: Ben Widawsky +Reviewed-by: Eugeni Dodonov +Reviewed-by: Kenneth Graunke +Signed-off-by: Daniel Vetter +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/i915_reg.h | 15 +++++++++++++++ + drivers/gpu/drm/i915/intel_display.c | 14 ++++++++++++++ + 2 files changed, 29 insertions(+) + +--- a/drivers/gpu/drm/i915/i915_reg.h ++++ b/drivers/gpu/drm/i915/i915_reg.h +@@ -615,6 +615,21 @@ + + #define GEN6_BSD_RNCID 0x12198 + ++#define GEN7_FF_THREAD_MODE 0x20a0 ++#define GEN7_FF_SCHED_MASK 0x0077070 ++#define GEN7_FF_TS_SCHED_HS1 (0x5<<16) ++#define GEN7_FF_TS_SCHED_HS0 (0x3<<16) ++#define GEN7_FF_TS_SCHED_LOAD_BALANCE (0x1<<16) ++#define GEN7_FF_TS_SCHED_HW (0x0<<16) /* Default */ ++#define GEN7_FF_VS_SCHED_HS1 (0x5<<12) ++#define GEN7_FF_VS_SCHED_HS0 (0x3<<12) ++#define GEN7_FF_VS_SCHED_LOAD_BALANCE (0x1<<12) /* Default */ ++#define GEN7_FF_VS_SCHED_HW (0x0<<12) ++#define GEN7_FF_DS_SCHED_HS1 (0x5<<4) ++#define GEN7_FF_DS_SCHED_HS0 (0x3<<4) ++#define GEN7_FF_DS_SCHED_LOAD_BALANCE (0x1<<4) /* Default */ ++#define GEN7_FF_DS_SCHED_HW (0x0<<4) ++ + /* + * Framebuffer compression (915+ only) + */ +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -8612,6 +8612,18 @@ static void gen6_init_clock_gating(struc + } + } + ++static void gen7_setup_fixed_func_scheduler(struct drm_i915_private *dev_priv) ++{ ++ uint32_t reg = I915_READ(GEN7_FF_THREAD_MODE); ++ ++ reg &= ~GEN7_FF_SCHED_MASK; ++ reg |= GEN7_FF_TS_SCHED_HW; ++ reg |= GEN7_FF_VS_SCHED_HW; ++ reg |= GEN7_FF_DS_SCHED_HW; ++ ++ I915_WRITE(GEN7_FF_THREAD_MODE, reg); ++} ++ + static void ivybridge_init_clock_gating(struct drm_device *dev) + { + struct drm_i915_private *dev_priv = dev->dev_private; +@@ -8656,6 +8668,8 @@ static void ivybridge_init_clock_gating( + DISPPLANE_TRICKLE_FEED_DISABLE); + intel_flush_display_plane(dev_priv, pipe); + } ++ ++ gen7_setup_fixed_func_scheduler(dev_priv); + } + + static void g4x_init_clock_gating(struct drm_device *dev) diff --git a/queue-3.4/series b/queue-3.4/series index 5db82febc88..85fdf89da33 100644 --- a/queue-3.4/series +++ b/queue-3.4/series @@ -64,3 +64,5 @@ usbcore-enable-usb2-lpm-if-port-suspend-fails.patch gma500-fix-poulsbo-suspend-resume-crash-on-devices-with-sdvo-ports.patch b43legacy-fix-error-due-to-mmio-access-with-ssb-unpowered.patch drm-i915-avoid-a-double-read-of-pch_iir-during-interrupt-handling.patch +drm-i915-use-hw-scheduler-for-fixed-function-shaders.patch +drm-i915-don-t-clobber-the-pipe-param-in-sanitize_modesetting.patch -- 2.47.3