From 3ef437fe825d5e40a7b81c70a2e191924c503d25 Mon Sep 17 00:00:00 2001 From: Nicholas Nethercote Date: Sun, 13 Nov 2005 17:57:32 +0000 Subject: [PATCH] Inline cachesim_*_doref(). This gains about 5--10% in speed. git-svn-id: svn://svn.valgrind.org/valgrind/trunk@5117 --- cachegrind/cg_sim.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/cachegrind/cg_sim.c b/cachegrind/cg_sim.c index 7cab553cb2..fe3ac93439 100644 --- a/cachegrind/cg_sim.c +++ b/cachegrind/cg_sim.c @@ -108,7 +108,10 @@ static void cachesim_##L##_initcache(cache_t config) \ cachesim_initcache(config, &L); \ } \ \ -static /* __inline__ */ \ +/* This attribute forces GCC to inline this function, even though it's */ \ +/* bigger than its usual limit. Inlining gains around 5--10% speedup. */ \ +__attribute__((always_inline)) \ +static __inline__ \ void cachesim_##L##_doref(Addr a, UChar size, ULong* m1, ULong *m2) \ { \ register UInt set1 = ( a >> L.line_size_bits) & (L.sets_min_1); \ -- 2.47.3