From 40bee3bd2a05cb03c1721f0ac63144448bed38b4 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Thu, 21 Sep 2017 15:54:09 +0200 Subject: [PATCH] 4.4-stable patches added patches: input-i8042-add-gigabyte-p57-to-the-keyboard-reset-table.patch mips-math-emu-max-maxa-min-mina-.-d-s-fix-cases-of-both-inputs-zero.patch mips-math-emu-max-maxa-min-mina-.-d-s-fix-quiet-nan-propagation.patch mips-math-emu-max-min-.-d-s-fix-cases-of-both-inputs-negative.patch mips-math-emu-maxa-mina-.-d-s-fix-cases-of-both-infinite-inputs.patch mips-math-emu-maxa-mina-.-d-s-fix-cases-of-input-values-with-opposite-signs.patch mips-math-emu-mina.-d-s-fix-some-cases-of-infinity-and-zero-inputs.patch --- ...byte-p57-to-the-keyboard-reset-table.patch | 37 +++ ...-.-d-s-fix-cases-of-both-inputs-zero.patch | 152 ++++++++++ ...mina-.-d-s-fix-quiet-nan-propagation.patch | 286 ++++++++++++++++++ ...-s-fix-cases-of-both-inputs-negative.patch | 219 ++++++++++++++ ...-s-fix-cases-of-both-infinite-inputs.patch | 133 ++++++++ ...-of-input-values-with-opposite-signs.patch | 106 +++++++ ...me-cases-of-infinity-and-zero-inputs.patch | 88 ++++++ queue-4.4/series | 7 + 8 files changed, 1028 insertions(+) create mode 100644 queue-4.4/input-i8042-add-gigabyte-p57-to-the-keyboard-reset-table.patch create mode 100644 queue-4.4/mips-math-emu-max-maxa-min-mina-.-d-s-fix-cases-of-both-inputs-zero.patch create mode 100644 queue-4.4/mips-math-emu-max-maxa-min-mina-.-d-s-fix-quiet-nan-propagation.patch create mode 100644 queue-4.4/mips-math-emu-max-min-.-d-s-fix-cases-of-both-inputs-negative.patch create mode 100644 queue-4.4/mips-math-emu-maxa-mina-.-d-s-fix-cases-of-both-infinite-inputs.patch create mode 100644 queue-4.4/mips-math-emu-maxa-mina-.-d-s-fix-cases-of-input-values-with-opposite-signs.patch create mode 100644 queue-4.4/mips-math-emu-mina.-d-s-fix-some-cases-of-infinity-and-zero-inputs.patch diff --git a/queue-4.4/input-i8042-add-gigabyte-p57-to-the-keyboard-reset-table.patch b/queue-4.4/input-i8042-add-gigabyte-p57-to-the-keyboard-reset-table.patch new file mode 100644 index 00000000000..e36d5f76313 --- /dev/null +++ b/queue-4.4/input-i8042-add-gigabyte-p57-to-the-keyboard-reset-table.patch @@ -0,0 +1,37 @@ +From 697c5d8a36768b36729533fb44622b35d56d6ad0 Mon Sep 17 00:00:00 2001 +From: Kai-Heng Feng +Date: Fri, 15 Sep 2017 09:36:16 -0700 +Subject: Input: i8042 - add Gigabyte P57 to the keyboard reset table + +From: Kai-Heng Feng + +commit 697c5d8a36768b36729533fb44622b35d56d6ad0 upstream. + +Similar to other Gigabyte laptops, the touchpad on P57 requires a +keyboard reset to detect Elantech touchpad correctly. + +BugLink: https://bugs.launchpad.net/bugs/1594214 +Signed-off-by: Kai-Heng Feng +Signed-off-by: Dmitry Torokhov +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/input/serio/i8042-x86ia64io.h | 7 +++++++ + 1 file changed, 7 insertions(+) + +--- a/drivers/input/serio/i8042-x86ia64io.h ++++ b/drivers/input/serio/i8042-x86ia64io.h +@@ -905,6 +905,13 @@ static const struct dmi_system_id __init + }, + }, + { ++ /* Gigabyte P57 - Elantech touchpad */ ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "GIGABYTE"), ++ DMI_MATCH(DMI_PRODUCT_NAME, "P57"), ++ }, ++ }, ++ { + /* Schenker XMG C504 - Elantech touchpad */ + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "XMG"), diff --git a/queue-4.4/mips-math-emu-max-maxa-min-mina-.-d-s-fix-cases-of-both-inputs-zero.patch b/queue-4.4/mips-math-emu-max-maxa-min-mina-.-d-s-fix-cases-of-both-inputs-zero.patch new file mode 100644 index 00000000000..37214c64b2f --- /dev/null +++ b/queue-4.4/mips-math-emu-max-maxa-min-mina-.-d-s-fix-cases-of-both-inputs-zero.patch @@ -0,0 +1,152 @@ +From 15560a58bfd4ff82cdd16b2270d4ef9b06d2cc4d Mon Sep 17 00:00:00 2001 +From: Aleksandar Markovic +Date: Thu, 27 Jul 2017 18:08:49 +0200 +Subject: MIPS: math-emu: .: Fix cases of both inputs zero + +From: Aleksandar Markovic + +commit 15560a58bfd4ff82cdd16b2270d4ef9b06d2cc4d upstream. + +Fix the value returned by ., if both inputs +are zeros. The right behavior in such cases is stated in instruction +reference manual and is as follows: + + fs ft MAX MIN MAXA MINA + --------------------------------------------- + 0 0 0 0 0 0 + 0 -0 0 -0 0 -0 + -0 0 0 -0 0 -0 + -0 -0 -0 -0 -0 -0 + +Prior to this patch, some of the above cases were yielding correct +results. However, for the sake of code consistency, all such cases +are rewritten in this patch. + +A relevant example: + +MAX.S fd,fs,ft: + If fs contains +0.0, and ft contains -0.0, fd is going to contain + +0.0 (without this patch, it used to contain -0.0). + +Fixes: a79f5f9ba508 ("MIPS: math-emu: Add support for the MIPS R6 MAX{, A} FPU instruction") +Fixes: 4e9561b20e2f ("MIPS: math-emu: Add support for the MIPS R6 MIN{, A} FPU instruction") + +Signed-off-by: Miodrag Dinic +Signed-off-by: Goran Ferenc +Signed-off-by: Aleksandar Markovic +Reviewed-by: James Hogan +Cc: Bo Hu +Cc: Douglas Leung +Cc: Jin Qian +Cc: Paul Burton +Cc: Petar Jovanovic +Cc: Raghu Gandham +Cc: linux-mips@linux-mips.org +Cc: linux-kernel@vger.kernel.org +Patchwork: https://patchwork.linux-mips.org/patch/16881/ +Signed-off-by: Ralf Baechle +Signed-off-by: Greg Kroah-Hartman + +--- + arch/mips/math-emu/dp_fmax.c | 8 ++------ + arch/mips/math-emu/dp_fmin.c | 8 ++------ + arch/mips/math-emu/sp_fmax.c | 8 ++------ + arch/mips/math-emu/sp_fmin.c | 8 ++------ + 4 files changed, 8 insertions(+), 24 deletions(-) + +--- a/arch/mips/math-emu/dp_fmax.c ++++ b/arch/mips/math-emu/dp_fmax.c +@@ -92,9 +92,7 @@ union ieee754dp ieee754dp_fmax(union iee + return ys ? x : y; + + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO): +- if (xs == ys) +- return x; +- return ieee754dp_zero(1); ++ return ieee754dp_zero(xs & ys); + + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM): + DPDNORMX; +@@ -204,9 +202,7 @@ union ieee754dp ieee754dp_fmaxa(union ie + return y; + + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO): +- if (xs == ys) +- return x; +- return ieee754dp_zero(1); ++ return ieee754dp_zero(xs & ys); + + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM): + DPDNORMX; +--- a/arch/mips/math-emu/dp_fmin.c ++++ b/arch/mips/math-emu/dp_fmin.c +@@ -92,9 +92,7 @@ union ieee754dp ieee754dp_fmin(union iee + return ys ? y : x; + + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO): +- if (xs == ys) +- return x; +- return ieee754dp_zero(1); ++ return ieee754dp_zero(xs | ys); + + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM): + DPDNORMX; +@@ -204,9 +202,7 @@ union ieee754dp ieee754dp_fmina(union ie + return y; + + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO): +- if (xs == ys) +- return x; +- return ieee754dp_zero(1); ++ return ieee754dp_zero(xs | ys); + + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM): + DPDNORMX; +--- a/arch/mips/math-emu/sp_fmax.c ++++ b/arch/mips/math-emu/sp_fmax.c +@@ -92,9 +92,7 @@ union ieee754sp ieee754sp_fmax(union iee + return ys ? x : y; + + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO): +- if (xs == ys) +- return x; +- return ieee754sp_zero(1); ++ return ieee754sp_zero(xs & ys); + + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM): + SPDNORMX; +@@ -204,9 +202,7 @@ union ieee754sp ieee754sp_fmaxa(union ie + return y; + + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO): +- if (xs == ys) +- return x; +- return ieee754sp_zero(1); ++ return ieee754sp_zero(xs & ys); + + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM): + SPDNORMX; +--- a/arch/mips/math-emu/sp_fmin.c ++++ b/arch/mips/math-emu/sp_fmin.c +@@ -92,9 +92,7 @@ union ieee754sp ieee754sp_fmin(union iee + return ys ? y : x; + + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO): +- if (xs == ys) +- return x; +- return ieee754sp_zero(1); ++ return ieee754sp_zero(xs | ys); + + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM): + SPDNORMX; +@@ -204,9 +202,7 @@ union ieee754sp ieee754sp_fmina(union ie + return y; + + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO): +- if (xs == ys) +- return x; +- return ieee754sp_zero(1); ++ return ieee754sp_zero(xs | ys); + + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM): + SPDNORMX; diff --git a/queue-4.4/mips-math-emu-max-maxa-min-mina-.-d-s-fix-quiet-nan-propagation.patch b/queue-4.4/mips-math-emu-max-maxa-min-mina-.-d-s-fix-quiet-nan-propagation.patch new file mode 100644 index 00000000000..617624c5d8f --- /dev/null +++ b/queue-4.4/mips-math-emu-max-maxa-min-mina-.-d-s-fix-quiet-nan-propagation.patch @@ -0,0 +1,286 @@ +From e78bf0dc4789bdea1453595ae89e8db65918e22e Mon Sep 17 00:00:00 2001 +From: Aleksandar Markovic +Date: Thu, 27 Jul 2017 18:08:48 +0200 +Subject: MIPS: math-emu: .: Fix quiet NaN propagation + +From: Aleksandar Markovic + +commit e78bf0dc4789bdea1453595ae89e8db65918e22e upstream. + +Fix the value returned by . fd,fs,ft, if both +inputs are quiet NaNs. The . specifications +state that the returned value in such cases should be the quiet NaN +contained in register fs. + +A relevant example: + +MAX.S fd,fs,ft: + If fs contains qNaN1, and ft contains qNaN2, fd is going to contain + qNaN1 (without this patch, it used to contain qNaN2). + +Fixes: a79f5f9ba508 ("MIPS: math-emu: Add support for the MIPS R6 MAX{, A} FPU instruction") +Fixes: 4e9561b20e2f ("MIPS: math-emu: Add support for the MIPS R6 MIN{, A} FPU instruction") + +Signed-off-by: Miodrag Dinic +Signed-off-by: Goran Ferenc +Signed-off-by: Aleksandar Markovic +Reviewed-by: James Hogan +Cc: Bo Hu +Cc: Douglas Leung +Cc: Jin Qian +Cc: Paul Burton +Cc: Petar Jovanovic +Cc: Raghu Gandham +Cc: linux-mips@linux-mips.org +Cc: linux-kernel@vger.kernel.org +Patchwork: https://patchwork.linux-mips.org/patch/16880/ +Signed-off-by: Ralf Baechle +Signed-off-by: Greg Kroah-Hartman + +--- + arch/mips/math-emu/dp_fmax.c | 32 ++++++++++++++++++++++++++++---- + arch/mips/math-emu/dp_fmin.c | 32 ++++++++++++++++++++++++++++---- + arch/mips/math-emu/sp_fmax.c | 32 ++++++++++++++++++++++++++++---- + arch/mips/math-emu/sp_fmin.c | 32 ++++++++++++++++++++++++++++---- + 4 files changed, 112 insertions(+), 16 deletions(-) + +--- a/arch/mips/math-emu/dp_fmax.c ++++ b/arch/mips/math-emu/dp_fmax.c +@@ -47,14 +47,26 @@ union ieee754dp ieee754dp_fmax(union iee + case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF): + return ieee754dp_nanxcpt(x); + +- /* numbers are preferred to NaNs */ ++ /* ++ * Quiet NaN handling ++ */ ++ ++ /* ++ * The case of both inputs quiet NaNs ++ */ ++ case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): ++ return x; ++ ++ /* ++ * The cases of exactly one input quiet NaN (numbers ++ * are here preferred as returned values to NaNs) ++ */ + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN): + return x; + +- case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO): + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM): + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM): +@@ -147,14 +159,26 @@ union ieee754dp ieee754dp_fmaxa(union ie + case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF): + return ieee754dp_nanxcpt(x); + +- /* numbers are preferred to NaNs */ ++ /* ++ * Quiet NaN handling ++ */ ++ ++ /* ++ * The case of both inputs quiet NaNs ++ */ ++ case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): ++ return x; ++ ++ /* ++ * The cases of exactly one input quiet NaN (numbers ++ * are here preferred as returned values to NaNs) ++ */ + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN): + return x; + +- case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO): + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM): + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM): +--- a/arch/mips/math-emu/dp_fmin.c ++++ b/arch/mips/math-emu/dp_fmin.c +@@ -47,14 +47,26 @@ union ieee754dp ieee754dp_fmin(union iee + case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF): + return ieee754dp_nanxcpt(x); + +- /* numbers are preferred to NaNs */ ++ /* ++ * Quiet NaN handling ++ */ ++ ++ /* ++ * The case of both inputs quiet NaNs ++ */ ++ case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): ++ return x; ++ ++ /* ++ * The cases of exactly one input quiet NaN (numbers ++ * are here preferred as returned values to NaNs) ++ */ + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN): + return x; + +- case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO): + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM): + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM): +@@ -147,14 +159,26 @@ union ieee754dp ieee754dp_fmina(union ie + case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF): + return ieee754dp_nanxcpt(x); + +- /* numbers are preferred to NaNs */ ++ /* ++ * Quiet NaN handling ++ */ ++ ++ /* ++ * The case of both inputs quiet NaNs ++ */ ++ case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): ++ return x; ++ ++ /* ++ * The cases of exactly one input quiet NaN (numbers ++ * are here preferred as returned values to NaNs) ++ */ + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN): + return x; + +- case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO): + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM): + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM): +--- a/arch/mips/math-emu/sp_fmax.c ++++ b/arch/mips/math-emu/sp_fmax.c +@@ -47,14 +47,26 @@ union ieee754sp ieee754sp_fmax(union iee + case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF): + return ieee754sp_nanxcpt(x); + +- /* numbers are preferred to NaNs */ ++ /* ++ * Quiet NaN handling ++ */ ++ ++ /* ++ * The case of both inputs quiet NaNs ++ */ ++ case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): ++ return x; ++ ++ /* ++ * The cases of exactly one input quiet NaN (numbers ++ * are here preferred as returned values to NaNs) ++ */ + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN): + return x; + +- case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO): + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM): + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM): +@@ -147,14 +159,26 @@ union ieee754sp ieee754sp_fmaxa(union ie + case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF): + return ieee754sp_nanxcpt(x); + +- /* numbers are preferred to NaNs */ ++ /* ++ * Quiet NaN handling ++ */ ++ ++ /* ++ * The case of both inputs quiet NaNs ++ */ ++ case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): ++ return x; ++ ++ /* ++ * The cases of exactly one input quiet NaN (numbers ++ * are here preferred as returned values to NaNs) ++ */ + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN): + return x; + +- case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO): + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM): + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM): +--- a/arch/mips/math-emu/sp_fmin.c ++++ b/arch/mips/math-emu/sp_fmin.c +@@ -47,14 +47,26 @@ union ieee754sp ieee754sp_fmin(union iee + case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF): + return ieee754sp_nanxcpt(x); + +- /* numbers are preferred to NaNs */ ++ /* ++ * Quiet NaN handling ++ */ ++ ++ /* ++ * The case of both inputs quiet NaNs ++ */ ++ case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): ++ return x; ++ ++ /* ++ * The cases of exactly one input quiet NaN (numbers ++ * are here preferred as returned values to NaNs) ++ */ + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN): + return x; + +- case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO): + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM): + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM): +@@ -147,14 +159,26 @@ union ieee754sp ieee754sp_fmina(union ie + case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF): + return ieee754sp_nanxcpt(x); + +- /* numbers are preferred to NaNs */ ++ /* ++ * Quiet NaN handling ++ */ ++ ++ /* ++ * The case of both inputs quiet NaNs ++ */ ++ case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): ++ return x; ++ ++ /* ++ * The cases of exactly one input quiet NaN (numbers ++ * are here preferred as returned values to NaNs) ++ */ + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN): + return x; + +- case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN): + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO): + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM): + case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM): diff --git a/queue-4.4/mips-math-emu-max-min-.-d-s-fix-cases-of-both-inputs-negative.patch b/queue-4.4/mips-math-emu-max-min-.-d-s-fix-cases-of-both-inputs-negative.patch new file mode 100644 index 00000000000..c5c3d4aa591 --- /dev/null +++ b/queue-4.4/mips-math-emu-max-min-.-d-s-fix-cases-of-both-inputs-negative.patch @@ -0,0 +1,219 @@ +From aabf5cf02e22ebc4e541adf835910f388b6c3e65 Mon Sep 17 00:00:00 2001 +From: Aleksandar Markovic +Date: Thu, 27 Jul 2017 18:08:50 +0200 +Subject: MIPS: math-emu: .: Fix cases of both inputs negative + +From: Aleksandar Markovic + +commit aabf5cf02e22ebc4e541adf835910f388b6c3e65 upstream. + +Fix the value returned by ., if both inputs are negative +normal fp numbers. The previous logic did not take into account that +if both inputs have the same sign, there should be separate treatment +of the cases when both inputs are negative and when both inputs are +positive. + +A relevant example: + +MAX.S fd,fs,ft: + If fs contains -5.0, and ft contains -7.0, fd is going to contain + -5.0 (without this patch, it used to contain -7.0). + +Fixes: a79f5f9ba508 ("MIPS: math-emu: Add support for the MIPS R6 MAX{, A} FPU instruction") +Fixes: 4e9561b20e2f ("MIPS: math-emu: Add support for the MIPS R6 MIN{, A} FPU instruction") + +Signed-off-by: Miodrag Dinic +Signed-off-by: Goran Ferenc +Signed-off-by: Aleksandar Markovic +Reviewed-by: James Hogan +Cc: Bo Hu +Cc: Douglas Leung +Cc: Jin Qian +Cc: Paul Burton +Cc: Petar Jovanovic +Cc: Raghu Gandham +Cc: linux-mips@linux-mips.org +Cc: linux-kernel@vger.kernel.org +Patchwork: https://patchwork.linux-mips.org/patch/16882/ +Signed-off-by: Ralf Baechle +Signed-off-by: Greg Kroah-Hartman + +--- + arch/mips/math-emu/dp_fmax.c | 32 ++++++++++++++++++++++++-------- + arch/mips/math-emu/dp_fmin.c | 32 ++++++++++++++++++++++++-------- + arch/mips/math-emu/sp_fmax.c | 32 ++++++++++++++++++++++++-------- + arch/mips/math-emu/sp_fmin.c | 32 ++++++++++++++++++++++++-------- + 4 files changed, 96 insertions(+), 32 deletions(-) + +--- a/arch/mips/math-emu/dp_fmax.c ++++ b/arch/mips/math-emu/dp_fmax.c +@@ -116,16 +116,32 @@ union ieee754dp ieee754dp_fmax(union iee + else if (xs < ys) + return x; + +- /* Compare exponent */ +- if (xe > ye) +- return x; +- else if (xe < ye) +- return y; ++ /* Signs of inputs are equal, let's compare exponents */ ++ if (xs == 0) { ++ /* Inputs are both positive */ ++ if (xe > ye) ++ return x; ++ else if (xe < ye) ++ return y; ++ } else { ++ /* Inputs are both negative */ ++ if (xe > ye) ++ return y; ++ else if (xe < ye) ++ return x; ++ } + +- /* Compare mantissa */ ++ /* Signs and exponents of inputs are equal, let's compare mantissas */ ++ if (xs == 0) { ++ /* Inputs are both positive, with equal signs and exponents */ ++ if (xm <= ym) ++ return y; ++ return x; ++ } ++ /* Inputs are both negative, with equal signs and exponents */ + if (xm <= ym) +- return y; +- return x; ++ return x; ++ return y; + } + + union ieee754dp ieee754dp_fmaxa(union ieee754dp x, union ieee754dp y) +--- a/arch/mips/math-emu/dp_fmin.c ++++ b/arch/mips/math-emu/dp_fmin.c +@@ -116,16 +116,32 @@ union ieee754dp ieee754dp_fmin(union iee + else if (xs < ys) + return y; + +- /* Compare exponent */ +- if (xe > ye) +- return y; +- else if (xe < ye) +- return x; ++ /* Signs of inputs are the same, let's compare exponents */ ++ if (xs == 0) { ++ /* Inputs are both positive */ ++ if (xe > ye) ++ return y; ++ else if (xe < ye) ++ return x; ++ } else { ++ /* Inputs are both negative */ ++ if (xe > ye) ++ return x; ++ else if (xe < ye) ++ return y; ++ } + +- /* Compare mantissa */ ++ /* Signs and exponents of inputs are equal, let's compare mantissas */ ++ if (xs == 0) { ++ /* Inputs are both positive, with equal signs and exponents */ ++ if (xm <= ym) ++ return x; ++ return y; ++ } ++ /* Inputs are both negative, with equal signs and exponents */ + if (xm <= ym) +- return x; +- return y; ++ return y; ++ return x; + } + + union ieee754dp ieee754dp_fmina(union ieee754dp x, union ieee754dp y) +--- a/arch/mips/math-emu/sp_fmax.c ++++ b/arch/mips/math-emu/sp_fmax.c +@@ -116,16 +116,32 @@ union ieee754sp ieee754sp_fmax(union iee + else if (xs < ys) + return x; + +- /* Compare exponent */ +- if (xe > ye) +- return x; +- else if (xe < ye) +- return y; ++ /* Signs of inputs are equal, let's compare exponents */ ++ if (xs == 0) { ++ /* Inputs are both positive */ ++ if (xe > ye) ++ return x; ++ else if (xe < ye) ++ return y; ++ } else { ++ /* Inputs are both negative */ ++ if (xe > ye) ++ return y; ++ else if (xe < ye) ++ return x; ++ } + +- /* Compare mantissa */ ++ /* Signs and exponents of inputs are equal, let's compare mantissas */ ++ if (xs == 0) { ++ /* Inputs are both positive, with equal signs and exponents */ ++ if (xm <= ym) ++ return y; ++ return x; ++ } ++ /* Inputs are both negative, with equal signs and exponents */ + if (xm <= ym) +- return y; +- return x; ++ return x; ++ return y; + } + + union ieee754sp ieee754sp_fmaxa(union ieee754sp x, union ieee754sp y) +--- a/arch/mips/math-emu/sp_fmin.c ++++ b/arch/mips/math-emu/sp_fmin.c +@@ -116,16 +116,32 @@ union ieee754sp ieee754sp_fmin(union iee + else if (xs < ys) + return y; + +- /* Compare exponent */ +- if (xe > ye) +- return y; +- else if (xe < ye) +- return x; ++ /* Signs of inputs are the same, let's compare exponents */ ++ if (xs == 0) { ++ /* Inputs are both positive */ ++ if (xe > ye) ++ return y; ++ else if (xe < ye) ++ return x; ++ } else { ++ /* Inputs are both negative */ ++ if (xe > ye) ++ return x; ++ else if (xe < ye) ++ return y; ++ } + +- /* Compare mantissa */ ++ /* Signs and exponents of inputs are equal, let's compare mantissas */ ++ if (xs == 0) { ++ /* Inputs are both positive, with equal signs and exponents */ ++ if (xm <= ym) ++ return x; ++ return y; ++ } ++ /* Inputs are both negative, with equal signs and exponents */ + if (xm <= ym) +- return x; +- return y; ++ return y; ++ return x; + } + + union ieee754sp ieee754sp_fmina(union ieee754sp x, union ieee754sp y) diff --git a/queue-4.4/mips-math-emu-maxa-mina-.-d-s-fix-cases-of-both-infinite-inputs.patch b/queue-4.4/mips-math-emu-maxa-mina-.-d-s-fix-cases-of-both-infinite-inputs.patch new file mode 100644 index 00000000000..6d0b011627d --- /dev/null +++ b/queue-4.4/mips-math-emu-maxa-mina-.-d-s-fix-cases-of-both-infinite-inputs.patch @@ -0,0 +1,133 @@ +From 3444c4eb534c20e44f0d6670b34263efaf8b531f Mon Sep 17 00:00:00 2001 +From: Aleksandar Markovic +Date: Thu, 27 Jul 2017 18:08:52 +0200 +Subject: MIPS: math-emu: .: Fix cases of both infinite inputs + +From: Aleksandar Markovic + +commit 3444c4eb534c20e44f0d6670b34263efaf8b531f upstream. + +Fix the value returned by . fd,fs,ft, if both inputs +are infinite. The previous implementation returned always the value +contained in ft in such cases. The correct behavior is specified +in Mips instruction set manual and is as follows: + + fs ft MAXA MINA + --------------------------------- + inf inf inf inf + inf -inf inf -inf + -inf inf inf -inf + -inf -inf -inf -inf + +A relevant example: + +MAXA.S fd,fs,ft: + If fs contains +inf, and ft contains -inf, fd is going to contain + +inf (without this patch, it used to contain -inf). + +Fixes: a79f5f9ba508 ("MIPS: math-emu: Add support for the MIPS R6 MAX{, A} FPU instruction") +Fixes: 4e9561b20e2f ("MIPS: math-emu: Add support for the MIPS R6 MIN{, A} FPU instruction") + +Signed-off-by: Miodrag Dinic +Signed-off-by: Goran Ferenc +Signed-off-by: Aleksandar Markovic +Reviewed-by: James Hogan +Cc: Bo Hu +Cc: Douglas Leung +Cc: Jin Qian +Cc: Paul Burton +Cc: Petar Jovanovic +Cc: Raghu Gandham +Cc: linux-mips@linux-mips.org +Cc: linux-kernel@vger.kernel.org +Patchwork: https://patchwork.linux-mips.org/patch/16884/ +Signed-off-by: Ralf Baechle +Signed-off-by: Greg Kroah-Hartman + +--- + arch/mips/math-emu/dp_fmax.c | 4 +++- + arch/mips/math-emu/dp_fmin.c | 4 +++- + arch/mips/math-emu/sp_fmax.c | 4 +++- + arch/mips/math-emu/sp_fmin.c | 4 +++- + 4 files changed, 12 insertions(+), 4 deletions(-) + +--- a/arch/mips/math-emu/dp_fmax.c ++++ b/arch/mips/math-emu/dp_fmax.c +@@ -202,6 +202,9 @@ union ieee754dp ieee754dp_fmaxa(union ie + /* + * Infinity and zero handling + */ ++ case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF): ++ return ieee754dp_inf(xs & ys); ++ + case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO): + case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_NORM): + case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM): +@@ -209,7 +212,6 @@ union ieee754dp ieee754dp_fmaxa(union ie + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO): + return x; + +- case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF): + case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF): + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF): + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF): +--- a/arch/mips/math-emu/dp_fmin.c ++++ b/arch/mips/math-emu/dp_fmin.c +@@ -202,6 +202,9 @@ union ieee754dp ieee754dp_fmina(union ie + /* + * Infinity and zero handling + */ ++ case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF): ++ return ieee754dp_inf(xs | ys); ++ + case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO): + case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_NORM): + case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM): +@@ -209,7 +212,6 @@ union ieee754dp ieee754dp_fmina(union ie + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO): + return x; + +- case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF): + case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF): + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF): + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF): +--- a/arch/mips/math-emu/sp_fmax.c ++++ b/arch/mips/math-emu/sp_fmax.c +@@ -202,6 +202,9 @@ union ieee754sp ieee754sp_fmaxa(union ie + /* + * Infinity and zero handling + */ ++ case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF): ++ return ieee754sp_inf(xs & ys); ++ + case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO): + case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_NORM): + case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM): +@@ -209,7 +212,6 @@ union ieee754sp ieee754sp_fmaxa(union ie + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO): + return x; + +- case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF): + case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF): + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF): + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF): +--- a/arch/mips/math-emu/sp_fmin.c ++++ b/arch/mips/math-emu/sp_fmin.c +@@ -202,6 +202,9 @@ union ieee754sp ieee754sp_fmina(union ie + /* + * Infinity and zero handling + */ ++ case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF): ++ return ieee754sp_inf(xs | ys); ++ + case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO): + case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_NORM): + case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM): +@@ -209,7 +212,6 @@ union ieee754sp ieee754sp_fmina(union ie + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO): + return x; + +- case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF): + case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF): + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF): + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF): diff --git a/queue-4.4/mips-math-emu-maxa-mina-.-d-s-fix-cases-of-input-values-with-opposite-signs.patch b/queue-4.4/mips-math-emu-maxa-mina-.-d-s-fix-cases-of-input-values-with-opposite-signs.patch new file mode 100644 index 00000000000..026e1ec7395 --- /dev/null +++ b/queue-4.4/mips-math-emu-maxa-mina-.-d-s-fix-cases-of-input-values-with-opposite-signs.patch @@ -0,0 +1,106 @@ +From 1a41b3b441508ae63b1a9ec699ec94065739eb60 Mon Sep 17 00:00:00 2001 +From: Aleksandar Markovic +Date: Thu, 27 Jul 2017 18:08:51 +0200 +Subject: MIPS: math-emu: .: Fix cases of input values with opposite signs + +From: Aleksandar Markovic + +commit 1a41b3b441508ae63b1a9ec699ec94065739eb60 upstream. + +Fix the value returned by ., if the inputs are normal +fp numbers of the same absolute value, but opposite signs. + +A relevant example: + +MAXA.S fd,fs,ft: + If fs contains -3.0, and ft contains +3.0, fd is going to contain + +3.0 (without this patch, it used to contain -3.0). + +Fixes: a79f5f9ba508 ("MIPS: math-emu: Add support for the MIPS R6 MAX{, A} FPU instruction") +Fixes: 4e9561b20e2f ("MIPS: math-emu: Add support for the MIPS R6 MIN{, A} FPU instruction") + +Signed-off-by: Miodrag Dinic +Signed-off-by: Goran Ferenc +Signed-off-by: Aleksandar Markovic +Reviewed-by: James Hogan +Cc: Bo Hu +Cc: Douglas Leung +Cc: Jin Qian +Cc: Paul Burton +Cc: Petar Jovanovic +Cc: Raghu Gandham +Cc: linux-mips@linux-mips.org +Cc: linux-kernel@vger.kernel.org +Patchwork: https://patchwork.linux-mips.org/patch/16883/ +Signed-off-by: Ralf Baechle +Signed-off-by: Greg Kroah-Hartman + +--- + arch/mips/math-emu/dp_fmax.c | 8 ++++++-- + arch/mips/math-emu/dp_fmin.c | 6 +++++- + arch/mips/math-emu/sp_fmax.c | 8 ++++++-- + arch/mips/math-emu/sp_fmin.c | 6 +++++- + 4 files changed, 22 insertions(+), 6 deletions(-) + +--- a/arch/mips/math-emu/dp_fmax.c ++++ b/arch/mips/math-emu/dp_fmax.c +@@ -243,7 +243,11 @@ union ieee754dp ieee754dp_fmaxa(union ie + return y; + + /* Compare mantissa */ +- if (xm <= ym) ++ if (xm < ym) + return y; +- return x; ++ else if (xm > ym) ++ return x; ++ else if (xs == 0) ++ return x; ++ return y; + } +--- a/arch/mips/math-emu/dp_fmin.c ++++ b/arch/mips/math-emu/dp_fmin.c +@@ -243,7 +243,11 @@ union ieee754dp ieee754dp_fmina(union ie + return x; + + /* Compare mantissa */ +- if (xm <= ym) ++ if (xm < ym) ++ return x; ++ else if (xm > ym) ++ return y; ++ else if (xs == 1) + return x; + return y; + } +--- a/arch/mips/math-emu/sp_fmax.c ++++ b/arch/mips/math-emu/sp_fmax.c +@@ -243,7 +243,11 @@ union ieee754sp ieee754sp_fmaxa(union ie + return y; + + /* Compare mantissa */ +- if (xm <= ym) ++ if (xm < ym) + return y; +- return x; ++ else if (xm > ym) ++ return x; ++ else if (xs == 0) ++ return x; ++ return y; + } +--- a/arch/mips/math-emu/sp_fmin.c ++++ b/arch/mips/math-emu/sp_fmin.c +@@ -243,7 +243,11 @@ union ieee754sp ieee754sp_fmina(union ie + return x; + + /* Compare mantissa */ +- if (xm <= ym) ++ if (xm < ym) ++ return x; ++ else if (xm > ym) ++ return y; ++ else if (xs == 1) + return x; + return y; + } diff --git a/queue-4.4/mips-math-emu-mina.-d-s-fix-some-cases-of-infinity-and-zero-inputs.patch b/queue-4.4/mips-math-emu-mina.-d-s-fix-some-cases-of-infinity-and-zero-inputs.patch new file mode 100644 index 00000000000..02bfdd5b8ea --- /dev/null +++ b/queue-4.4/mips-math-emu-mina.-d-s-fix-some-cases-of-infinity-and-zero-inputs.patch @@ -0,0 +1,88 @@ +From 304bfe473e70523e591fb1c9223289d355e0bdcb Mon Sep 17 00:00:00 2001 +From: Aleksandar Markovic +Date: Thu, 27 Jul 2017 18:08:53 +0200 +Subject: MIPS: math-emu: MINA.: Fix some cases of infinity and zero inputs + +From: Aleksandar Markovic + +commit 304bfe473e70523e591fb1c9223289d355e0bdcb upstream. + +Fix following special cases for MINA>.: + + - if one of the inputs is zero, and the other is subnormal, normal, + or infinity, the value of the former should be returned (that is, + a zero). + - if one of the inputs is infinity, and the other input is normal, + or subnormal, the value of the latter should be returned. + +The previous implementation's logic for such cases was incorrect - it +appears as if it implements MAXA, and not MINA instruction. + +A relevant example: + +MINA.S fd,fs,ft: + If fs contains 100.0, and ft contains 0.0, fd is going to contain + 0.0 (without this patch, it used to contain 100.0). + +Fixes: a79f5f9ba508 ("MIPS: math-emu: Add support for the MIPS R6 MAX{, A} FPU instruction") +Fixes: 4e9561b20e2f ("MIPS: math-emu: Add support for the MIPS R6 MIN{, A} FPU instruction") + +Signed-off-by: Miodrag Dinic +Signed-off-by: Goran Ferenc +Signed-off-by: Aleksandar Markovic +Reviewed-by: James Hogan +Cc: Bo Hu +Cc: Douglas Leung +Cc: Jin Qian +Cc: Paul Burton +Cc: Petar Jovanovic +Cc: Raghu Gandham +Cc: linux-mips@linux-mips.org +Cc: linux-kernel@vger.kernel.org +Patchwork: https://patchwork.linux-mips.org/patch/16885/ +Signed-off-by: Ralf Baechle +Signed-off-by: Greg Kroah-Hartman + +--- + arch/mips/math-emu/dp_fmin.c | 4 ++-- + arch/mips/math-emu/sp_fmin.c | 4 ++-- + 2 files changed, 4 insertions(+), 4 deletions(-) + +--- a/arch/mips/math-emu/dp_fmin.c ++++ b/arch/mips/math-emu/dp_fmin.c +@@ -210,14 +210,14 @@ union ieee754dp ieee754dp_fmina(union ie + case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM): + case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO): + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO): +- return x; ++ return y; + + case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF): + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF): + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF): + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_NORM): + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_DNORM): +- return y; ++ return x; + + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO): + return ieee754dp_zero(xs | ys); +--- a/arch/mips/math-emu/sp_fmin.c ++++ b/arch/mips/math-emu/sp_fmin.c +@@ -210,14 +210,14 @@ union ieee754sp ieee754sp_fmina(union ie + case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM): + case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO): + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO): +- return x; ++ return y; + + case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF): + case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF): + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF): + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_NORM): + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_DNORM): +- return y; ++ return x; + + case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO): + return ieee754sp_zero(xs | ys); diff --git a/queue-4.4/series b/queue-4.4/series index 6b97393a28a..c50acd1de5c 100644 --- a/queue-4.4/series +++ b/queue-4.4/series @@ -17,3 +17,10 @@ mm-prevent-double-decrease-of-nr_reserved_highatomic.patch tty-improve-tty_insert_flip_char-fast-path.patch tty-improve-tty_insert_flip_char-slow-path.patch tty-fix-__tty_insert_flip_char-regression.patch +input-i8042-add-gigabyte-p57-to-the-keyboard-reset-table.patch +mips-math-emu-max-maxa-min-mina-.-d-s-fix-quiet-nan-propagation.patch +mips-math-emu-max-maxa-min-mina-.-d-s-fix-cases-of-both-inputs-zero.patch +mips-math-emu-max-min-.-d-s-fix-cases-of-both-inputs-negative.patch +mips-math-emu-maxa-mina-.-d-s-fix-cases-of-input-values-with-opposite-signs.patch +mips-math-emu-maxa-mina-.-d-s-fix-cases-of-both-infinite-inputs.patch +mips-math-emu-mina.-d-s-fix-some-cases-of-infinity-and-zero-inputs.patch -- 2.47.3