From 41c8173ae516598d0decee12041b92963b3d694d Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Mon, 2 Jun 2025 11:52:44 +0200 Subject: [PATCH] 6.12-stable patches added patches: arm64-dts-qcom-ipq9574-add-missing-properties-for-cryptobam.patch arm64-dts-qcom-sa8775p-remove-cdsp-compute-cb-10.patch arm64-dts-qcom-sa8775p-remove-extra-entries-from-the-iommus-property.patch arm64-dts-qcom-sm8350-fix-typo-in-pil_camera_mem-node.patch arm64-dts-qcom-sm8450-add-missing-properties-for-cryptobam.patch arm64-dts-qcom-sm8550-add-missing-properties-for-cryptobam.patch arm64-dts-qcom-sm8650-add-missing-properties-for-cryptobam.patch arm64-dts-qcom-x1e80100-asus-vivobook-s15-fix-vreg_l2j_1p2-voltage.patch arm64-dts-qcom-x1e80100-fix-video-thermal-zone.patch arm64-dts-qcom-x1e80100-lenovo-yoga-slim7x-fix-vreg_l2j_1p2-voltage.patch arm64-dts-qcom-x1e80100-qcp-fix-vreg_l2j_1p2-voltage.patch arm64-dts-qcom-x1e80100-qcp-mark-l12b-and-l15b-always-on.patch arm64-dts-qcom-x1e80100-yoga-slim7x-mark-l12b-and-l15b-always-on.patch arm64-dts-ti-k3-am62-main-set-emmc-clock-parent-to-default.patch arm64-dts-ti-k3-am62a-main-set-emmc-clock-parent-to-default.patch arm64-dts-ti-k3-am62p-j722s-common-main-set-emmc-clock-parent-to-default.patch arm64-dts-ti-k3-am62x-remove-clock-names-property-from-imx219-overlay.patch arm64-dts-ti-k3-am62x-rename-i2c-switch-to-i2c-mux-in-imx219-overlay.patch arm64-dts-ti-k3-am62x-rename-i2c-switch-to-i2c-mux-in-ov5640-overlay.patch arm64-dts-ti-k3-am65-main-add-missing-taps-to-sdhci0.patch arm64-dts-ti-k3-am68-sk-fix-regulator-hierarchy.patch arm64-dts-ti-k3-j721e-sk-add-dt-nodes-for-power-regulators.patch arm64-dts-ti-k3-j721e-sk-add-requiried-voltage-supplies-for-imx219.patch arm64-dts-ti-k3-j721e-sk-remove-clock-names-property-from-imx219-overlay.patch arm64-dts-ti-k3-j722s-evm-enable-serdes_wiz0-and-serdes_wiz1.patch arm64-dts-ti-k3-j722s-main-disable-serdes_wiz0-and-serdes_wiz1.patch arm64-dts-ti-k3-j784s4-j742s2-main-common-fix-length-of-serdes_ln_ctrl.patch net_sched-hfsc-address-reentrant-enqueue-adding-class-to-eltree-twice.patch perf-arm-cmn-add-cmn-s3-acpi-binding.patch perf-arm-cmn-fix-req2-snp2-mixup.patch perf-arm-cmn-initialise-cmn-cpu-earlier.patch --- ...add-missing-properties-for-cryptobam.patch | 43 ++ ...om-sa8775p-remove-cdsp-compute-cb-10.patch | 40 ++ ...tra-entries-from-the-iommus-property.patch | 433 ++++++++++++++++++ ...8350-fix-typo-in-pil_camera_mem-node.patch | 34 ++ ...add-missing-properties-for-cryptobam.patch | 42 ++ ...add-missing-properties-for-cryptobam.patch | 42 ++ ...add-missing-properties-for-cryptobam.patch | 42 ++ ...ivobook-s15-fix-vreg_l2j_1p2-voltage.patch | 39 ++ ...qcom-x1e80100-fix-video-thermal-zone.patch | 56 +++ ...yoga-slim7x-fix-vreg_l2j_1p2-voltage.patch | 39 ++ ...1e80100-qcp-fix-vreg_l2j_1p2-voltage.patch | 39 ++ ...100-qcp-mark-l12b-and-l15b-always-on.patch | 45 ++ ...-slim7x-mark-l12b-and-l15b-always-on.patch | 47 ++ ...ain-set-emmc-clock-parent-to-default.patch | 37 ++ ...ain-set-emmc-clock-parent-to-default.patch | 37 ++ ...ain-set-emmc-clock-parent-to-default.patch | 37 ++ ...k-names-property-from-imx219-overlay.patch | 35 ++ ...-switch-to-i2c-mux-in-imx219-overlay.patch | 37 ++ ...-switch-to-i2c-mux-in-ov5640-overlay.patch | 49 ++ ...am65-main-add-missing-taps-to-sdhci0.patch | 36 ++ ...i-k3-am68-sk-fix-regulator-hierarchy.patch | 56 +++ ...sk-add-dt-nodes-for-power-regulators.patch | 80 ++++ ...equiried-voltage-supplies-for-imx219.patch | 80 ++++ ...k-names-property-from-imx219-overlay.patch | 43 ++ ...m-enable-serdes_wiz0-and-serdes_wiz1.patch | 50 ++ ...-disable-serdes_wiz0-and-serdes_wiz1.patch | 62 +++ ...-common-fix-length-of-serdes_ln_ctrl.patch | 35 ++ ...enqueue-adding-class-to-eltree-twice.patch | 85 ++++ ...perf-arm-cmn-add-cmn-s3-acpi-binding.patch | 33 ++ .../perf-arm-cmn-fix-req2-snp2-mixup.patch | 46 ++ ...f-arm-cmn-initialise-cmn-cpu-earlier.patch | 43 ++ queue-6.12/series | 31 ++ 32 files changed, 1853 insertions(+) create mode 100644 queue-6.12/arm64-dts-qcom-ipq9574-add-missing-properties-for-cryptobam.patch create mode 100644 queue-6.12/arm64-dts-qcom-sa8775p-remove-cdsp-compute-cb-10.patch create mode 100644 queue-6.12/arm64-dts-qcom-sa8775p-remove-extra-entries-from-the-iommus-property.patch create mode 100644 queue-6.12/arm64-dts-qcom-sm8350-fix-typo-in-pil_camera_mem-node.patch create mode 100644 queue-6.12/arm64-dts-qcom-sm8450-add-missing-properties-for-cryptobam.patch create mode 100644 queue-6.12/arm64-dts-qcom-sm8550-add-missing-properties-for-cryptobam.patch create mode 100644 queue-6.12/arm64-dts-qcom-sm8650-add-missing-properties-for-cryptobam.patch create mode 100644 queue-6.12/arm64-dts-qcom-x1e80100-asus-vivobook-s15-fix-vreg_l2j_1p2-voltage.patch create mode 100644 queue-6.12/arm64-dts-qcom-x1e80100-fix-video-thermal-zone.patch create mode 100644 queue-6.12/arm64-dts-qcom-x1e80100-lenovo-yoga-slim7x-fix-vreg_l2j_1p2-voltage.patch create mode 100644 queue-6.12/arm64-dts-qcom-x1e80100-qcp-fix-vreg_l2j_1p2-voltage.patch create mode 100644 queue-6.12/arm64-dts-qcom-x1e80100-qcp-mark-l12b-and-l15b-always-on.patch create mode 100644 queue-6.12/arm64-dts-qcom-x1e80100-yoga-slim7x-mark-l12b-and-l15b-always-on.patch create mode 100644 queue-6.12/arm64-dts-ti-k3-am62-main-set-emmc-clock-parent-to-default.patch create mode 100644 queue-6.12/arm64-dts-ti-k3-am62a-main-set-emmc-clock-parent-to-default.patch create mode 100644 queue-6.12/arm64-dts-ti-k3-am62p-j722s-common-main-set-emmc-clock-parent-to-default.patch create mode 100644 queue-6.12/arm64-dts-ti-k3-am62x-remove-clock-names-property-from-imx219-overlay.patch create mode 100644 queue-6.12/arm64-dts-ti-k3-am62x-rename-i2c-switch-to-i2c-mux-in-imx219-overlay.patch create mode 100644 queue-6.12/arm64-dts-ti-k3-am62x-rename-i2c-switch-to-i2c-mux-in-ov5640-overlay.patch create mode 100644 queue-6.12/arm64-dts-ti-k3-am65-main-add-missing-taps-to-sdhci0.patch create mode 100644 queue-6.12/arm64-dts-ti-k3-am68-sk-fix-regulator-hierarchy.patch create mode 100644 queue-6.12/arm64-dts-ti-k3-j721e-sk-add-dt-nodes-for-power-regulators.patch create mode 100644 queue-6.12/arm64-dts-ti-k3-j721e-sk-add-requiried-voltage-supplies-for-imx219.patch create mode 100644 queue-6.12/arm64-dts-ti-k3-j721e-sk-remove-clock-names-property-from-imx219-overlay.patch create mode 100644 queue-6.12/arm64-dts-ti-k3-j722s-evm-enable-serdes_wiz0-and-serdes_wiz1.patch create mode 100644 queue-6.12/arm64-dts-ti-k3-j722s-main-disable-serdes_wiz0-and-serdes_wiz1.patch create mode 100644 queue-6.12/arm64-dts-ti-k3-j784s4-j742s2-main-common-fix-length-of-serdes_ln_ctrl.patch create mode 100644 queue-6.12/net_sched-hfsc-address-reentrant-enqueue-adding-class-to-eltree-twice.patch create mode 100644 queue-6.12/perf-arm-cmn-add-cmn-s3-acpi-binding.patch create mode 100644 queue-6.12/perf-arm-cmn-fix-req2-snp2-mixup.patch create mode 100644 queue-6.12/perf-arm-cmn-initialise-cmn-cpu-earlier.patch diff --git a/queue-6.12/arm64-dts-qcom-ipq9574-add-missing-properties-for-cryptobam.patch b/queue-6.12/arm64-dts-qcom-ipq9574-add-missing-properties-for-cryptobam.patch new file mode 100644 index 0000000000..1abee0451f --- /dev/null +++ b/queue-6.12/arm64-dts-qcom-ipq9574-add-missing-properties-for-cryptobam.patch @@ -0,0 +1,43 @@ +From b4cd966edb2deb5c75fe356191422e127445b830 Mon Sep 17 00:00:00 2001 +From: Stephan Gerhold +Date: Wed, 12 Feb 2025 18:03:52 +0100 +Subject: arm64: dts: qcom: ipq9574: Add missing properties for cryptobam + +From: Stephan Gerhold + +commit b4cd966edb2deb5c75fe356191422e127445b830 upstream. + +num-channels and qcom,num-ees are required for BAM nodes without clock, +because the driver cannot ensure the hardware is powered on when trying to +obtain the information from the hardware registers. Specifying the node +without these properties is unsafe and has caused early boot crashes for +other SoCs before [1, 2]. + +Add the missing information from the hardware registers to ensure the +driver can probe successfully without causing crashes. + +[1]: https://lore.kernel.org/r/CY01EKQVWE36.B9X5TDXAREPF@fairphone.com/ +[2]: https://lore.kernel.org/r/20230626145959.646747-1-krzysztof.kozlowski@linaro.org/ + +Cc: stable@vger.kernel.org +Tested-by: Md Sadre Alam +Fixes: ffadc79ed99f ("arm64: dts: qcom: ipq9574: Enable crypto nodes") +Signed-off-by: Stephan Gerhold +Link: https://lore.kernel.org/r/20250212-bam-dma-fixes-v1-6-f560889e65d8@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/qcom/ipq9574.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi +@@ -261,6 +261,8 @@ + interrupts = ; + #dma-cells = <1>; + qcom,ee = <1>; ++ qcom,num-ees = <4>; ++ num-channels = <16>; + qcom,controlled-remotely; + }; + diff --git a/queue-6.12/arm64-dts-qcom-sa8775p-remove-cdsp-compute-cb-10.patch b/queue-6.12/arm64-dts-qcom-sa8775p-remove-cdsp-compute-cb-10.patch new file mode 100644 index 0000000000..f62255dc62 --- /dev/null +++ b/queue-6.12/arm64-dts-qcom-sa8775p-remove-cdsp-compute-cb-10.patch @@ -0,0 +1,40 @@ +From d180c2bd3b43d55f30c9b99de68bc6bb8420d1c1 Mon Sep 17 00:00:00 2001 +From: Karthik Sanagavarapu +Date: Tue, 11 Feb 2025 13:44:15 +0530 +Subject: arm64: dts: qcom: sa8775p: Remove cdsp compute-cb@10 + +From: Karthik Sanagavarapu + +commit d180c2bd3b43d55f30c9b99de68bc6bb8420d1c1 upstream. + +Remove the context bank compute-cb@10 because these SMMU ids are S2-only +which is not used for S1 transaction. + +Fixes: f7b01bfb4b47 ("arm64: qcom: sa8775p: Add ADSP and CDSP0 fastrpc nodes") +Cc: stable@kernel.org +Signed-off-by: Karthik Sanagavarapu +Signed-off-by: Ling Xu +Link: https://lore.kernel.org/r/4c9de858fda7848b77ea8c528c9b9d53600ad21a.1739260973.git.quic_lxu5@quicinc.com +Signed-off-by: Bjorn Andersson +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/qcom/sa8775p.dtsi | 8 -------- + 1 file changed, 8 deletions(-) + +--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi ++++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi +@@ -4080,14 +4080,6 @@ + dma-coherent; + }; + +- compute-cb@10 { +- compatible = "qcom,fastrpc-compute-cb"; +- reg = <10>; +- iommus = <&apps_smmu 0x214a 0x04a0>, +- <&apps_smmu 0x218a 0x0400>; +- dma-coherent; +- }; +- + compute-cb@11 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <11>; diff --git a/queue-6.12/arm64-dts-qcom-sa8775p-remove-extra-entries-from-the-iommus-property.patch b/queue-6.12/arm64-dts-qcom-sa8775p-remove-extra-entries-from-the-iommus-property.patch new file mode 100644 index 0000000000..0bb15b7bb0 --- /dev/null +++ b/queue-6.12/arm64-dts-qcom-sa8775p-remove-extra-entries-from-the-iommus-property.patch @@ -0,0 +1,433 @@ +From eb73f500548a3205741330cbd7d0e209a7a6a9af Mon Sep 17 00:00:00 2001 +From: Ling Xu +Date: Tue, 11 Feb 2025 13:44:14 +0530 +Subject: arm64: dts: qcom: sa8775p: Remove extra entries from the iommus property + +From: Ling Xu + +commit eb73f500548a3205741330cbd7d0e209a7a6a9af upstream. + +There are some items come out to be same value if we do SID & ~MASK. +Remove extra entries from the iommus property for sa8775p to simplify. + +Fixes: f7b01bfb4b47 ("arm64: qcom: sa8775p: Add ADSP and CDSP0 fastrpc nodes") +Cc: stable@kernel.org +Reviewed-by: Dmitry Baryshkov +Signed-off-by: Ling Xu +Link: https://lore.kernel.org/r/49f463415c8fa2b08fbc2317e31493362056f403.1739260973.git.quic_lxu5@quicinc.com +Signed-off-by: Bjorn Andersson +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/qcom/sa8775p.dtsi | 240 +++------------------------------- + 1 file changed, 24 insertions(+), 216 deletions(-) + +--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi ++++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi +@@ -4012,15 +4012,7 @@ + compatible = "qcom,fastrpc-compute-cb"; + reg = <1>; + iommus = <&apps_smmu 0x2141 0x04a0>, +- <&apps_smmu 0x2161 0x04a0>, +- <&apps_smmu 0x2181 0x0400>, +- <&apps_smmu 0x21c1 0x04a0>, +- <&apps_smmu 0x21e1 0x04a0>, +- <&apps_smmu 0x2541 0x04a0>, +- <&apps_smmu 0x2561 0x04a0>, +- <&apps_smmu 0x2581 0x0400>, +- <&apps_smmu 0x25c1 0x04a0>, +- <&apps_smmu 0x25e1 0x04a0>; ++ <&apps_smmu 0x2181 0x0400>; + dma-coherent; + }; + +@@ -4028,15 +4020,7 @@ + compatible = "qcom,fastrpc-compute-cb"; + reg = <2>; + iommus = <&apps_smmu 0x2142 0x04a0>, +- <&apps_smmu 0x2162 0x04a0>, +- <&apps_smmu 0x2182 0x0400>, +- <&apps_smmu 0x21c2 0x04a0>, +- <&apps_smmu 0x21e2 0x04a0>, +- <&apps_smmu 0x2542 0x04a0>, +- <&apps_smmu 0x2562 0x04a0>, +- <&apps_smmu 0x2582 0x0400>, +- <&apps_smmu 0x25c2 0x04a0>, +- <&apps_smmu 0x25e2 0x04a0>; ++ <&apps_smmu 0x2182 0x0400>; + dma-coherent; + }; + +@@ -4044,15 +4028,7 @@ + compatible = "qcom,fastrpc-compute-cb"; + reg = <3>; + iommus = <&apps_smmu 0x2143 0x04a0>, +- <&apps_smmu 0x2163 0x04a0>, +- <&apps_smmu 0x2183 0x0400>, +- <&apps_smmu 0x21c3 0x04a0>, +- <&apps_smmu 0x21e3 0x04a0>, +- <&apps_smmu 0x2543 0x04a0>, +- <&apps_smmu 0x2563 0x04a0>, +- <&apps_smmu 0x2583 0x0400>, +- <&apps_smmu 0x25c3 0x04a0>, +- <&apps_smmu 0x25e3 0x04a0>; ++ <&apps_smmu 0x2183 0x0400>; + dma-coherent; + }; + +@@ -4060,15 +4036,7 @@ + compatible = "qcom,fastrpc-compute-cb"; + reg = <4>; + iommus = <&apps_smmu 0x2144 0x04a0>, +- <&apps_smmu 0x2164 0x04a0>, +- <&apps_smmu 0x2184 0x0400>, +- <&apps_smmu 0x21c4 0x04a0>, +- <&apps_smmu 0x21e4 0x04a0>, +- <&apps_smmu 0x2544 0x04a0>, +- <&apps_smmu 0x2564 0x04a0>, +- <&apps_smmu 0x2584 0x0400>, +- <&apps_smmu 0x25c4 0x04a0>, +- <&apps_smmu 0x25e4 0x04a0>; ++ <&apps_smmu 0x2184 0x0400>; + dma-coherent; + }; + +@@ -4076,15 +4044,7 @@ + compatible = "qcom,fastrpc-compute-cb"; + reg = <5>; + iommus = <&apps_smmu 0x2145 0x04a0>, +- <&apps_smmu 0x2165 0x04a0>, +- <&apps_smmu 0x2185 0x0400>, +- <&apps_smmu 0x21c5 0x04a0>, +- <&apps_smmu 0x21e5 0x04a0>, +- <&apps_smmu 0x2545 0x04a0>, +- <&apps_smmu 0x2565 0x04a0>, +- <&apps_smmu 0x2585 0x0400>, +- <&apps_smmu 0x25c5 0x04a0>, +- <&apps_smmu 0x25e5 0x04a0>; ++ <&apps_smmu 0x2185 0x0400>; + dma-coherent; + }; + +@@ -4092,15 +4052,7 @@ + compatible = "qcom,fastrpc-compute-cb"; + reg = <6>; + iommus = <&apps_smmu 0x2146 0x04a0>, +- <&apps_smmu 0x2166 0x04a0>, +- <&apps_smmu 0x2186 0x0400>, +- <&apps_smmu 0x21c6 0x04a0>, +- <&apps_smmu 0x21e6 0x04a0>, +- <&apps_smmu 0x2546 0x04a0>, +- <&apps_smmu 0x2566 0x04a0>, +- <&apps_smmu 0x2586 0x0400>, +- <&apps_smmu 0x25c6 0x04a0>, +- <&apps_smmu 0x25e6 0x04a0>; ++ <&apps_smmu 0x2186 0x0400>; + dma-coherent; + }; + +@@ -4108,15 +4060,7 @@ + compatible = "qcom,fastrpc-compute-cb"; + reg = <7>; + iommus = <&apps_smmu 0x2147 0x04a0>, +- <&apps_smmu 0x2167 0x04a0>, +- <&apps_smmu 0x2187 0x0400>, +- <&apps_smmu 0x21c7 0x04a0>, +- <&apps_smmu 0x21e7 0x04a0>, +- <&apps_smmu 0x2547 0x04a0>, +- <&apps_smmu 0x2567 0x04a0>, +- <&apps_smmu 0x2587 0x0400>, +- <&apps_smmu 0x25c7 0x04a0>, +- <&apps_smmu 0x25e7 0x04a0>; ++ <&apps_smmu 0x2187 0x0400>; + dma-coherent; + }; + +@@ -4124,15 +4068,7 @@ + compatible = "qcom,fastrpc-compute-cb"; + reg = <8>; + iommus = <&apps_smmu 0x2148 0x04a0>, +- <&apps_smmu 0x2168 0x04a0>, +- <&apps_smmu 0x2188 0x0400>, +- <&apps_smmu 0x21c8 0x04a0>, +- <&apps_smmu 0x21e8 0x04a0>, +- <&apps_smmu 0x2548 0x04a0>, +- <&apps_smmu 0x2568 0x04a0>, +- <&apps_smmu 0x2588 0x0400>, +- <&apps_smmu 0x25c8 0x04a0>, +- <&apps_smmu 0x25e8 0x04a0>; ++ <&apps_smmu 0x2188 0x0400>; + dma-coherent; + }; + +@@ -4140,15 +4076,7 @@ + compatible = "qcom,fastrpc-compute-cb"; + reg = <9>; + iommus = <&apps_smmu 0x2149 0x04a0>, +- <&apps_smmu 0x2169 0x04a0>, +- <&apps_smmu 0x2189 0x0400>, +- <&apps_smmu 0x21c9 0x04a0>, +- <&apps_smmu 0x21e9 0x04a0>, +- <&apps_smmu 0x2549 0x04a0>, +- <&apps_smmu 0x2569 0x04a0>, +- <&apps_smmu 0x2589 0x0400>, +- <&apps_smmu 0x25c9 0x04a0>, +- <&apps_smmu 0x25e9 0x04a0>; ++ <&apps_smmu 0x2189 0x0400>; + dma-coherent; + }; + +@@ -4156,15 +4084,7 @@ + compatible = "qcom,fastrpc-compute-cb"; + reg = <10>; + iommus = <&apps_smmu 0x214a 0x04a0>, +- <&apps_smmu 0x216a 0x04a0>, +- <&apps_smmu 0x218a 0x0400>, +- <&apps_smmu 0x21ca 0x04a0>, +- <&apps_smmu 0x21ea 0x04a0>, +- <&apps_smmu 0x254a 0x04a0>, +- <&apps_smmu 0x256a 0x04a0>, +- <&apps_smmu 0x258a 0x0400>, +- <&apps_smmu 0x25ca 0x04a0>, +- <&apps_smmu 0x25ea 0x04a0>; ++ <&apps_smmu 0x218a 0x0400>; + dma-coherent; + }; + +@@ -4172,15 +4092,7 @@ + compatible = "qcom,fastrpc-compute-cb"; + reg = <11>; + iommus = <&apps_smmu 0x214b 0x04a0>, +- <&apps_smmu 0x216b 0x04a0>, +- <&apps_smmu 0x218b 0x0400>, +- <&apps_smmu 0x21cb 0x04a0>, +- <&apps_smmu 0x21eb 0x04a0>, +- <&apps_smmu 0x254b 0x04a0>, +- <&apps_smmu 0x256b 0x04a0>, +- <&apps_smmu 0x258b 0x0400>, +- <&apps_smmu 0x25cb 0x04a0>, +- <&apps_smmu 0x25eb 0x04a0>; ++ <&apps_smmu 0x218b 0x0400>; + dma-coherent; + }; + }; +@@ -4240,15 +4152,7 @@ + compatible = "qcom,fastrpc-compute-cb"; + reg = <1>; + iommus = <&apps_smmu 0x2941 0x04a0>, +- <&apps_smmu 0x2961 0x04a0>, +- <&apps_smmu 0x2981 0x0400>, +- <&apps_smmu 0x29c1 0x04a0>, +- <&apps_smmu 0x29e1 0x04a0>, +- <&apps_smmu 0x2d41 0x04a0>, +- <&apps_smmu 0x2d61 0x04a0>, +- <&apps_smmu 0x2d81 0x0400>, +- <&apps_smmu 0x2dc1 0x04a0>, +- <&apps_smmu 0x2de1 0x04a0>; ++ <&apps_smmu 0x2981 0x0400>; + dma-coherent; + }; + +@@ -4256,15 +4160,7 @@ + compatible = "qcom,fastrpc-compute-cb"; + reg = <2>; + iommus = <&apps_smmu 0x2942 0x04a0>, +- <&apps_smmu 0x2962 0x04a0>, +- <&apps_smmu 0x2982 0x0400>, +- <&apps_smmu 0x29c2 0x04a0>, +- <&apps_smmu 0x29e2 0x04a0>, +- <&apps_smmu 0x2d42 0x04a0>, +- <&apps_smmu 0x2d62 0x04a0>, +- <&apps_smmu 0x2d82 0x0400>, +- <&apps_smmu 0x2dc2 0x04a0>, +- <&apps_smmu 0x2de2 0x04a0>; ++ <&apps_smmu 0x2982 0x0400>; + dma-coherent; + }; + +@@ -4272,15 +4168,7 @@ + compatible = "qcom,fastrpc-compute-cb"; + reg = <3>; + iommus = <&apps_smmu 0x2943 0x04a0>, +- <&apps_smmu 0x2963 0x04a0>, +- <&apps_smmu 0x2983 0x0400>, +- <&apps_smmu 0x29c3 0x04a0>, +- <&apps_smmu 0x29e3 0x04a0>, +- <&apps_smmu 0x2d43 0x04a0>, +- <&apps_smmu 0x2d63 0x04a0>, +- <&apps_smmu 0x2d83 0x0400>, +- <&apps_smmu 0x2dc3 0x04a0>, +- <&apps_smmu 0x2de3 0x04a0>; ++ <&apps_smmu 0x2983 0x0400>; + dma-coherent; + }; + +@@ -4288,15 +4176,7 @@ + compatible = "qcom,fastrpc-compute-cb"; + reg = <4>; + iommus = <&apps_smmu 0x2944 0x04a0>, +- <&apps_smmu 0x2964 0x04a0>, +- <&apps_smmu 0x2984 0x0400>, +- <&apps_smmu 0x29c4 0x04a0>, +- <&apps_smmu 0x29e4 0x04a0>, +- <&apps_smmu 0x2d44 0x04a0>, +- <&apps_smmu 0x2d64 0x04a0>, +- <&apps_smmu 0x2d84 0x0400>, +- <&apps_smmu 0x2dc4 0x04a0>, +- <&apps_smmu 0x2de4 0x04a0>; ++ <&apps_smmu 0x2984 0x0400>; + dma-coherent; + }; + +@@ -4304,15 +4184,7 @@ + compatible = "qcom,fastrpc-compute-cb"; + reg = <5>; + iommus = <&apps_smmu 0x2945 0x04a0>, +- <&apps_smmu 0x2965 0x04a0>, +- <&apps_smmu 0x2985 0x0400>, +- <&apps_smmu 0x29c5 0x04a0>, +- <&apps_smmu 0x29e5 0x04a0>, +- <&apps_smmu 0x2d45 0x04a0>, +- <&apps_smmu 0x2d65 0x04a0>, +- <&apps_smmu 0x2d85 0x0400>, +- <&apps_smmu 0x2dc5 0x04a0>, +- <&apps_smmu 0x2de5 0x04a0>; ++ <&apps_smmu 0x2985 0x0400>; + dma-coherent; + }; + +@@ -4320,15 +4192,7 @@ + compatible = "qcom,fastrpc-compute-cb"; + reg = <6>; + iommus = <&apps_smmu 0x2946 0x04a0>, +- <&apps_smmu 0x2966 0x04a0>, +- <&apps_smmu 0x2986 0x0400>, +- <&apps_smmu 0x29c6 0x04a0>, +- <&apps_smmu 0x29e6 0x04a0>, +- <&apps_smmu 0x2d46 0x04a0>, +- <&apps_smmu 0x2d66 0x04a0>, +- <&apps_smmu 0x2d86 0x0400>, +- <&apps_smmu 0x2dc6 0x04a0>, +- <&apps_smmu 0x2de6 0x04a0>; ++ <&apps_smmu 0x2986 0x0400>; + dma-coherent; + }; + +@@ -4336,15 +4200,7 @@ + compatible = "qcom,fastrpc-compute-cb"; + reg = <7>; + iommus = <&apps_smmu 0x2947 0x04a0>, +- <&apps_smmu 0x2967 0x04a0>, +- <&apps_smmu 0x2987 0x0400>, +- <&apps_smmu 0x29c7 0x04a0>, +- <&apps_smmu 0x29e7 0x04a0>, +- <&apps_smmu 0x2d47 0x04a0>, +- <&apps_smmu 0x2d67 0x04a0>, +- <&apps_smmu 0x2d87 0x0400>, +- <&apps_smmu 0x2dc7 0x04a0>, +- <&apps_smmu 0x2de7 0x04a0>; ++ <&apps_smmu 0x2987 0x0400>; + dma-coherent; + }; + +@@ -4352,15 +4208,7 @@ + compatible = "qcom,fastrpc-compute-cb"; + reg = <8>; + iommus = <&apps_smmu 0x2948 0x04a0>, +- <&apps_smmu 0x2968 0x04a0>, +- <&apps_smmu 0x2988 0x0400>, +- <&apps_smmu 0x29c8 0x04a0>, +- <&apps_smmu 0x29e8 0x04a0>, +- <&apps_smmu 0x2d48 0x04a0>, +- <&apps_smmu 0x2d68 0x04a0>, +- <&apps_smmu 0x2d88 0x0400>, +- <&apps_smmu 0x2dc8 0x04a0>, +- <&apps_smmu 0x2de8 0x04a0>; ++ <&apps_smmu 0x2988 0x0400>; + dma-coherent; + }; + +@@ -4368,15 +4216,7 @@ + compatible = "qcom,fastrpc-compute-cb"; + reg = <9>; + iommus = <&apps_smmu 0x2949 0x04a0>, +- <&apps_smmu 0x2969 0x04a0>, +- <&apps_smmu 0x2989 0x0400>, +- <&apps_smmu 0x29c9 0x04a0>, +- <&apps_smmu 0x29e9 0x04a0>, +- <&apps_smmu 0x2d49 0x04a0>, +- <&apps_smmu 0x2d69 0x04a0>, +- <&apps_smmu 0x2d89 0x0400>, +- <&apps_smmu 0x2dc9 0x04a0>, +- <&apps_smmu 0x2de9 0x04a0>; ++ <&apps_smmu 0x2989 0x0400>; + dma-coherent; + }; + +@@ -4384,15 +4224,7 @@ + compatible = "qcom,fastrpc-compute-cb"; + reg = <10>; + iommus = <&apps_smmu 0x294a 0x04a0>, +- <&apps_smmu 0x296a 0x04a0>, +- <&apps_smmu 0x298a 0x0400>, +- <&apps_smmu 0x29ca 0x04a0>, +- <&apps_smmu 0x29ea 0x04a0>, +- <&apps_smmu 0x2d4a 0x04a0>, +- <&apps_smmu 0x2d6a 0x04a0>, +- <&apps_smmu 0x2d8a 0x0400>, +- <&apps_smmu 0x2dca 0x04a0>, +- <&apps_smmu 0x2dea 0x04a0>; ++ <&apps_smmu 0x298a 0x0400>; + dma-coherent; + }; + +@@ -4400,15 +4232,7 @@ + compatible = "qcom,fastrpc-compute-cb"; + reg = <11>; + iommus = <&apps_smmu 0x294b 0x04a0>, +- <&apps_smmu 0x296b 0x04a0>, +- <&apps_smmu 0x298b 0x0400>, +- <&apps_smmu 0x29cb 0x04a0>, +- <&apps_smmu 0x29eb 0x04a0>, +- <&apps_smmu 0x2d4b 0x04a0>, +- <&apps_smmu 0x2d6b 0x04a0>, +- <&apps_smmu 0x2d8b 0x0400>, +- <&apps_smmu 0x2dcb 0x04a0>, +- <&apps_smmu 0x2deb 0x04a0>; ++ <&apps_smmu 0x298b 0x0400>; + dma-coherent; + }; + +@@ -4416,15 +4240,7 @@ + compatible = "qcom,fastrpc-compute-cb"; + reg = <12>; + iommus = <&apps_smmu 0x294c 0x04a0>, +- <&apps_smmu 0x296c 0x04a0>, +- <&apps_smmu 0x298c 0x0400>, +- <&apps_smmu 0x29cc 0x04a0>, +- <&apps_smmu 0x29ec 0x04a0>, +- <&apps_smmu 0x2d4c 0x04a0>, +- <&apps_smmu 0x2d6c 0x04a0>, +- <&apps_smmu 0x2d8c 0x0400>, +- <&apps_smmu 0x2dcc 0x04a0>, +- <&apps_smmu 0x2dec 0x04a0>; ++ <&apps_smmu 0x298c 0x0400>; + dma-coherent; + }; + +@@ -4432,15 +4248,7 @@ + compatible = "qcom,fastrpc-compute-cb"; + reg = <13>; + iommus = <&apps_smmu 0x294d 0x04a0>, +- <&apps_smmu 0x296d 0x04a0>, +- <&apps_smmu 0x298d 0x0400>, +- <&apps_smmu 0x29Cd 0x04a0>, +- <&apps_smmu 0x29ed 0x04a0>, +- <&apps_smmu 0x2d4d 0x04a0>, +- <&apps_smmu 0x2d6d 0x04a0>, +- <&apps_smmu 0x2d8d 0x0400>, +- <&apps_smmu 0x2dcd 0x04a0>, +- <&apps_smmu 0x2ded 0x04a0>; ++ <&apps_smmu 0x298d 0x0400>; + dma-coherent; + }; + }; diff --git a/queue-6.12/arm64-dts-qcom-sm8350-fix-typo-in-pil_camera_mem-node.patch b/queue-6.12/arm64-dts-qcom-sm8350-fix-typo-in-pil_camera_mem-node.patch new file mode 100644 index 0000000000..4fedb91b89 --- /dev/null +++ b/queue-6.12/arm64-dts-qcom-sm8350-fix-typo-in-pil_camera_mem-node.patch @@ -0,0 +1,34 @@ +From 295217420a44403a33c30f99d8337fe7b07eb02b Mon Sep 17 00:00:00 2001 +From: Alok Tiwari +Date: Wed, 14 May 2025 04:46:51 -0700 +Subject: arm64: dts: qcom: sm8350: Fix typo in pil_camera_mem node + +From: Alok Tiwari + +commit 295217420a44403a33c30f99d8337fe7b07eb02b upstream. + +There is a typo in sm8350.dts where the node label +mmeory@85200000 should be memory@85200000. +This patch corrects the typo for clarity and consistency. + +Fixes: b7e8f433a673 ("arm64: dts: qcom: Add basic devicetree support for SM8350 SoC") +Cc: stable@vger.kernel.org +Signed-off-by: Alok Tiwari +Link: https://lore.kernel.org/r/20250514114656.2307828-1-alok.a.tiwari@oracle.com +Signed-off-by: Bjorn Andersson +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi +@@ -455,7 +455,7 @@ + no-map; + }; + +- pil_camera_mem: mmeory@85200000 { ++ pil_camera_mem: memory@85200000 { + reg = <0x0 0x85200000 0x0 0x500000>; + no-map; + }; diff --git a/queue-6.12/arm64-dts-qcom-sm8450-add-missing-properties-for-cryptobam.patch b/queue-6.12/arm64-dts-qcom-sm8450-add-missing-properties-for-cryptobam.patch new file mode 100644 index 0000000000..2dd11e89a9 --- /dev/null +++ b/queue-6.12/arm64-dts-qcom-sm8450-add-missing-properties-for-cryptobam.patch @@ -0,0 +1,42 @@ +From 0fe6357229cb15a64b6413c62f1c3d4de68ce55f Mon Sep 17 00:00:00 2001 +From: Stephan Gerhold +Date: Wed, 12 Feb 2025 18:03:48 +0100 +Subject: arm64: dts: qcom: sm8450: Add missing properties for cryptobam + +From: Stephan Gerhold + +commit 0fe6357229cb15a64b6413c62f1c3d4de68ce55f upstream. + +num-channels and qcom,num-ees are required for BAM nodes without clock, +because the driver cannot ensure the hardware is powered on when trying to +obtain the information from the hardware registers. Specifying the node +without these properties is unsafe and has caused early boot crashes for +other SoCs before [1, 2]. + +Add the missing information from the hardware registers to ensure the +driver can probe successfully without causing crashes. + +[1]: https://lore.kernel.org/r/CY01EKQVWE36.B9X5TDXAREPF@fairphone.com/ +[2]: https://lore.kernel.org/r/20230626145959.646747-1-krzysztof.kozlowski@linaro.org/ + +Cc: stable@vger.kernel.org +Fixes: b92b0d2f7582 ("arm64: dts: qcom: sm8450: add crypto nodes") +Signed-off-by: Stephan Gerhold +Link: https://lore.kernel.org/r/20250212-bam-dma-fixes-v1-2-f560889e65d8@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/qcom/sm8450.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi +@@ -4553,6 +4553,8 @@ + interrupts = ; + #dma-cells = <1>; + qcom,ee = <0>; ++ qcom,num-ees = <4>; ++ num-channels = <16>; + qcom,controlled-remotely; + iommus = <&apps_smmu 0x584 0x11>, + <&apps_smmu 0x588 0x0>, diff --git a/queue-6.12/arm64-dts-qcom-sm8550-add-missing-properties-for-cryptobam.patch b/queue-6.12/arm64-dts-qcom-sm8550-add-missing-properties-for-cryptobam.patch new file mode 100644 index 0000000000..b970a55da9 --- /dev/null +++ b/queue-6.12/arm64-dts-qcom-sm8550-add-missing-properties-for-cryptobam.patch @@ -0,0 +1,42 @@ +From 663cd2cad36da23cf1a3db7868fce9f1a19b2d61 Mon Sep 17 00:00:00 2001 +From: Stephan Gerhold +Date: Wed, 12 Feb 2025 18:03:49 +0100 +Subject: arm64: dts: qcom: sm8550: Add missing properties for cryptobam + +From: Stephan Gerhold + +commit 663cd2cad36da23cf1a3db7868fce9f1a19b2d61 upstream. + +num-channels and qcom,num-ees are required for BAM nodes without clock, +because the driver cannot ensure the hardware is powered on when trying to +obtain the information from the hardware registers. Specifying the node +without these properties is unsafe and has caused early boot crashes for +other SoCs before [1, 2]. + +Add the missing information from the hardware registers to ensure the +driver can probe successfully without causing crashes. + +[1]: https://lore.kernel.org/r/CY01EKQVWE36.B9X5TDXAREPF@fairphone.com/ +[2]: https://lore.kernel.org/r/20230626145959.646747-1-krzysztof.kozlowski@linaro.org/ + +Cc: stable@vger.kernel.org +Fixes: 433477c3bf0b ("arm64: dts: qcom: sm8550: add QCrypto nodes") +Signed-off-by: Stephan Gerhold +Link: https://lore.kernel.org/r/20250212-bam-dma-fixes-v1-3-f560889e65d8@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi +@@ -1952,6 +1952,8 @@ + interrupts = ; + #dma-cells = <1>; + qcom,ee = <0>; ++ qcom,num-ees = <4>; ++ num-channels = <20>; + qcom,controlled-remotely; + iommus = <&apps_smmu 0x480 0x0>, + <&apps_smmu 0x481 0x0>; diff --git a/queue-6.12/arm64-dts-qcom-sm8650-add-missing-properties-for-cryptobam.patch b/queue-6.12/arm64-dts-qcom-sm8650-add-missing-properties-for-cryptobam.patch new file mode 100644 index 0000000000..b82e1dacd4 --- /dev/null +++ b/queue-6.12/arm64-dts-qcom-sm8650-add-missing-properties-for-cryptobam.patch @@ -0,0 +1,42 @@ +From 38b88722bce07b6a5927f45fbf7a9a85e834572c Mon Sep 17 00:00:00 2001 +From: Stephan Gerhold +Date: Wed, 12 Feb 2025 18:03:50 +0100 +Subject: arm64: dts: qcom: sm8650: Add missing properties for cryptobam + +From: Stephan Gerhold + +commit 38b88722bce07b6a5927f45fbf7a9a85e834572c upstream. + +num-channels and qcom,num-ees are required for BAM nodes without clock, +because the driver cannot ensure the hardware is powered on when trying to +obtain the information from the hardware registers. Specifying the node +without these properties is unsafe and has caused early boot crashes for +other SoCs before [1, 2]. + +Add the missing information from the hardware registers to ensure the +driver can probe successfully without causing crashes. + +[1]: https://lore.kernel.org/r/CY01EKQVWE36.B9X5TDXAREPF@fairphone.com/ +[2]: https://lore.kernel.org/r/20230626145959.646747-1-krzysztof.kozlowski@linaro.org/ + +Cc: stable@vger.kernel.org +Fixes: 10e024671295 ("arm64: dts: qcom: sm8650: add interconnect dependent device nodes") +Signed-off-by: Stephan Gerhold +Link: https://lore.kernel.org/r/20250212-bam-dma-fixes-v1-4-f560889e65d8@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/qcom/sm8650.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi +@@ -2495,6 +2495,8 @@ + <&apps_smmu 0x481 0>; + + qcom,ee = <0>; ++ qcom,num-ees = <4>; ++ num-channels = <20>; + qcom,controlled-remotely; + }; + diff --git a/queue-6.12/arm64-dts-qcom-x1e80100-asus-vivobook-s15-fix-vreg_l2j_1p2-voltage.patch b/queue-6.12/arm64-dts-qcom-x1e80100-asus-vivobook-s15-fix-vreg_l2j_1p2-voltage.patch new file mode 100644 index 0000000000..22773756d6 --- /dev/null +++ b/queue-6.12/arm64-dts-qcom-x1e80100-asus-vivobook-s15-fix-vreg_l2j_1p2-voltage.patch @@ -0,0 +1,39 @@ +From 0fb9ecf8713a7a458f7378c86e0703467db2ad22 Mon Sep 17 00:00:00 2001 +From: Stephan Gerhold +Date: Wed, 23 Apr 2025 09:30:09 +0200 +Subject: arm64: dts: qcom: x1e80100-asus-vivobook-s15: Fix vreg_l2j_1p2 voltage + +From: Stephan Gerhold + +commit 0fb9ecf8713a7a458f7378c86e0703467db2ad22 upstream. + +In the ACPI DSDT table, PPP_RESOURCE_ID_LDO2_J is configured with 1256000 +uV instead of the 1200000 uV we have currently in the device tree. Use the +same for consistency and correctness. + +Cc: stable@vger.kernel.org +Fixes: d0e2f8f62dff ("arm64: dts: qcom: Add device tree for ASUS Vivobook S 15") +Signed-off-by: Stephan Gerhold +Reviewed-by: Johan Hovold +Reviewed-by: Abel Vesa +Reviewed-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20250423-x1e-vreg-l2j-voltage-v1-3-24b6a2043025@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts ++++ b/arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts +@@ -314,8 +314,8 @@ + + vreg_l2j_1p2: ldo2 { + regulator-name = "vreg_l2j_1p2"; +- regulator-min-microvolt = <1200000>; +- regulator-max-microvolt = <1200000>; ++ regulator-min-microvolt = <1256000>; ++ regulator-max-microvolt = <1256000>; + regulator-initial-mode = ; + }; + diff --git a/queue-6.12/arm64-dts-qcom-x1e80100-fix-video-thermal-zone.patch b/queue-6.12/arm64-dts-qcom-x1e80100-fix-video-thermal-zone.patch new file mode 100644 index 0000000000..96f71b5a19 --- /dev/null +++ b/queue-6.12/arm64-dts-qcom-x1e80100-fix-video-thermal-zone.patch @@ -0,0 +1,56 @@ +From 801befff4c827aa72e3698367c5afc18987a6a3f Mon Sep 17 00:00:00 2001 +From: Stephan Gerhold +Date: Wed, 19 Feb 2025 12:36:18 +0100 +Subject: arm64: dts: qcom: x1e80100: Fix video thermal zone +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Stephan Gerhold + +commit 801befff4c827aa72e3698367c5afc18987a6a3f upstream. + +A passive trip point at 125°C is pretty high, this is usually the +temperature for the critical shutdown trip point. Also, we don't have any +passive cooling devices attached to the video thermal zone. + +Change this to be a critical trip point, and add a "hot" trip point at +90°C for consistency with the other thermal zones. + +Cc: stable@vger.kernel.org +Fixes: 4e915987ff5b ("arm64: dts: qcom: x1e80100: Enable tsens and thermal zone nodes") +Signed-off-by: Stephan Gerhold +Reviewed-by: Johan Hovold +Reviewed-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20250219-x1e80100-thermal-fixes-v1-1-d110e44ac3f9@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/qcom/x1e80100.dtsi | 10 +++++++--- + 1 file changed, 7 insertions(+), 3 deletions(-) + +--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi ++++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi +@@ -6682,15 +6682,19 @@ + }; + + video-thermal { +- polling-delay-passive = <250>; +- + thermal-sensors = <&tsens0 12>; + + trips { + trip-point0 { ++ temperature = <90000>; ++ hysteresis = <2000>; ++ type = "hot"; ++ }; ++ ++ video-critical { + temperature = <125000>; + hysteresis = <1000>; +- type = "passive"; ++ type = "critical"; + }; + }; + }; diff --git a/queue-6.12/arm64-dts-qcom-x1e80100-lenovo-yoga-slim7x-fix-vreg_l2j_1p2-voltage.patch b/queue-6.12/arm64-dts-qcom-x1e80100-lenovo-yoga-slim7x-fix-vreg_l2j_1p2-voltage.patch new file mode 100644 index 0000000000..f98fdc2c9d --- /dev/null +++ b/queue-6.12/arm64-dts-qcom-x1e80100-lenovo-yoga-slim7x-fix-vreg_l2j_1p2-voltage.patch @@ -0,0 +1,39 @@ +From 4f27ede34ca3369cdcde80c5a4ca84cdb28edbbb Mon Sep 17 00:00:00 2001 +From: Stephan Gerhold +Date: Wed, 23 Apr 2025 09:30:11 +0200 +Subject: arm64: dts: qcom: x1e80100-lenovo-yoga-slim7x: Fix vreg_l2j_1p2 voltage + +From: Stephan Gerhold + +commit 4f27ede34ca3369cdcde80c5a4ca84cdb28edbbb upstream. + +In the ACPI DSDT table, PPP_RESOURCE_ID_LDO2_J is configured with 1256000 +uV instead of the 1200000 uV we have currently in the device tree. Use the +same for consistency and correctness. + +Cc: stable@vger.kernel.org +Fixes: 45247fe17db2 ("arm64: dts: qcom: x1e80100: add Lenovo Thinkpad Yoga slim 7x devicetree") +Signed-off-by: Stephan Gerhold +Reviewed-by: Johan Hovold +Reviewed-by: Abel Vesa +Reviewed-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20250423-x1e-vreg-l2j-voltage-v1-5-24b6a2043025@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts ++++ b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts +@@ -484,8 +484,8 @@ + + vreg_l2j_1p2: ldo2 { + regulator-name = "vreg_l2j_1p2"; +- regulator-min-microvolt = <1200000>; +- regulator-max-microvolt = <1200000>; ++ regulator-min-microvolt = <1256000>; ++ regulator-max-microvolt = <1256000>; + regulator-initial-mode = ; + }; + diff --git a/queue-6.12/arm64-dts-qcom-x1e80100-qcp-fix-vreg_l2j_1p2-voltage.patch b/queue-6.12/arm64-dts-qcom-x1e80100-qcp-fix-vreg_l2j_1p2-voltage.patch new file mode 100644 index 0000000000..e7fb275d25 --- /dev/null +++ b/queue-6.12/arm64-dts-qcom-x1e80100-qcp-fix-vreg_l2j_1p2-voltage.patch @@ -0,0 +1,39 @@ +From efdbeae860bf0278b050c6c9ad5921afba4596d0 Mon Sep 17 00:00:00 2001 +From: Stephan Gerhold +Date: Wed, 23 Apr 2025 09:30:12 +0200 +Subject: arm64: dts: qcom: x1e80100-qcp: Fix vreg_l2j_1p2 voltage + +From: Stephan Gerhold + +commit efdbeae860bf0278b050c6c9ad5921afba4596d0 upstream. + +In the ACPI DSDT table, PPP_RESOURCE_ID_LDO2_J is configured with 1256000 +uV instead of the 1200000 uV we have currently in the device tree. Use the +same for consistency and correctness. + +Cc: stable@vger.kernel.org +Fixes: af16b00578a7 ("arm64: dts: qcom: Add base X1E80100 dtsi and the QCP dts") +Signed-off-by: Stephan Gerhold +Reviewed-by: Johan Hovold +Reviewed-by: Abel Vesa +Reviewed-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20250423-x1e-vreg-l2j-voltage-v1-6-24b6a2043025@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts ++++ b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts +@@ -594,8 +594,8 @@ + + vreg_l2j_1p2: ldo2 { + regulator-name = "vreg_l2j_1p2"; +- regulator-min-microvolt = <1200000>; +- regulator-max-microvolt = <1200000>; ++ regulator-min-microvolt = <1256000>; ++ regulator-max-microvolt = <1256000>; + regulator-initial-mode = ; + }; + diff --git a/queue-6.12/arm64-dts-qcom-x1e80100-qcp-mark-l12b-and-l15b-always-on.patch b/queue-6.12/arm64-dts-qcom-x1e80100-qcp-mark-l12b-and-l15b-always-on.patch new file mode 100644 index 0000000000..7c3f4e1711 --- /dev/null +++ b/queue-6.12/arm64-dts-qcom-x1e80100-qcp-mark-l12b-and-l15b-always-on.patch @@ -0,0 +1,45 @@ +From ff6ba96378367133b66587bd3ee9f068a39ff3a9 Mon Sep 17 00:00:00 2001 +From: Johan Hovold +Date: Fri, 14 Mar 2025 15:54:39 +0100 +Subject: arm64: dts: qcom: x1e80100-qcp: mark l12b and l15b always-on + +From: Johan Hovold + +commit ff6ba96378367133b66587bd3ee9f068a39ff3a9 upstream. + +The l12b and l15b supplies are used by components that are not (fully) +described (and some never will be) and must never be disabled. + +Mark the regulators as always-on to prevent them from being disabled, +for example, when consumers probe defer or suspend. + +Fixes: af16b00578a7 ("arm64: dts: qcom: Add base X1E80100 dtsi and the QCP dts") +Cc: stable@vger.kernel.org # 6.8 +Cc: Rajendra Nayak +Reviewed-by: Konrad Dybcio +Signed-off-by: Johan Hovold +Link: https://lore.kernel.org/r/20250314145440.11371-8-johan+linaro@kernel.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts ++++ b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts +@@ -356,6 +356,7 @@ + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; ++ regulator-always-on; + }; + + vreg_l13b_3p0: ldo13 { +@@ -377,6 +378,7 @@ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; ++ regulator-always-on; + }; + + vreg_l16b_2p9: ldo16 { diff --git a/queue-6.12/arm64-dts-qcom-x1e80100-yoga-slim7x-mark-l12b-and-l15b-always-on.patch b/queue-6.12/arm64-dts-qcom-x1e80100-yoga-slim7x-mark-l12b-and-l15b-always-on.patch new file mode 100644 index 0000000000..4855469766 --- /dev/null +++ b/queue-6.12/arm64-dts-qcom-x1e80100-yoga-slim7x-mark-l12b-and-l15b-always-on.patch @@ -0,0 +1,47 @@ +From f43a71dc6d8d8378af587675eec77c06e0298c79 Mon Sep 17 00:00:00 2001 +From: Johan Hovold +Date: Fri, 14 Mar 2025 15:54:38 +0100 +Subject: arm64: dts: qcom: x1e80100-yoga-slim7x: mark l12b and l15b always-on + +From: Johan Hovold + +commit f43a71dc6d8d8378af587675eec77c06e0298c79 upstream. + +The l12b and l15b supplies are used by components that are not (fully) +described (and some never will be) and must never be disabled. + +Mark the regulators as always-on to prevent them from being disabled, +for example, when consumers probe defer or suspend. + +Fixes: 45247fe17db2 ("arm64: dts: qcom: x1e80100: add Lenovo Thinkpad Yoga slim 7x devicetree") +Cc: stable@vger.kernel.org # 6.11 +Cc: Srinivas Kandagatla +Reviewed-by: Konrad Dybcio +Signed-off-by: Johan Hovold +Link: https://lore.kernel.org/r/20250314145440.11371-7-johan+linaro@kernel.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts ++++ b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts +@@ -266,6 +266,7 @@ + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; ++ regulator-always-on; + }; + + vreg_l14b_3p0: ldo14 { +@@ -280,8 +281,8 @@ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; ++ regulator-always-on; + }; +- + }; + + regulators-1 { diff --git a/queue-6.12/arm64-dts-ti-k3-am62-main-set-emmc-clock-parent-to-default.patch b/queue-6.12/arm64-dts-ti-k3-am62-main-set-emmc-clock-parent-to-default.patch new file mode 100644 index 0000000000..bbae9b15ba --- /dev/null +++ b/queue-6.12/arm64-dts-ti-k3-am62-main-set-emmc-clock-parent-to-default.patch @@ -0,0 +1,37 @@ +From 3a71cdfec94436079513d9adf4b1d4f7a7edd917 Mon Sep 17 00:00:00 2001 +From: Judith Mendez +Date: Tue, 29 Apr 2025 11:33:35 -0500 +Subject: arm64: dts: ti: k3-am62-main: Set eMMC clock parent to default + +From: Judith Mendez + +commit 3a71cdfec94436079513d9adf4b1d4f7a7edd917 upstream. + +Set eMMC clock parents to the defaults which is MAIN_PLL0_HSDIV5_CLKOUT +for eMMC. This change is necessary since DM is not implementing the +correct procedure to switch PLL clock source for eMMC and MMC CLK mux is +not glich-free. As a preventative action, lets switch back to the defaults. + +Fixes: c37c58fdeb8a ("arm64: dts: ti: k3-am62: Add more peripheral nodes") +Cc: stable@vger.kernel.org +Signed-off-by: Judith Mendez +Acked-by: Udit Kumar +Acked-by: Bryan Brattlof +Link: https://lore.kernel.org/r/20250429163337.15634-2-jm@ti.com +Signed-off-by: Nishanth Menon +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 2 -- + 1 file changed, 2 deletions(-) + +--- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +@@ -552,8 +552,6 @@ + power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 57 5>, <&k3_clks 57 6>; + clock-names = "clk_ahb", "clk_xin"; +- assigned-clocks = <&k3_clks 57 6>; +- assigned-clock-parents = <&k3_clks 57 8>; + bus-width = <8>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; diff --git a/queue-6.12/arm64-dts-ti-k3-am62a-main-set-emmc-clock-parent-to-default.patch b/queue-6.12/arm64-dts-ti-k3-am62a-main-set-emmc-clock-parent-to-default.patch new file mode 100644 index 0000000000..a5d9340cd7 --- /dev/null +++ b/queue-6.12/arm64-dts-ti-k3-am62a-main-set-emmc-clock-parent-to-default.patch @@ -0,0 +1,37 @@ +From 6af731c5de59cc4e7cce193d446f1fe872ac711b Mon Sep 17 00:00:00 2001 +From: Judith Mendez +Date: Tue, 29 Apr 2025 11:33:36 -0500 +Subject: arm64: dts: ti: k3-am62a-main: Set eMMC clock parent to default + +From: Judith Mendez + +commit 6af731c5de59cc4e7cce193d446f1fe872ac711b upstream. + +Set eMMC clock parents to the defaults which is MAIN_PLL0_HSDIV5_CLKOUT +for eMMC. This change is necessary since DM is not implementing the +correct procedure to switch PLL clock source for eMMC and MMC CLK mux is +not glich-free. As a preventative action, lets switch back to the defaults. + +Fixes: d3ae4e8d8b6a ("arm64: dts: ti: k3-am62a-main: Add sdhci0 instance") +Cc: stable@vger.kernel.org +Signed-off-by: Judith Mendez +Acked-by: Udit Kumar +Acked-by: Bryan Brattlof +Link: https://lore.kernel.org/r/20250429163337.15634-3-jm@ti.com +Signed-off-by: Nishanth Menon +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 2 -- + 1 file changed, 2 deletions(-) + +--- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +@@ -575,8 +575,6 @@ + power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 57 5>, <&k3_clks 57 6>; + clock-names = "clk_ahb", "clk_xin"; +- assigned-clocks = <&k3_clks 57 6>; +- assigned-clock-parents = <&k3_clks 57 8>; + bus-width = <8>; + mmc-hs200-1_8v; + ti,clkbuf-sel = <0x7>; diff --git a/queue-6.12/arm64-dts-ti-k3-am62p-j722s-common-main-set-emmc-clock-parent-to-default.patch b/queue-6.12/arm64-dts-ti-k3-am62p-j722s-common-main-set-emmc-clock-parent-to-default.patch new file mode 100644 index 0000000000..536f3ae626 --- /dev/null +++ b/queue-6.12/arm64-dts-ti-k3-am62p-j722s-common-main-set-emmc-clock-parent-to-default.patch @@ -0,0 +1,37 @@ +From 9c6b73fc72e19c449147233587833ce20f84b660 Mon Sep 17 00:00:00 2001 +From: Judith Mendez +Date: Tue, 29 Apr 2025 11:33:37 -0500 +Subject: arm64: dts: ti: k3-am62p-j722s-common-main: Set eMMC clock parent to default + +From: Judith Mendez + +commit 9c6b73fc72e19c449147233587833ce20f84b660 upstream. + +Set eMMC clock parents to the defaults which is MAIN_PLL0_HSDIV5_CLKOUT +for eMMC. This change is necessary since DM is not implementing the +correct procedure to switch PLL clock source for eMMC and MMC CLK mux is +not glich-free. As a preventative action, lets switch back to the defaults. + +Fixes: b5080c7c1f7e ("arm64: dts: ti: k3-am62p: Add nodes for more IPs") +Cc: stable@vger.kernel.org +Signed-off-by: Judith Mendez +Acked-by: Udit Kumar +Acked-by: Bryan Brattlof +Link: https://lore.kernel.org/r/20250429163337.15634-4-jm@ti.com +Signed-off-by: Nishanth Menon +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi | 2 -- + 1 file changed, 2 deletions(-) + +--- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi +@@ -564,8 +564,6 @@ + power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 57 1>, <&k3_clks 57 2>; + clock-names = "clk_ahb", "clk_xin"; +- assigned-clocks = <&k3_clks 57 2>; +- assigned-clock-parents = <&k3_clks 57 4>; + bus-width = <8>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; diff --git a/queue-6.12/arm64-dts-ti-k3-am62x-remove-clock-names-property-from-imx219-overlay.patch b/queue-6.12/arm64-dts-ti-k3-am62x-remove-clock-names-property-from-imx219-overlay.patch new file mode 100644 index 0000000000..d7c21bdc6d --- /dev/null +++ b/queue-6.12/arm64-dts-ti-k3-am62x-remove-clock-names-property-from-imx219-overlay.patch @@ -0,0 +1,35 @@ +From c68ab54a89a8c935732589a35ea2596e2329f167 Mon Sep 17 00:00:00 2001 +From: Yemike Abhilash Chandra +Date: Tue, 15 Apr 2025 16:43:26 +0530 +Subject: arm64: dts: ti: k3-am62x: Remove clock-names property from IMX219 overlay + +From: Yemike Abhilash Chandra + +commit c68ab54a89a8c935732589a35ea2596e2329f167 upstream. + +The IMX219 sensor device tree bindings do not include a clock-names +property. Remove the incorrectly added clock-names entry to avoid +dtbs_check warnings. + +Fixes: 4111db03dc05 ("arm64: dts: ti: k3-am62x: Add overlay for IMX219") +Cc: stable@vger.kernel.org +Signed-off-by: Yemike Abhilash Chandra +Reviewed-by: Neha Malcom Francis +Reviewed-by: Jai Luthra +Link: https://lore.kernel.org/r/20250415111328.3847502-6-y-abhilashchandra@ti.com +Signed-off-by: Nishanth Menon +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso | 1 - + 1 file changed, 1 deletion(-) + +--- a/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso ++++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso +@@ -39,7 +39,6 @@ + reg = <0x10>; + + clocks = <&clk_imx219_fixed>; +- clock-names = "xclk"; + + reset-gpios = <&exp1 13 GPIO_ACTIVE_HIGH>; + diff --git a/queue-6.12/arm64-dts-ti-k3-am62x-rename-i2c-switch-to-i2c-mux-in-imx219-overlay.patch b/queue-6.12/arm64-dts-ti-k3-am62x-rename-i2c-switch-to-i2c-mux-in-imx219-overlay.patch new file mode 100644 index 0000000000..db67548337 --- /dev/null +++ b/queue-6.12/arm64-dts-ti-k3-am62x-rename-i2c-switch-to-i2c-mux-in-imx219-overlay.patch @@ -0,0 +1,37 @@ +From 7b75dd2029ee01a8c11fcf4d97f3ccebbef9f8eb Mon Sep 17 00:00:00 2001 +From: Yemike Abhilash Chandra +Date: Tue, 15 Apr 2025 16:43:27 +0530 +Subject: arm64: dts: ti: k3-am62x: Rename I2C switch to I2C mux in IMX219 overlay + +From: Yemike Abhilash Chandra + +commit 7b75dd2029ee01a8c11fcf4d97f3ccebbef9f8eb upstream. + +The IMX219 device tree overlay incorrectly defined an I2C switch +instead of an I2C mux. According to the DT bindings, the correct +terminology and node definition should use "i2c-mux" instead of +"i2c-switch". Hence, update the same to avoid dtbs_check warnings. + +Fixes: 4111db03dc05 ("arm64: dts: ti: k3-am62x: Add overlay for IMX219") +Cc: stable@vger.kernel.org +Signed-off-by: Yemike Abhilash Chandra +Reviewed-by: Neha Malcom Francis +Reviewed-by: Jai Luthra +Link: https://lore.kernel.org/r/20250415111328.3847502-7-y-abhilashchandra@ti.com +Signed-off-by: Nishanth Menon +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso ++++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso +@@ -22,7 +22,7 @@ + #size-cells = <0>; + status = "okay"; + +- i2c-switch@71 { ++ i2c-mux@71 { + compatible = "nxp,pca9543"; + #address-cells = <1>; + #size-cells = <0>; diff --git a/queue-6.12/arm64-dts-ti-k3-am62x-rename-i2c-switch-to-i2c-mux-in-ov5640-overlay.patch b/queue-6.12/arm64-dts-ti-k3-am62x-rename-i2c-switch-to-i2c-mux-in-ov5640-overlay.patch new file mode 100644 index 0000000000..ced0b1c286 --- /dev/null +++ b/queue-6.12/arm64-dts-ti-k3-am62x-rename-i2c-switch-to-i2c-mux-in-ov5640-overlay.patch @@ -0,0 +1,49 @@ +From b22cc402d38774ccc552d18e762c25dde02f7be0 Mon Sep 17 00:00:00 2001 +From: Yemike Abhilash Chandra +Date: Tue, 15 Apr 2025 16:43:28 +0530 +Subject: arm64: dts: ti: k3-am62x: Rename I2C switch to I2C mux in OV5640 overlay + +From: Yemike Abhilash Chandra + +commit b22cc402d38774ccc552d18e762c25dde02f7be0 upstream. + +The OV5640 device tree overlay incorrectly defined an I2C switch +instead of an I2C mux. According to the DT bindings, the correct +terminology and node definition should use "i2c-mux" instead of +"i2c-switch". Hence, update the same to avoid dtbs_check warnings. + +Fixes: 635ed9715194 ("arm64: dts: ti: k3-am62x: Add overlays for OV5640") +Cc: stable@vger.kernel.org +Signed-off-by: Yemike Abhilash Chandra +Reviewed-by: Neha Malcom Francis +Reviewed-by: Jai Luthra +Link: https://lore.kernel.org/r/20250415111328.3847502-8-y-abhilashchandra@ti.com +Signed-off-by: Nishanth Menon +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-ov5640.dtso | 2 +- + arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-tevi-ov5640.dtso | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +--- a/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-ov5640.dtso ++++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-ov5640.dtso +@@ -22,7 +22,7 @@ + #size-cells = <0>; + status = "okay"; + +- i2c-switch@71 { ++ i2c-mux@71 { + compatible = "nxp,pca9543"; + #address-cells = <1>; + #size-cells = <0>; +--- a/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-tevi-ov5640.dtso ++++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-tevi-ov5640.dtso +@@ -22,7 +22,7 @@ + #size-cells = <0>; + status = "okay"; + +- i2c-switch@71 { ++ i2c-mux@71 { + compatible = "nxp,pca9543"; + #address-cells = <1>; + #size-cells = <0>; diff --git a/queue-6.12/arm64-dts-ti-k3-am65-main-add-missing-taps-to-sdhci0.patch b/queue-6.12/arm64-dts-ti-k3-am65-main-add-missing-taps-to-sdhci0.patch new file mode 100644 index 0000000000..a646cb8db0 --- /dev/null +++ b/queue-6.12/arm64-dts-ti-k3-am65-main-add-missing-taps-to-sdhci0.patch @@ -0,0 +1,36 @@ +From f55c9f087cc2e2252d44ffd9d58def2066fc176e Mon Sep 17 00:00:00 2001 +From: Judith Mendez +Date: Tue, 29 Apr 2025 12:30:08 -0500 +Subject: arm64: dts: ti: k3-am65-main: Add missing taps to sdhci0 + +From: Judith Mendez + +commit f55c9f087cc2e2252d44ffd9d58def2066fc176e upstream. + +For am65x, add missing ITAPDLYSEL values for Default Speed and High +Speed SDR modes to sdhci0 node according to the device datasheet [0]. + +[0] https://www.ti.com/lit/gpn/am6548 + +Fixes: eac99d38f861 ("arm64: dts: ti: k3-am654-main: Update otap-del-sel values") +Cc: stable@vger.kernel.org +Signed-off-by: Judith Mendez +Reviewed-by: Moteen Shah +Link: https://lore.kernel.org/r/20250429173009.33994-1-jm@ti.com +Signed-off-by: Nishanth Menon +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +@@ -449,6 +449,8 @@ + ti,otap-del-sel-mmc-hs = <0x0>; + ti,otap-del-sel-ddr52 = <0x5>; + ti,otap-del-sel-hs200 = <0x5>; ++ ti,itap-del-sel-legacy = <0xa>; ++ ti,itap-del-sel-mmc-hs = <0x1>; + ti,itap-del-sel-ddr52 = <0x0>; + dma-coherent; + status = "disabled"; diff --git a/queue-6.12/arm64-dts-ti-k3-am68-sk-fix-regulator-hierarchy.patch b/queue-6.12/arm64-dts-ti-k3-am68-sk-fix-regulator-hierarchy.patch new file mode 100644 index 0000000000..4a204cab9b --- /dev/null +++ b/queue-6.12/arm64-dts-ti-k3-am68-sk-fix-regulator-hierarchy.patch @@ -0,0 +1,56 @@ +From 7edf0a4d3bb7f5cd84f172b76c380c4259bb4ef8 Mon Sep 17 00:00:00 2001 +From: Yemike Abhilash Chandra +Date: Tue, 15 Apr 2025 16:43:23 +0530 +Subject: arm64: dts: ti: k3-am68-sk: Fix regulator hierarchy + +From: Yemike Abhilash Chandra + +commit 7edf0a4d3bb7f5cd84f172b76c380c4259bb4ef8 upstream. + +Update the vin-supply of the TLV71033 regulator from LM5141 (vsys_3v3) +to LM61460 (vsys_5v0) to match the schematics. Add a fixed regulator +node for the LM61460 5V supply to support this change. + +AM68-SK schematics: https://www.ti.com/lit/zip/sprr463 + +Fixes: a266c180b398 ("arm64: dts: ti: k3-am68-sk: Add support for AM68 SK base board") +Cc: stable@vger.kernel.org +Signed-off-by: Yemike Abhilash Chandra +Reviewed-by: Neha Malcom Francis +Reviewed-by: Udit Kumar +Link: https://lore.kernel.org/r/20250415111328.3847502-3-y-abhilashchandra@ti.com +Signed-off-by: Nishanth Menon +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts | 13 ++++++++++++- + 1 file changed, 12 insertions(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts ++++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts +@@ -44,6 +44,17 @@ + regulator-boot-on; + }; + ++ vsys_5v0: regulator-vsys5v0 { ++ /* Output of LM61460 */ ++ compatible = "regulator-fixed"; ++ regulator-name = "vsys_5v0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vusb_main>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ + vsys_3v3: regulator-vsys3v3 { + /* Output of LM5141 */ + compatible = "regulator-fixed"; +@@ -76,7 +87,7 @@ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; +- vin-supply = <&vsys_3v3>; ++ vin-supply = <&vsys_5v0>; + gpios = <&main_gpio0 49 GPIO_ACTIVE_HIGH>; + states = <1800000 0x0>, + <3300000 0x1>; diff --git a/queue-6.12/arm64-dts-ti-k3-j721e-sk-add-dt-nodes-for-power-regulators.patch b/queue-6.12/arm64-dts-ti-k3-j721e-sk-add-dt-nodes-for-power-regulators.patch new file mode 100644 index 0000000000..bc824a15da --- /dev/null +++ b/queue-6.12/arm64-dts-ti-k3-j721e-sk-add-dt-nodes-for-power-regulators.patch @@ -0,0 +1,80 @@ +From 97b67cc102dc2cc8aa39a569c22a196e21af5a21 Mon Sep 17 00:00:00 2001 +From: Yemike Abhilash Chandra +Date: Tue, 15 Apr 2025 16:43:22 +0530 +Subject: arm64: dts: ti: k3-j721e-sk: Add DT nodes for power regulators + +From: Yemike Abhilash Chandra + +commit 97b67cc102dc2cc8aa39a569c22a196e21af5a21 upstream. + +Add device tree nodes for two power regulators on the J721E SK board. +vsys_5v0: A fixed regulator representing the 5V supply output from the +LM61460 and vdd_sd_dv: A GPIO-controlled TLV71033 regulator. + +J721E-SK schematics: https://www.ti.com/lit/zip/sprr438 + +Fixes: 1bfda92a3a36 ("arm64: dts: ti: Add support for J721E SK") +Cc: stable@vger.kernel.org +Signed-off-by: Yemike Abhilash Chandra +Reviewed-by: Udit Kumar +Link: https://lore.kernel.org/r/20250415111328.3847502-2-y-abhilashchandra@ti.com +Signed-off-by: Nishanth Menon +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 31 +++++++++++++++++++++++++++++++ + 1 file changed, 31 insertions(+) + +--- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts ++++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts +@@ -184,6 +184,17 @@ + regulator-boot-on; + }; + ++ vsys_5v0: fixedregulator-vsys5v0 { ++ /* Output of LM61460 */ ++ compatible = "regulator-fixed"; ++ regulator-name = "vsys_5v0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vusb_main>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ + vdd_mmc1: fixedregulator-sd { + compatible = "regulator-fixed"; + pinctrl-names = "default"; +@@ -211,6 +222,20 @@ + <3300000 0x1>; + }; + ++ vdd_sd_dv: gpio-regulator-TLV71033 { ++ compatible = "regulator-gpio"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vdd_sd_dv_pins_default>; ++ regulator-name = "tlv71033"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ vin-supply = <&vsys_5v0>; ++ gpios = <&main_gpio0 118 GPIO_ACTIVE_HIGH>; ++ states = <1800000 0x0>, ++ <3300000 0x1>; ++ }; ++ + transceiver1: can-phy1 { + compatible = "ti,tcan1042"; + #phy-cells = <0>; +@@ -608,6 +633,12 @@ + >; + }; + ++ vdd_sd_dv_pins_default: vdd-sd-dv-default-pins { ++ pinctrl-single,pins = < ++ J721E_IOPAD(0x1dc, PIN_OUTPUT, 7) /* (Y1) SPI1_CLK.GPIO0_118 */ ++ >; ++ }; ++ + wkup_uart0_pins_default: wkup-uart0-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0xa0, PIN_INPUT, 0) /* (J29) WKUP_UART0_RXD */ diff --git a/queue-6.12/arm64-dts-ti-k3-j721e-sk-add-requiried-voltage-supplies-for-imx219.patch b/queue-6.12/arm64-dts-ti-k3-j721e-sk-add-requiried-voltage-supplies-for-imx219.patch new file mode 100644 index 0000000000..d7740cad13 --- /dev/null +++ b/queue-6.12/arm64-dts-ti-k3-j721e-sk-add-requiried-voltage-supplies-for-imx219.patch @@ -0,0 +1,80 @@ +From c6a20a250200da6fcaf80fe945b7b92cba8cfe0f Mon Sep 17 00:00:00 2001 +From: Yemike Abhilash Chandra +Date: Tue, 15 Apr 2025 16:43:25 +0530 +Subject: arm64: dts: ti: k3-j721e-sk: Add requiried voltage supplies for IMX219 + +From: Yemike Abhilash Chandra + +commit c6a20a250200da6fcaf80fe945b7b92cba8cfe0f upstream. + +The device tree overlay for the IMX219 sensor requires three voltage +supplies to be defined: VANA (analog), VDIG (digital core), and VDDL +(digital I/O). Add the corresponding voltage supply definitions to +avoid dtbs_check warnings. + +Fixes: f767eb918096 ("arm64: dts: ti: k3-j721e-sk: Add overlay for IMX219") +Cc: stable@vger.kernel.org +Signed-off-by: Yemike Abhilash Chandra +Link: https://lore.kernel.org/r/20250415111328.3847502-5-y-abhilashchandra@ti.com +Signed-off-by: Nishanth Menon +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso | 33 +++++++++++++++ + 1 file changed, 33 insertions(+) + +--- a/arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso ++++ b/arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso +@@ -19,6 +19,33 @@ + #clock-cells = <0>; + clock-frequency = <24000000>; + }; ++ ++ reg_2p8v: regulator-2p8v { ++ compatible = "regulator-fixed"; ++ regulator-name = "2P8V"; ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <2800000>; ++ vin-supply = <&vdd_sd_dv>; ++ regulator-always-on; ++ }; ++ ++ reg_1p8v: regulator-1p8v { ++ compatible = "regulator-fixed"; ++ regulator-name = "1P8V"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vdd_sd_dv>; ++ regulator-always-on; ++ }; ++ ++ reg_1p2v: regulator-1p2v { ++ compatible = "regulator-fixed"; ++ regulator-name = "1P2V"; ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ vin-supply = <&vdd_sd_dv>; ++ regulator-always-on; ++ }; + }; + + &csi_mux { +@@ -34,6 +61,9 @@ + reg = <0x10>; + + clocks = <&clk_imx219_fixed>; ++ VANA-supply = <®_2p8v>; ++ VDIG-supply = <®_1p8v>; ++ VDDL-supply = <®_1p2v>; + + port { + csi2_cam0: endpoint { +@@ -55,6 +85,9 @@ + reg = <0x10>; + + clocks = <&clk_imx219_fixed>; ++ VANA-supply = <®_2p8v>; ++ VDIG-supply = <®_1p8v>; ++ VDDL-supply = <®_1p2v>; + + port { + csi2_cam1: endpoint { diff --git a/queue-6.12/arm64-dts-ti-k3-j721e-sk-remove-clock-names-property-from-imx219-overlay.patch b/queue-6.12/arm64-dts-ti-k3-j721e-sk-remove-clock-names-property-from-imx219-overlay.patch new file mode 100644 index 0000000000..ee9b12e72d --- /dev/null +++ b/queue-6.12/arm64-dts-ti-k3-j721e-sk-remove-clock-names-property-from-imx219-overlay.patch @@ -0,0 +1,43 @@ +From 24ab76e55ef15450c6681a2b5db4d78f45200939 Mon Sep 17 00:00:00 2001 +From: Yemike Abhilash Chandra +Date: Tue, 15 Apr 2025 16:43:24 +0530 +Subject: arm64: dts: ti: k3-j721e-sk: Remove clock-names property from IMX219 overlay + +From: Yemike Abhilash Chandra + +commit 24ab76e55ef15450c6681a2b5db4d78f45200939 upstream. + +The IMX219 sensor device tree bindings do not include a clock-names +property. Remove the incorrectly added clock-names entry to avoid +dtbs_check warnings. + +Fixes: f767eb918096 ("arm64: dts: ti: k3-j721e-sk: Add overlay for IMX219") +Cc: stable@vger.kernel.org +Signed-off-by: Yemike Abhilash Chandra +Reviewed-by: Neha Malcom Francis +Reviewed-by: Jai Luthra +Link: https://lore.kernel.org/r/20250415111328.3847502-4-y-abhilashchandra@ti.com +Signed-off-by: Nishanth Menon +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso | 2 -- + 1 file changed, 2 deletions(-) + +--- a/arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso ++++ b/arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso +@@ -34,7 +34,6 @@ + reg = <0x10>; + + clocks = <&clk_imx219_fixed>; +- clock-names = "xclk"; + + port { + csi2_cam0: endpoint { +@@ -56,7 +55,6 @@ + reg = <0x10>; + + clocks = <&clk_imx219_fixed>; +- clock-names = "xclk"; + + port { + csi2_cam1: endpoint { diff --git a/queue-6.12/arm64-dts-ti-k3-j722s-evm-enable-serdes_wiz0-and-serdes_wiz1.patch b/queue-6.12/arm64-dts-ti-k3-j722s-evm-enable-serdes_wiz0-and-serdes_wiz1.patch new file mode 100644 index 0000000000..99950e067e --- /dev/null +++ b/queue-6.12/arm64-dts-ti-k3-j722s-evm-enable-serdes_wiz0-and-serdes_wiz1.patch @@ -0,0 +1,50 @@ +From 9d76be5828be44ed7a104cc21b4f875be4a63322 Mon Sep 17 00:00:00 2001 +From: Siddharth Vadapalli +Date: Thu, 17 Apr 2025 18:02:43 +0530 +Subject: arm64: dts: ti: k3-j722s-evm: Enable "serdes_wiz0" and "serdes_wiz1" + +From: Siddharth Vadapalli + +commit 9d76be5828be44ed7a104cc21b4f875be4a63322 upstream. + +In preparation for disabling "serdes_wiz0" and "serdes_wiz1" device-tree +nodes in the SoC file, enable them in the board file. The motivation for +this change is that of following the existing convention of disabling +nodes in the SoC file and only enabling the required ones in the board +file. + +Fixes: 485705df5d5f ("arm64: dts: ti: k3-j722s: Enable PCIe and USB support on J722S-EVM") +Cc: stable@vger.kernel.org +Signed-off-by: Siddharth Vadapalli +Reviewed-by: Udit Kumar +Link: https://lore.kernel.org/r/20250417123246.2733923-2-s-vadapalli@ti.com +Signed-off-by: Nishanth Menon +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts ++++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts +@@ -720,6 +720,10 @@ + ; + }; + ++&serdes_wiz0 { ++ status = "okay"; ++}; ++ + &serdes0 { + status = "okay"; + serdes0_usb_link: phy@0 { +@@ -731,6 +735,10 @@ + }; + }; + ++&serdes_wiz1 { ++ status = "okay"; ++}; ++ + &serdes1 { + status = "okay"; + serdes1_pcie_link: phy@0 { diff --git a/queue-6.12/arm64-dts-ti-k3-j722s-main-disable-serdes_wiz0-and-serdes_wiz1.patch b/queue-6.12/arm64-dts-ti-k3-j722s-main-disable-serdes_wiz0-and-serdes_wiz1.patch new file mode 100644 index 0000000000..efc32eeeb3 --- /dev/null +++ b/queue-6.12/arm64-dts-ti-k3-j722s-main-disable-serdes_wiz0-and-serdes_wiz1.patch @@ -0,0 +1,62 @@ +From 320d8a84f6f045dc876d4c2983f9024c7ac9d6df Mon Sep 17 00:00:00 2001 +From: Siddharth Vadapalli +Date: Thu, 17 Apr 2025 18:02:44 +0530 +Subject: arm64: dts: ti: k3-j722s-main: Disable "serdes_wiz0" and "serdes_wiz1" + +From: Siddharth Vadapalli + +commit 320d8a84f6f045dc876d4c2983f9024c7ac9d6df upstream. + +Since "serdes0" and "serdes1" which are the sub-nodes of "serdes_wiz0" +and "serdes_wiz1" respectively, have been disabled in the SoC file already, +and, given that these sub-nodes will only be enabled in a board file if the +board utilizes any of the SERDES instances and the peripherals bound to +them, we end up in a situation where the board file doesn't explicitly +disable "serdes_wiz0" and "serdes_wiz1". As a consequence of this, the +following errors show up when booting Linux: + + wiz bus@f0000:phy@f000000: probe with driver wiz failed with error -12 + ... + wiz bus@f0000:phy@f010000: probe with driver wiz failed with error -12 + +To not only fix the above, but also, in order to follow the convention of +disabling device-tree nodes in the SoC file and enabling them in the board +files for those boards which require them, disable "serdes_wiz0" and +"serdes_wiz1" device-tree nodes. + +Fixes: 628e0a0118e6 ("arm64: dts: ti: k3-j722s-main: Add SERDES and PCIe support") +Cc: stable@vger.kernel.org +Signed-off-by: Siddharth Vadapalli +Reviewed-by: Udit Kumar +Link: https://lore.kernel.org/r/20250417123246.2733923-3-s-vadapalli@ti.com +Signed-off-by: Nishanth Menon +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi +index 6850f50530f1..beda9e40e931 100644 +--- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi +@@ -32,6 +32,8 @@ serdes_wiz0: phy@f000000 { + assigned-clocks = <&k3_clks 279 1>; + assigned-clock-parents = <&k3_clks 279 5>; + ++ status = "disabled"; ++ + serdes0: serdes@f000000 { + compatible = "ti,j721e-serdes-10g"; + reg = <0x0f000000 0x00010000>; +@@ -70,6 +72,8 @@ serdes_wiz1: phy@f010000 { + assigned-clocks = <&k3_clks 280 1>; + assigned-clock-parents = <&k3_clks 280 5>; + ++ status = "disabled"; ++ + serdes1: serdes@f010000 { + compatible = "ti,j721e-serdes-10g"; + reg = <0x0f010000 0x00010000>; +-- +2.49.0 + diff --git a/queue-6.12/arm64-dts-ti-k3-j784s4-j742s2-main-common-fix-length-of-serdes_ln_ctrl.patch b/queue-6.12/arm64-dts-ti-k3-j784s4-j742s2-main-common-fix-length-of-serdes_ln_ctrl.patch new file mode 100644 index 0000000000..7048e7b5e0 --- /dev/null +++ b/queue-6.12/arm64-dts-ti-k3-j784s4-j742s2-main-common-fix-length-of-serdes_ln_ctrl.patch @@ -0,0 +1,35 @@ +From 3b62bd1fde50d54cc59015e14869e6cc3d6899e0 Mon Sep 17 00:00:00 2001 +From: Siddharth Vadapalli +Date: Wed, 23 Apr 2025 20:46:12 +0530 +Subject: arm64: dts: ti: k3-j784s4-j742s2-main-common: Fix length of serdes_ln_ctrl + +From: Siddharth Vadapalli + +commit 3b62bd1fde50d54cc59015e14869e6cc3d6899e0 upstream. + +Commit under Fixes corrected the "mux-reg-masks" property but did not +update the "length" field of the "reg" property to account for the +newly added register offsets which extend the region. Fix this. + +Fixes: 38e7f9092efb ("arm64: dts: ti: k3-j784s4-j742s2-main-common: Fix serdes_ln_ctrl reg-masks") +Cc: stable@vger.kernel.org +Signed-off-by: Siddharth Vadapalli +Reviewed-by: Udit Kumar +Link: https://lore.kernel.org/r/20250423151612.48848-1-s-vadapalli@ti.com +Signed-off-by: Nishanth Menon +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi +@@ -77,7 +77,7 @@ + + serdes_ln_ctrl: mux-controller@4080 { + compatible = "reg-mux"; +- reg = <0x00004080 0x30>; ++ reg = <0x00004080 0x50>; + #mux-control-cells = <1>; + mux-reg-masks = <0x0 0x3>, <0x4 0x3>, /* SERDES0 lane0/1 select */ + <0x8 0x3>, <0xc 0x3>, /* SERDES0 lane2/3 select */ diff --git a/queue-6.12/net_sched-hfsc-address-reentrant-enqueue-adding-class-to-eltree-twice.patch b/queue-6.12/net_sched-hfsc-address-reentrant-enqueue-adding-class-to-eltree-twice.patch new file mode 100644 index 0000000000..3689a1aa64 --- /dev/null +++ b/queue-6.12/net_sched-hfsc-address-reentrant-enqueue-adding-class-to-eltree-twice.patch @@ -0,0 +1,85 @@ +From ac9fe7dd8e730a103ae4481147395cc73492d786 Mon Sep 17 00:00:00 2001 +From: Pedro Tammela +Date: Thu, 22 May 2025 15:14:47 -0300 +Subject: net_sched: hfsc: Address reentrant enqueue adding class to eltree twice + +From: Pedro Tammela + +commit ac9fe7dd8e730a103ae4481147395cc73492d786 upstream. + +Savino says: + "We are writing to report that this recent patch + (141d34391abbb315d68556b7c67ad97885407547) [1] + can be bypassed, and a UAF can still occur when HFSC is utilized with + NETEM. + + The patch only checks the cl->cl_nactive field to determine whether + it is the first insertion or not [2], but this field is only + incremented by init_vf [3]. + + By using HFSC_RSC (which uses init_ed) [4], it is possible to bypass the + check and insert the class twice in the eltree. + Under normal conditions, this would lead to an infinite loop in + hfsc_dequeue for the reasons we already explained in this report [5]. + + However, if TBF is added as root qdisc and it is configured with a + very low rate, + it can be utilized to prevent packets from being dequeued. + This behavior can be exploited to perform subsequent insertions in the + HFSC eltree and cause a UAF." + +To fix both the UAF and the infinite loop, with netem as an hfsc child, +check explicitly in hfsc_enqueue whether the class is already in the eltree +whenever the HFSC_RSC flag is set. + +[1] https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=141d34391abbb315d68556b7c67ad97885407547 +[2] https://elixir.bootlin.com/linux/v6.15-rc5/source/net/sched/sch_hfsc.c#L1572 +[3] https://elixir.bootlin.com/linux/v6.15-rc5/source/net/sched/sch_hfsc.c#L677 +[4] https://elixir.bootlin.com/linux/v6.15-rc5/source/net/sched/sch_hfsc.c#L1574 +[5] https://lore.kernel.org/netdev/8DuRWwfqjoRDLDmBMlIfbrsZg9Gx50DHJc1ilxsEBNe2D6NMoigR_eIRIG0LOjMc3r10nUUZtArXx4oZBIdUfZQrwjcQhdinnMis_0G7VEk=@willsroot.io/T/#u + +Fixes: 37d9cf1a3ce3 ("sched: Fix detection of empty queues in child qdiscs") +Reported-by: Savino Dicanosa +Reported-by: William Liu +Acked-by: Jamal Hadi Salim +Tested-by: Victor Nogueira +Signed-off-by: Pedro Tammela +Link: https://patch.msgid.link/20250522181448.1439717-2-pctammela@mojatatu.com +Signed-off-by: Paolo Abeni +Signed-off-by: Greg Kroah-Hartman +--- + net/sched/sch_hfsc.c | 9 ++++++++- + 1 file changed, 8 insertions(+), 1 deletion(-) + +--- a/net/sched/sch_hfsc.c ++++ b/net/sched/sch_hfsc.c +@@ -175,6 +175,11 @@ struct hfsc_sched { + + #define HT_INFINITY 0xffffffffffffffffULL /* infinite time value */ + ++static bool cl_in_el_or_vttree(struct hfsc_class *cl) ++{ ++ return ((cl->cl_flags & HFSC_FSC) && cl->cl_nactive) || ++ ((cl->cl_flags & HFSC_RSC) && !RB_EMPTY_NODE(&cl->el_node)); ++} + + /* + * eligible tree holds backlogged classes being sorted by their eligible times. +@@ -1040,6 +1045,8 @@ hfsc_change_class(struct Qdisc *sch, u32 + if (cl == NULL) + return -ENOBUFS; + ++ RB_CLEAR_NODE(&cl->el_node); ++ + err = tcf_block_get(&cl->block, &cl->filter_list, sch, extack); + if (err) { + kfree(cl); +@@ -1572,7 +1579,7 @@ hfsc_enqueue(struct sk_buff *skb, struct + sch->qstats.backlog += len; + sch->q.qlen++; + +- if (first && !cl->cl_nactive) { ++ if (first && !cl_in_el_or_vttree(cl)) { + if (cl->cl_flags & HFSC_RSC) + init_ed(cl, len); + if (cl->cl_flags & HFSC_FSC) diff --git a/queue-6.12/perf-arm-cmn-add-cmn-s3-acpi-binding.patch b/queue-6.12/perf-arm-cmn-add-cmn-s3-acpi-binding.patch new file mode 100644 index 0000000000..fea13a3783 --- /dev/null +++ b/queue-6.12/perf-arm-cmn-add-cmn-s3-acpi-binding.patch @@ -0,0 +1,33 @@ +From 8c138a189f6db295ceb32258d46ac061df0823e5 Mon Sep 17 00:00:00 2001 +From: Robin Murphy +Date: Mon, 19 May 2025 11:56:04 +0100 +Subject: perf/arm-cmn: Add CMN S3 ACPI binding + +From: Robin Murphy + +commit 8c138a189f6db295ceb32258d46ac061df0823e5 upstream. + +An ACPI binding for CMN S3 was not yet finalised when the driver support +was originally written, but v1.2 of DEN0093 "ACPI for Arm Components" +has at last been published; support ACPI systems using the proper HID. + +Cc: stable@vger.kernel.org +Fixes: 0dc2f4963f7e ("perf/arm-cmn: Support CMN S3") +Signed-off-by: Robin Murphy +Link: https://lore.kernel.org/r/7dafe147f186423020af49d7037552ee59c60e97.1747652164.git.robin.murphy@arm.com +Signed-off-by: Will Deacon +Signed-off-by: Greg Kroah-Hartman +--- + drivers/perf/arm-cmn.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/perf/arm-cmn.c ++++ b/drivers/perf/arm-cmn.c +@@ -2650,6 +2650,7 @@ static const struct acpi_device_id arm_c + { "ARMHC600", PART_CMN600 }, + { "ARMHC650" }, + { "ARMHC700" }, ++ { "ARMHC003" }, + {} + }; + MODULE_DEVICE_TABLE(acpi, arm_cmn_acpi_match); diff --git a/queue-6.12/perf-arm-cmn-fix-req2-snp2-mixup.patch b/queue-6.12/perf-arm-cmn-fix-req2-snp2-mixup.patch new file mode 100644 index 0000000000..0f5ea3b3ea --- /dev/null +++ b/queue-6.12/perf-arm-cmn-fix-req2-snp2-mixup.patch @@ -0,0 +1,46 @@ +From 11b0f576e0cbde6a12258f2af6753b17b8df342b Mon Sep 17 00:00:00 2001 +From: Robin Murphy +Date: Thu, 8 May 2025 16:16:40 +0100 +Subject: perf/arm-cmn: Fix REQ2/SNP2 mixup + +From: Robin Murphy + +commit 11b0f576e0cbde6a12258f2af6753b17b8df342b upstream. + +Somehow the encodings for REQ2/SNP2 channels in XP events +got mixed up... Unmix them. + +CC: stable@vger.kernel.org +Fixes: 23760a014417 ("perf/arm-cmn: Add CMN-700 support") +Signed-off-by: Robin Murphy +Link: https://lore.kernel.org/r/087023e9737ac93d7ec7a841da904758c254cb01.1746717400.git.robin.murphy@arm.com +Signed-off-by: Will Deacon +Signed-off-by: Greg Kroah-Hartman +--- + drivers/perf/arm-cmn.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/drivers/perf/arm-cmn.c ++++ b/drivers/perf/arm-cmn.c +@@ -727,8 +727,8 @@ static umode_t arm_cmn_event_attr_is_vis + + if ((chan == 5 && cmn->rsp_vc_num < 2) || + (chan == 6 && cmn->dat_vc_num < 2) || +- (chan == 7 && cmn->snp_vc_num < 2) || +- (chan == 8 && cmn->req_vc_num < 2)) ++ (chan == 7 && cmn->req_vc_num < 2) || ++ (chan == 8 && cmn->snp_vc_num < 2)) + return 0; + } + +@@ -884,8 +884,8 @@ static umode_t arm_cmn_event_attr_is_vis + _CMN_EVENT_XP(pub_##_name, (_event) | (4 << 5)), \ + _CMN_EVENT_XP(rsp2_##_name, (_event) | (5 << 5)), \ + _CMN_EVENT_XP(dat2_##_name, (_event) | (6 << 5)), \ +- _CMN_EVENT_XP(snp2_##_name, (_event) | (7 << 5)), \ +- _CMN_EVENT_XP(req2_##_name, (_event) | (8 << 5)) ++ _CMN_EVENT_XP(req2_##_name, (_event) | (7 << 5)), \ ++ _CMN_EVENT_XP(snp2_##_name, (_event) | (8 << 5)) + + #define CMN_EVENT_XP_DAT(_name, _event) \ + _CMN_EVENT_XP_PORT(dat_##_name, (_event) | (3 << 5)), \ diff --git a/queue-6.12/perf-arm-cmn-initialise-cmn-cpu-earlier.patch b/queue-6.12/perf-arm-cmn-initialise-cmn-cpu-earlier.patch new file mode 100644 index 0000000000..32f852d023 --- /dev/null +++ b/queue-6.12/perf-arm-cmn-initialise-cmn-cpu-earlier.patch @@ -0,0 +1,43 @@ +From 597704e201068db3d104de3c7a4d447ff8209127 Mon Sep 17 00:00:00 2001 +From: Robin Murphy +Date: Mon, 12 May 2025 18:11:54 +0100 +Subject: perf/arm-cmn: Initialise cmn->cpu earlier + +From: Robin Murphy + +commit 597704e201068db3d104de3c7a4d447ff8209127 upstream. + +For all the complexity of handling affinity for CPU hotplug, what we've +apparently managed to overlook is that arm_cmn_init_irqs() has in fact +always been setting the *initial* affinity of all IRQs to CPU 0, not the +CPU we subsequently choose for event scheduling. Oh dear. + +Cc: stable@vger.kernel.org +Fixes: 0ba64770a2f2 ("perf: Add Arm CMN-600 PMU driver") +Signed-off-by: Robin Murphy +Reviewed-by: Ilkka Koskinen +Link: https://lore.kernel.org/r/b12fccba6b5b4d2674944f59e4daad91cd63420b.1747069914.git.robin.murphy@arm.com +Signed-off-by: Will Deacon +Signed-off-by: Greg Kroah-Hartman +--- + drivers/perf/arm-cmn.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/perf/arm-cmn.c ++++ b/drivers/perf/arm-cmn.c +@@ -2557,6 +2557,7 @@ static int arm_cmn_probe(struct platform + + cmn->dev = &pdev->dev; + cmn->part = (unsigned long)device_get_match_data(cmn->dev); ++ cmn->cpu = cpumask_local_spread(0, dev_to_node(cmn->dev)); + platform_set_drvdata(pdev, cmn); + + if (cmn->part == PART_CMN600 && has_acpi_companion(cmn->dev)) { +@@ -2584,7 +2585,6 @@ static int arm_cmn_probe(struct platform + if (err) + return err; + +- cmn->cpu = cpumask_local_spread(0, dev_to_node(cmn->dev)); + cmn->pmu = (struct pmu) { + .module = THIS_MODULE, + .parent = cmn->dev, diff --git a/queue-6.12/series b/queue-6.12/series index f04fc8b24f..0de4e8e3eb 100644 --- a/queue-6.12/series +++ b/queue-6.12/series @@ -1 +1,32 @@ can-kvaser_pciefd-force-irq-edge-in-case-of-nested-irq.patch +arm64-dts-qcom-ipq9574-add-missing-properties-for-cryptobam.patch +arm64-dts-qcom-sa8775p-remove-extra-entries-from-the-iommus-property.patch +arm64-dts-qcom-sa8775p-remove-cdsp-compute-cb-10.patch +arm64-dts-qcom-sm8350-fix-typo-in-pil_camera_mem-node.patch +arm64-dts-qcom-sm8450-add-missing-properties-for-cryptobam.patch +arm64-dts-qcom-sm8550-add-missing-properties-for-cryptobam.patch +arm64-dts-qcom-sm8650-add-missing-properties-for-cryptobam.patch +arm64-dts-qcom-x1e80100-asus-vivobook-s15-fix-vreg_l2j_1p2-voltage.patch +arm64-dts-qcom-x1e80100-lenovo-yoga-slim7x-fix-vreg_l2j_1p2-voltage.patch +arm64-dts-qcom-x1e80100-qcp-fix-vreg_l2j_1p2-voltage.patch +arm64-dts-qcom-x1e80100-qcp-mark-l12b-and-l15b-always-on.patch +arm64-dts-qcom-x1e80100-yoga-slim7x-mark-l12b-and-l15b-always-on.patch +arm64-dts-qcom-x1e80100-fix-video-thermal-zone.patch +arm64-dts-ti-k3-am62-main-set-emmc-clock-parent-to-default.patch +arm64-dts-ti-k3-am62a-main-set-emmc-clock-parent-to-default.patch +arm64-dts-ti-k3-am62p-j722s-common-main-set-emmc-clock-parent-to-default.patch +arm64-dts-ti-k3-am62x-remove-clock-names-property-from-imx219-overlay.patch +arm64-dts-ti-k3-am62x-rename-i2c-switch-to-i2c-mux-in-imx219-overlay.patch +arm64-dts-ti-k3-am62x-rename-i2c-switch-to-i2c-mux-in-ov5640-overlay.patch +arm64-dts-ti-k3-am65-main-add-missing-taps-to-sdhci0.patch +arm64-dts-ti-k3-am68-sk-fix-regulator-hierarchy.patch +arm64-dts-ti-k3-j721e-sk-add-dt-nodes-for-power-regulators.patch +arm64-dts-ti-k3-j721e-sk-remove-clock-names-property-from-imx219-overlay.patch +arm64-dts-ti-k3-j721e-sk-add-requiried-voltage-supplies-for-imx219.patch +arm64-dts-ti-k3-j722s-evm-enable-serdes_wiz0-and-serdes_wiz1.patch +arm64-dts-ti-k3-j722s-main-disable-serdes_wiz0-and-serdes_wiz1.patch +arm64-dts-ti-k3-j784s4-j742s2-main-common-fix-length-of-serdes_ln_ctrl.patch +net_sched-hfsc-address-reentrant-enqueue-adding-class-to-eltree-twice.patch +perf-arm-cmn-fix-req2-snp2-mixup.patch +perf-arm-cmn-initialise-cmn-cpu-earlier.patch +perf-arm-cmn-add-cmn-s3-acpi-binding.patch -- 2.47.2