From 47cdaa46f3f2c6710911543f2ec836eeb624969e Mon Sep 17 00:00:00 2001 From: Joe Komlodi Date: Tue, 22 Apr 2025 00:27:47 +0000 Subject: [PATCH] hw/ssi/aspeed_smc: Allow 64-bit wide flash accesses MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit cde3247651dc998da5dc1005148302a90d72f21f fixed atomicity for LDRD, which ends up making accesses 64-bits wide. However, the AST2600 bootloader can sometimes compile with LDRD instructions, which causes the acceses to fail when accessing the memory-mapped SPI flash. To fix this, increase the MMIO region valid access size to allow for 64-bit accesses. Signed-off-by: Joe Komlodi Reviewed-by: Cédric Le Goater Link: https://lore.kernel.org/qemu-devel/20250422002747.2593465-1-komlodi@google.com Signed-off-by: Cédric Le Goater --- hw/ssi/aspeed_smc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c index 0d38f95c7a..614528b8ef 100644 --- a/hw/ssi/aspeed_smc.c +++ b/hw/ssi/aspeed_smc.c @@ -359,7 +359,7 @@ static const MemoryRegionOps aspeed_smc_flash_default_ops = { .endianness = DEVICE_LITTLE_ENDIAN, .valid = { .min_access_size = 1, - .max_access_size = 4, + .max_access_size = 8, }, }; @@ -670,7 +670,7 @@ static const MemoryRegionOps aspeed_smc_flash_ops = { .endianness = DEVICE_LITTLE_ENDIAN, .valid = { .min_access_size = 1, - .max_access_size = 4, + .max_access_size = 8, }, }; -- 2.39.5