From 4b6f74d86c4d4f179643ae2c5f7bbfcf7c1a7725 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Mon, 17 Mar 2025 14:28:15 +0000 Subject: [PATCH] target/arm: Handle AArch64 gdb read/write regs in TYPE_ARM_CPU MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Instead of having the TYPE_AARCH64_CPU subclass set CPUClass::gdb_read_register and ::gdb_write_register to different methods from those of the TYPE_ARM_CPU parent class, have the TYPE_ARM_CPU methods handle either AArch32 or AArch64 at runtime. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20250317142819.900029-6-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé --- target/arm/cpu64.c | 5 ----- target/arm/gdbstub.c | 12 ++++++++++++ 2 files changed, 12 insertions(+), 5 deletions(-) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 5135ef63cb..00629a5d1d 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -815,11 +815,6 @@ static void aarch64_cpu_finalizefn(Object *obj) static void aarch64_cpu_class_init(ObjectClass *oc, const void *data) { - CPUClass *cc = CPU_CLASS(oc); - - cc->gdb_read_register = aarch64_cpu_gdb_read_register; - cc->gdb_write_register = aarch64_cpu_gdb_write_register; - object_class_property_add_bool(oc, "aarch64", aarch64_cpu_get_aarch64, aarch64_cpu_set_aarch64); object_class_property_set_description(oc, "aarch64", diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c index 30068c2262..ce4497ad7c 100644 --- a/target/arm/gdbstub.c +++ b/target/arm/gdbstub.c @@ -44,6 +44,12 @@ int arm_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) ARMCPU *cpu = ARM_CPU(cs); CPUARMState *env = &cpu->env; +#ifdef TARGET_AARCH64 + if (arm_gdbstub_is_aarch64(cpu)) { + return aarch64_cpu_gdb_read_register(cs, mem_buf, n); + } +#endif + if (n < 16) { /* Core integer register. */ return gdb_get_reg32(mem_buf, env->regs[n]); @@ -66,6 +72,12 @@ int arm_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) CPUARMState *env = &cpu->env; uint32_t tmp; +#ifdef TARGET_AARCH64 + if (arm_gdbstub_is_aarch64(cpu)) { + return aarch64_cpu_gdb_write_register(cs, mem_buf, n); + } +#endif + tmp = ldl_p(mem_buf); /* -- 2.39.5