From 4f1118bf96e3efb04bfa07831a1d0eec6e3caa7e Mon Sep 17 00:00:00 2001 From: Suraj Kandpal Date: Sat, 1 Nov 2025 08:54:58 +0530 Subject: [PATCH] drm/i915/ltphy: Update the ltpll config table value for eDP When we get the eDP tables we reuse dp tables for some data rates. We need to modify the 3rd config value of this table to 1 instead of 0 since that is the only difference in the dp and edp table for that particular data rate. Signed-off-by: Suraj Kandpal Reviewed-by: Arun R Murthy Link: https://patch.msgid.link/20251101032513.4171255-11-suraj.kandpal@intel.com --- drivers/gpu/drm/i915/display/intel_lt_phy.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.c b/drivers/gpu/drm/i915/display/intel_lt_phy.c index ece81e8d558dd..892dea3b975fe 100644 --- a/drivers/gpu/drm/i915/display/intel_lt_phy.c +++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c @@ -1225,6 +1225,10 @@ intel_lt_phy_pll_calc_state(struct intel_crtc_state *crtc_state, for (i = 0; tables[i]; i++) { if (crtc_state->port_clock == tables[i]->clock) { crtc_state->dpll_hw_state.ltpll = *tables[i]; + if (intel_crtc_has_dp_encoder(crtc_state)) { + if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) + crtc_state->dpll_hw_state.ltpll.config[2] = 1; + } return 0; } } -- 2.47.3