From 50d6d275f1806c440095336a307de156937df69f Mon Sep 17 00:00:00 2001 From: Chris Wright Date: Tue, 13 Sep 2005 09:57:39 -0700 Subject: [PATCH] Some more s/byte/dword/ PCI_ROM_ADDRESS config write fixes from Linus. --- ...rites-to-PCI_ROM_ADDRESS-config-word.patch | 47 +++++++++++++++++++ queue/series | 1 + 2 files changed, 48 insertions(+) create mode 100644 queue/fix-more-byte-to-dword-writes-to-PCI_ROM_ADDRESS-config-word.patch diff --git a/queue/fix-more-byte-to-dword-writes-to-PCI_ROM_ADDRESS-config-word.patch b/queue/fix-more-byte-to-dword-writes-to-PCI_ROM_ADDRESS-config-word.patch new file mode 100644 index 00000000000..2e8d6f8a654 --- /dev/null +++ b/queue/fix-more-byte-to-dword-writes-to-PCI_ROM_ADDRESS-config-word.patch @@ -0,0 +1,47 @@ +From stable-bounces@linux.kernel.org Tue Sep 13 08:02:00 2005 +Date: Tue, 13 Sep 2005 08:01:49 -0700 (PDT) +From: Linus Torvalds +To: stable@kernel.org +Cc: +Subject: Fix up more strange byte writes to the PCI_ROM_ADDRESS config word + +It's a dword thing, and the value we write is a dword. Doing a byte +write to it is nonsensical, and writes only the low byte, which only +contains the enable bit. So we enable a nonsensical address (usually +zero), which causes the controller no end of problems. + +Trivial fix, but nasty to find. + +Signed-off-by: Linus Torvalds +Signed-off-by: Chris Wright +--- + drivers/ide/pci/cmd64x.c | 2 +- + drivers/ide/pci/hpt34x.c | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +Index: linux-2.6.13.y/drivers/ide/pci/cmd64x.c +=================================================================== +--- linux-2.6.13.y.orig/drivers/ide/pci/cmd64x.c ++++ linux-2.6.13.y/drivers/ide/pci/cmd64x.c +@@ -608,7 +608,7 @@ static unsigned int __devinit init_chips + + #ifdef __i386__ + if (dev->resource[PCI_ROM_RESOURCE].start) { +- pci_write_config_byte(dev, PCI_ROM_ADDRESS, dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE); ++ pci_write_config_dword(dev, PCI_ROM_ADDRESS, dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE); + printk(KERN_INFO "%s: ROM enabled at 0x%08lx\n", name, dev->resource[PCI_ROM_RESOURCE].start); + } + #endif +Index: linux-2.6.13.y/drivers/ide/pci/hpt34x.c +=================================================================== +--- linux-2.6.13.y.orig/drivers/ide/pci/hpt34x.c ++++ linux-2.6.13.y/drivers/ide/pci/hpt34x.c +@@ -173,7 +173,7 @@ static unsigned int __devinit init_chips + + if (cmd & PCI_COMMAND_MEMORY) { + if (pci_resource_start(dev, PCI_ROM_RESOURCE)) { +- pci_write_config_byte(dev, PCI_ROM_ADDRESS, ++ pci_write_config_dword(dev, PCI_ROM_ADDRESS, + dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE); + printk(KERN_INFO "HPT345: ROM enabled at 0x%08lx\n", + dev->resource[PCI_ROM_RESOURCE].start); diff --git a/queue/series b/queue/series index 0adf432514b..19a36cf9695 100644 --- a/queue/series +++ b/queue/series @@ -5,3 +5,4 @@ sunhme-enable-and-map-pci-rom-properly.patch netfilter-fix-dhcp-masquerade-problem.patch jfs_delete_inode-must-call-clear_inode.patch fix-MPOL_F_VERIFY.patch +fix-more-byte-to-dword-writes-to-PCI_ROM_ADDRESS-config-word.patch -- 2.47.3