From 50e4291d62970adaa1668aeb4e7dbc7c67739504 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 12 Oct 2023 13:09:45 +0200 Subject: [PATCH] hw/pci-host/designware: Add 'host_mem' variable for clarity MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit designware_pcie_root_realize() uses get_system_memory() as the "host side memory region", as opposed to the "PCI side" one. Introduce the 'host_mem' variable for clarity. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Reviewed-by: Gustavo Romero Message-Id: <20231012121857.31873-4-philmd@linaro.org> --- hw/pci-host/designware.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c index 2bd467b34d5..c3fc37b9047 100644 --- a/hw/pci-host/designware.c +++ b/hw/pci-host/designware.c @@ -395,6 +395,7 @@ static void designware_pcie_root_realize(PCIDevice *dev, Error **errp) { DesignwarePCIERoot *root = DESIGNWARE_PCIE_ROOT(dev); DesignwarePCIEHost *host = designware_pcie_root_to_host(root); + MemoryRegion *host_mem = get_system_memory(); MemoryRegion *address_space = &host->pci.memory; PCIBridge *br = PCI_BRIDGE(dev); DesignwarePCIEViewport *viewport; @@ -435,7 +436,7 @@ static void designware_pcie_root_realize(PCIDevice *dev, Error **errp) viewport->cr[0] = DESIGNWARE_PCIE_ATU_TYPE_MEM; source = &host->pci.address_space_root; - destination = get_system_memory(); + destination = host_mem; direction = "Inbound"; /* @@ -460,7 +461,7 @@ static void designware_pcie_root_realize(PCIDevice *dev, Error **errp) destination = &host->pci.memory; direction = "Outbound"; - source = get_system_memory(); + source = host_mem; /* * Configure MemoryRegion implementing CPU -> PCI memory -- 2.39.5