From 550faad18505aac40a1551a5b467e0a63bf2d639 Mon Sep 17 00:00:00 2001 From: Aaron Kling Date: Sat, 6 Sep 2025 15:16:52 -0500 Subject: [PATCH] dt-bindings: memory: tegra210: emc: Document OPP table and interconnect These are needed for dynamic frequency scaling of the EMC controller. Signed-off-by: Aaron Kling Signed-off-by: Krzysztof Kozlowski --- .../memory-controllers/nvidia,tegra210-emc.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra210-emc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra210-emc.yaml index bc8477e7ab193..4e4fb4acd7f9d 100644 --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra210-emc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra210-emc.yaml @@ -33,6 +33,9 @@ properties: items: - description: EMC general interrupt + "#interconnect-cells": + const: 0 + memory-region: maxItems: 1 description: @@ -44,6 +47,11 @@ properties: description: phandle of the memory controller node + operating-points-v2: + description: + Should contain freqs and voltages and opp-supported-hw property, which + is a bitfield indicating SoC speedo ID mask. + required: - compatible - reg @@ -79,4 +87,7 @@ examples: interrupts = ; memory-region = <&emc_table>; nvidia,memory-controller = <&mc>; + operating-points-v2 = <&dvfs_opp_table>; + + #interconnect-cells = <0>; }; -- 2.47.3