From 55978deb0c78baeb73f07e3dff0b6e5cfe833e35 Mon Sep 17 00:00:00 2001 From: wdenk Date: Sat, 3 Nov 2001 22:15:16 +0000 Subject: [PATCH] Initial revision --- include/lcdvideo.h | 69 +++++++++++++++++++++++++++++++++++++++++++ tools/logos/denx.bmp | Bin 0 -> 15538 bytes 2 files changed, 69 insertions(+) create mode 100644 include/lcdvideo.h create mode 100644 tools/logos/denx.bmp diff --git a/include/lcdvideo.h b/include/lcdvideo.h new file mode 100644 index 00000000000..f0640a53852 --- /dev/null +++ b/include/lcdvideo.h @@ -0,0 +1,69 @@ +/* + * MPC823 LCD and Video Controller + * Copyright (c) 1999 Dan Malek (dmalek@jlc.net) + */ +#ifndef __LCDVIDEO_H__ +#define __LCDVIDEO_H__ + + +/* LCD Controller Configuration Register. +*/ +#define LCCR_BNUM ((uint)0xfffe0000) +#define LCCR_EIEN ((uint)0x00010000) +#define LCCR_IEN ((uint)0x00008000) +#define LCCR_IRQL ((uint)0x00007000) +#define LCCR_CLKP ((uint)0x00000800) +#define LCCR_OEP ((uint)0x00000400) +#define LCCR_HSP ((uint)0x00000200) +#define LCCR_VSP ((uint)0x00000100) +#define LCCR_DP ((uint)0x00000080) +#define LCCR_BPIX ((uint)0x00000060) +#define LCCR_LBW ((uint)0x00000010) +#define LCCR_SPLT ((uint)0x00000008) +#define LCCR_CLOR ((uint)0x00000004) +#define LCCR_TFT ((uint)0x00000002) +#define LCCR_PON ((uint)0x00000001) + +/* Define the bit shifts to load values into the register. +*/ +#define LCDBIT(BIT, VAL) ((VAL) << (31 - BIT)) + +#define LCCR_BNUM_BIT ((uint)14) +#define LCCR_EIEN_BIT ((uint)15) +#define LCCR_IEN_BIT ((uint)16) +#define LCCR_IROL_BIT ((uint)19) +#define LCCR_CLKP_BIT ((uint)20) +#define LCCR_OEP_BIT ((uint)21) +#define LCCR_HSP_BIT ((uint)22) +#define LCCR_VSP_BIT ((uint)23) +#define LCCR_DP_BIT ((uint)24) +#define LCCR_BPIX_BIT ((uint)26) +#define LCCR_LBW_BIT ((uint)27) +#define LCCR_SPLT_BIT ((uint)28) +#define LCCR_CLOR_BIT ((uint)29) +#define LCCR_TFT_BIT ((uint)30) +#define LCCR_PON_BIT ((uint)31) + +/* LCD Horizontal control register. +*/ +#define LCHCR_BO ((uint)0x01000000) +#define LCHCR_AT ((uint)0x00e00000) +#define LCHCR_HPC ((uint)0x001ffc00) +#define LCHCR_WBL ((uint)0x000003ff) + +#define LCHCR_AT_BIT ((uint)10) +#define LCHCR_HPC_BIT ((uint)21) +#define LCHCR_WBL_BIT ((uint)31) + +/* LCD Vertical control register. +*/ +#define LCVCR_VPW ((uint)0xf0000000) +#define LCVCR_LCD_AC ((uint)0x01e00000) +#define LCVCR_VPC ((uint)0x001ff800) +#define LCVCR_WBF ((uint)0x000003ff) + +#define LCVCR_VPW_BIT ((uint)3) +#define LCVCR_LCD_AC_BIT ((uint)10) +#define LCVCR_VPC_BIT ((uint)20) + +#endif /* __LCDVIDEO_H__ */ diff --git a/tools/logos/denx.bmp b/tools/logos/denx.bmp new file mode 100644 index 0000000000000000000000000000000000000000..c4cde09d59d60aac35a91fd15ff81d0d1c7c024d GIT binary patch literal 15538 zc-rlmy^q{P6u_UovmWo-Yv1jm<8F@~T6&Z&4Wyz#q@qF*q9lSAg`WEZAT>&ABqF6j zf=DT#fJg|@a77B5M9|P25)Fm%+FtK`yf>cl?d?U#Px9^B^E~t0H#6_OdH3eq53fTd z56kPd^14@E@0V8qaote1f0WeMt59Fp-ns@i-n{`gKe!3EKE4IFKfMiiPVd0!=cjP@ z%e!#@tNZZan+Ndd`$zEPmnU%c^bDT=@f^ZX}V z`|`0~d>rETezsm+K=5Ua<)+}m*T_h_Z`(P_H^P5r^;zF!5N^hBUStpkSW^n^`ZM@Z zzG@DWb{j>|JfGHR%JM3^kbiP16Wqd*ZmPIe`Q7Svtm-54%dyu0cIVP|Dcku~qt>5p zTljV&G5^2J7HnLbP&}l|%pz$92cXnf-NwfA1QHye-L={qW8KG)eArrqOf#a=S`6phkaFjJcop$B1izSX1E#8jV&o~)HN~_qSgHYe!7FB9jl0P0{#gtc$1)HIcq?T=<$bHX)WU!Kcoj2seQ-EE5@h9#>(C zF)&tTCER$T_MFIj*yv)kI#{HJ$@Q_y(;8>qfxvD5UY&5rUTD5m0+%G}LJ)%tveiw% zAYksfS;F}=@f_mhaN(r4IMgc(vIJePj}>)?JZbGc7kMR1i~4b`qNhrlSPU~WwL?$7 zJl`Xf*X=nL^PFrLqUxC^U!G$VeUh7e0T7a6gQb)<`0}Y!s2Wdd1d9kXY4!yq`SMp3 zy=9K@0r&uhHs#ctPnqMr9O1L$N#!!>3{J?z-+uB&Ugij&I>IV9orLr*$&4+YMBR7_ z-|}#dnMqrFc|Lzx$D1i<6m*6O?&?A8wtvZefHG6wBtro?wJxPPsT-d#W_W+|;3Whv z71S|6a%`5J8VNr>nGn0x;y_Av3UbM+XK4xLQ;BkG*s%2~m$-XYzHq)J$|s!p^zv$q zY^00ui8;czhi!tcID65;A;BjZt%vy}1@$i58sEObx9r7d72cmu7Z+6N1gLU%R_eXfieDplo{Y&5%5H1=%%oq3V ze4Y`Z+nwVXG#y4e;+tng?b7bdgUGY)(dJZgjJ}DMT)+>IY$0Fk%&*K8Pi+f`fdYCG zEqIym%}=G%EW^7^h(n34JtbRGs>LC{mp#ZB|J9uEH}t7pZJ7`aC;D*+uX@N4g5i#j za)@SpK;EFZUC)=g3ub(5t#D|rIT2Gl29_-eL(6r`;{&Jj`N6_5M)*e*Yd3m*V{RTt zeCk609t9YeUNpX=uKG|Xpdc4~A3Tlkq`SV>m4-TJ4H2C$3WCq6K51^ij-n&37t^yZ z2tHf&S#3@IilTJwFYM}IVWSgdq|=h+xGSBC$>ROQuqwu9`~Sib#h+9eA