From 59a4757bb4d01c9dfb50e872a9d04ad1f1c38049 Mon Sep 17 00:00:00 2001 From: Zhao Liu Date: Thu, 5 Jun 2025 21:27:22 +0800 Subject: [PATCH] hw/core/cpu: Move CacheType to general cpu.h MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit I386 has already defined cache types in target/i386/cpu.h. Move CacheType to hw/core/cpu.h, so that ARM and other architectures could use it. Cc: Alireza Sanaee Signed-off-by: Zhao Liu Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20250605132722.3597593-1-zhao1.liu@intel.com> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 6 ++++++ target/i386/cpu.h | 6 ------ 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 1e87f7d393..33296a1c08 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -1126,4 +1126,10 @@ extern const VMStateDescription vmstate_cpu_common; #define UNASSIGNED_CPU_INDEX -1 #define UNASSIGNED_CLUSTER_INDEX -1 +enum CacheType { + DATA_CACHE, + INSTRUCTION_CACHE, + UNIFIED_CACHE +}; + #endif diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 545851cbde..5910dcf74d 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1773,12 +1773,6 @@ typedef enum TPRAccess { /* Cache information data structures: */ -enum CacheType { - DATA_CACHE, - INSTRUCTION_CACHE, - UNIFIED_CACHE -}; - typedef struct CPUCacheInfo { enum CacheType type; uint8_t level; -- 2.39.5