From 5bc7fcfae919f23e15eea5d73b7993ec3006bba4 Mon Sep 17 00:00:00 2001 From: Sasha Levin Date: Tue, 6 Aug 2019 17:32:05 -0400 Subject: [PATCH] fixes for 4.9 Signed-off-by: Sasha Levin --- ...uxing-for-i2c2-and-i2c3-for-logicpd-.patch | 58 +++++++++++++++ ...-for-i2c2-and-i2c3-for-logicpd-.patch-5864 | 58 +++++++++++++++ ...rm-dts-logicpd-som-lv-fix-audio-mute.patch | 45 +++++++++++ ...eature-fix-ctr_el0-field-definitions.patch | 51 +++++++++++++ ...-fix-feature-comparison-for-ctr_el0..patch | 74 +++++++++++++++++++ queue-4.9/series | 5 ++ 6 files changed, 291 insertions(+) create mode 100644 queue-4.9/arm-dts-add-pinmuxing-for-i2c2-and-i2c3-for-logicpd-.patch create mode 100644 queue-4.9/arm-dts-add-pinmuxing-for-i2c2-and-i2c3-for-logicpd-.patch-5864 create mode 100644 queue-4.9/arm-dts-logicpd-som-lv-fix-audio-mute.patch create mode 100644 queue-4.9/arm64-cpufeature-fix-ctr_el0-field-definitions.patch create mode 100644 queue-4.9/arm64-cpufeature-fix-feature-comparison-for-ctr_el0..patch diff --git a/queue-4.9/arm-dts-add-pinmuxing-for-i2c2-and-i2c3-for-logicpd-.patch b/queue-4.9/arm-dts-add-pinmuxing-for-i2c2-and-i2c3-for-logicpd-.patch new file mode 100644 index 00000000000..884c2266acb --- /dev/null +++ b/queue-4.9/arm-dts-add-pinmuxing-for-i2c2-and-i2c3-for-logicpd-.patch @@ -0,0 +1,58 @@ +From dba6aeb152fd282b7df034cf958fefc21c50b21e Mon Sep 17 00:00:00 2001 +From: Adam Ford +Date: Thu, 15 Feb 2018 08:25:56 -0600 +Subject: ARM: dts: Add pinmuxing for i2c2 and i2c3 for LogicPD SOM-LV + +[ Upstream commit 5fe3c0fa0d54877c65e7c9b4442aeeb25cdf469a ] + +Since I2C1 and I2C4 have explicit pinmuxing set, let's be on the +safe side and set the pin muxing for I2C2 and I2C3. + +Signed-off-by: Adam Ford +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/logicpd-som-lv.dtsi | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + +diff --git a/arch/arm/boot/dts/logicpd-som-lv.dtsi b/arch/arm/boot/dts/logicpd-som-lv.dtsi +index 876ed5f2922c4..43035cb71cbee 100644 +--- a/arch/arm/boot/dts/logicpd-som-lv.dtsi ++++ b/arch/arm/boot/dts/logicpd-som-lv.dtsi +@@ -114,10 +114,14 @@ + }; + + &i2c2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c2_pins>; + clock-frequency = <400000>; + }; + + &i2c3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c3_pins>; + clock-frequency = <400000>; + }; + +@@ -239,6 +243,18 @@ + OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4) /* sys_boot1.gpio_3 */ + >; + }; ++ i2c2_pins: pinmux_i2c2_pins { ++ pinctrl-single,pins = < ++ OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl */ ++ OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda */ ++ >; ++ }; ++ i2c3_pins: pinmux_i2c3_pins { ++ pinctrl-single,pins = < ++ OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl */ ++ OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda */ ++ >; ++ }; + }; + + &omap3_pmx_core2 { +-- +2.20.1 + diff --git a/queue-4.9/arm-dts-add-pinmuxing-for-i2c2-and-i2c3-for-logicpd-.patch-5864 b/queue-4.9/arm-dts-add-pinmuxing-for-i2c2-and-i2c3-for-logicpd-.patch-5864 new file mode 100644 index 00000000000..e053b366753 --- /dev/null +++ b/queue-4.9/arm-dts-add-pinmuxing-for-i2c2-and-i2c3-for-logicpd-.patch-5864 @@ -0,0 +1,58 @@ +From c19e1ee19b79bd423761ac1b6c62ac76412b5967 Mon Sep 17 00:00:00 2001 +From: Adam Ford +Date: Thu, 15 Feb 2018 08:25:55 -0600 +Subject: ARM: dts: Add pinmuxing for i2c2 and i2c3 for LogicPD torpedo + +[ Upstream commit a135a392acbec7ecda782981788e8c03767a1571 ] + +Since I2C1 and I2C4 have explicit pinmuxing set, let's be on the +safe side and set the pin muxing for I2C2 and I2C3. + +Signed-off-by: Adam Ford +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/logicpd-torpedo-som.dtsi | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + +diff --git a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi +index 08f0a35dc0d1e..ceb49d15d243c 100644 +--- a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi ++++ b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi +@@ -117,10 +117,14 @@ + }; + + &i2c2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c2_pins>; + clock-frequency = <400000>; + }; + + &i2c3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c3_pins>; + clock-frequency = <400000>; + at24@50 { + compatible = "atmel,24c64"; +@@ -215,6 +219,18 @@ + OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */ + >; + }; ++ i2c2_pins: pinmux_i2c2_pins { ++ pinctrl-single,pins = < ++ OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl */ ++ OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda */ ++ >; ++ }; ++ i2c3_pins: pinmux_i2c3_pins { ++ pinctrl-single,pins = < ++ OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl */ ++ OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda */ ++ >; ++ }; + }; + + &uart2 { +-- +2.20.1 + diff --git a/queue-4.9/arm-dts-logicpd-som-lv-fix-audio-mute.patch b/queue-4.9/arm-dts-logicpd-som-lv-fix-audio-mute.patch new file mode 100644 index 00000000000..2b10740bf90 --- /dev/null +++ b/queue-4.9/arm-dts-logicpd-som-lv-fix-audio-mute.patch @@ -0,0 +1,45 @@ +From 91149331d4e765b3ad2ded20e41529c55337c95c Mon Sep 17 00:00:00 2001 +From: Adam Ford +Date: Tue, 1 May 2018 08:58:53 -0500 +Subject: ARM: dts: logicpd-som-lv: Fix Audio Mute + +[ Upstream commit 95e59fc3c3fa3187a07a75f40b21637deb4bd12d ] + +The Audio has worked, but the mute pin has a weak pulldown which alows +some of the audio signal to pass very quietly. This patch fixes +that so the mute pin is actively driven high for mute or low for normal +operation. + +Fixes: ab8dd3aed011 ("ARM: DTS: Add minimal Support for Logic +PD DM3730 SOM-LV") + +Signed-off-by: Adam Ford +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/logicpd-som-lv.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm/boot/dts/logicpd-som-lv.dtsi b/arch/arm/boot/dts/logicpd-som-lv.dtsi +index 43035cb71cbee..f82f193b88569 100644 +--- a/arch/arm/boot/dts/logicpd-som-lv.dtsi ++++ b/arch/arm/boot/dts/logicpd-som-lv.dtsi +@@ -108,6 +108,7 @@ + twl_audio: audio { + compatible = "ti,twl4030-audio"; + codec { ++ ti,hs_extmute_gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>; + }; + }; + }; +@@ -225,6 +226,7 @@ + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */ + OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */ ++ OMAP3_CORE1_IOPAD(0x20ba, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs6.gpio_57 */ + >; + }; + }; +-- +2.20.1 + diff --git a/queue-4.9/arm64-cpufeature-fix-ctr_el0-field-definitions.patch b/queue-4.9/arm64-cpufeature-fix-ctr_el0-field-definitions.patch new file mode 100644 index 00000000000..771542183f4 --- /dev/null +++ b/queue-4.9/arm64-cpufeature-fix-ctr_el0-field-definitions.patch @@ -0,0 +1,51 @@ +From ed974eebaf7b8d467b91cde0cea64bc14d7a6ca7 Mon Sep 17 00:00:00 2001 +From: Will Deacon +Date: Mon, 5 Aug 2019 18:13:54 +0100 +Subject: arm64: cpufeature: Fix CTR_EL0 field definitions + +commit be68a8aaf925aaf35574260bf820bb09d2f9e07f upstream. + +Our field definitions for CTR_EL0 suffer from a number of problems: + + - The IDC and DIC fields are missing, which causes us to enable CTR + trapping on CPUs with either of these returning non-zero values. + + - The ERG is FTR_LOWER_SAFE, whereas it should be treated like CWG as + FTR_HIGHER_SAFE so that applications can use it to avoid false sharing. + + - [nit] A RES1 field is described as "RAO" + +This patch updates the CTR_EL0 field definitions to fix these issues. + +Cc: # 4.9.y only +Cc: Shanker Donthineni +Signed-off-by: Will Deacon +Signed-off-by: Will Deacon +Signed-off-by: Sasha Levin +--- + arch/arm64/kernel/cpufeature.c | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c +index a3ab7dfad50a7..e2ac72b7e89ca 100644 +--- a/arch/arm64/kernel/cpufeature.c ++++ b/arch/arm64/kernel/cpufeature.c +@@ -148,10 +148,12 @@ static const struct arm64_ftr_bits ftr_id_aa64mmfr2[] = { + }; + + static const struct arm64_ftr_bits ftr_ctr[] = { +- ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 31, 1, 1), /* RAO */ +- ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 28, 3, 0), ++ ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 31, 1, 1), /* RES1 */ ++ ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 30, 1, 0), ++ ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, 29, 1, 1), /* DIC */ ++ ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, 28, 1, 1), /* IDC */ + ARM64_FTR_BITS(FTR_STRICT, FTR_HIGHER_SAFE, 24, 4, 0), /* CWG */ +- ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, 20, 4, 0), /* ERG */ ++ ARM64_FTR_BITS(FTR_STRICT, FTR_HIGHER_SAFE, 20, 4, 0), /* ERG */ + ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, CTR_DMINLINE_SHIFT, 4, 1), + /* + * Linux can handle differing I-cache policies. Userspace JITs will +-- +2.20.1 + diff --git a/queue-4.9/arm64-cpufeature-fix-feature-comparison-for-ctr_el0..patch b/queue-4.9/arm64-cpufeature-fix-feature-comparison-for-ctr_el0..patch new file mode 100644 index 00000000000..e5fb84215c2 --- /dev/null +++ b/queue-4.9/arm64-cpufeature-fix-feature-comparison-for-ctr_el0..patch @@ -0,0 +1,74 @@ +From 56b31db2aef1bae9ef9c45c449dbee15c195e78d Mon Sep 17 00:00:00 2001 +From: Will Deacon +Date: Mon, 5 Aug 2019 18:13:55 +0100 +Subject: arm64: cpufeature: Fix feature comparison for CTR_EL0.{CWG,ERG} + +commit 147b9635e6347104b91f48ca9dca61eb0fbf2a54 upstream. + +If CTR_EL0.{CWG,ERG} are 0b0000 then they must be interpreted to have +their architecturally maximum values, which defeats the use of +FTR_HIGHER_SAFE when sanitising CPU ID registers on heterogeneous +machines. + +Introduce FTR_HIGHER_OR_ZERO_SAFE so that these fields effectively +saturate at zero. + +Fixes: 3c739b571084 ("arm64: Keep track of CPU feature registers") +Cc: # 4.9.y only +Reviewed-by: Suzuki K Poulose +Acked-by: Mark Rutland +Signed-off-by: Will Deacon +Signed-off-by: Catalin Marinas +Signed-off-by: Sasha Levin +--- + arch/arm64/include/asm/cpufeature.h | 7 ++++--- + arch/arm64/kernel/cpufeature.c | 8 ++++++-- + 2 files changed, 10 insertions(+), 5 deletions(-) + +diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h +index 15868eca58de0..e7bef3d936d87 100644 +--- a/arch/arm64/include/asm/cpufeature.h ++++ b/arch/arm64/include/asm/cpufeature.h +@@ -31,9 +31,10 @@ + + /* CPU feature register tracking */ + enum ftr_type { +- FTR_EXACT, /* Use a predefined safe value */ +- FTR_LOWER_SAFE, /* Smaller value is safe */ +- FTR_HIGHER_SAFE,/* Bigger value is safe */ ++ FTR_EXACT, /* Use a predefined safe value */ ++ FTR_LOWER_SAFE, /* Smaller value is safe */ ++ FTR_HIGHER_SAFE, /* Bigger value is safe */ ++ FTR_HIGHER_OR_ZERO_SAFE, /* Bigger value is safe, but 0 is biggest */ + }; + + #define FTR_STRICT true /* SANITY check strict matching required */ +diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c +index e2ac72b7e89ca..9a8e45dc36bd0 100644 +--- a/arch/arm64/kernel/cpufeature.c ++++ b/arch/arm64/kernel/cpufeature.c +@@ -152,8 +152,8 @@ static const struct arm64_ftr_bits ftr_ctr[] = { + ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 30, 1, 0), + ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, 29, 1, 1), /* DIC */ + ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, 28, 1, 1), /* IDC */ +- ARM64_FTR_BITS(FTR_STRICT, FTR_HIGHER_SAFE, 24, 4, 0), /* CWG */ +- ARM64_FTR_BITS(FTR_STRICT, FTR_HIGHER_SAFE, 20, 4, 0), /* ERG */ ++ ARM64_FTR_BITS(FTR_STRICT, FTR_HIGHER_OR_ZERO_SAFE, 24, 4, 0), /* CWG */ ++ ARM64_FTR_BITS(FTR_STRICT, FTR_HIGHER_OR_ZERO_SAFE, 20, 4, 0), /* ERG */ + ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, CTR_DMINLINE_SHIFT, 4, 1), + /* + * Linux can handle differing I-cache policies. Userspace JITs will +@@ -392,6 +392,10 @@ static s64 arm64_ftr_safe_value(const struct arm64_ftr_bits *ftrp, s64 new, + case FTR_LOWER_SAFE: + ret = new < cur ? new : cur; + break; ++ case FTR_HIGHER_OR_ZERO_SAFE: ++ if (!cur || !new) ++ break; ++ /* Fallthrough */ + case FTR_HIGHER_SAFE: + ret = new > cur ? new : cur; + break; +-- +2.20.1 + diff --git a/queue-4.9/series b/queue-4.9/series index 2ed9af49ccd..e09a14ca37f 100644 --- a/queue-4.9/series +++ b/queue-4.9/series @@ -1 +1,6 @@ scsi-fcoe-embed-fc_rport_priv-in-fcoe_rport-structure.patch +arm-dts-add-pinmuxing-for-i2c2-and-i2c3-for-logicpd-.patch +arm-dts-add-pinmuxing-for-i2c2-and-i2c3-for-logicpd-.patch-5864 +arm-dts-logicpd-som-lv-fix-audio-mute.patch +arm64-cpufeature-fix-ctr_el0-field-definitions.patch +arm64-cpufeature-fix-feature-comparison-for-ctr_el0..patch -- 2.47.3