From 61162c6f89d1e07788c5bd8a9b7f778102f8a1eb Mon Sep 17 00:00:00 2001 From: Steven Lee Date: Fri, 23 May 2025 17:31:39 +0800 Subject: [PATCH] hw/arm/aspeed_ast2700-fc: Reduce ca35 ram size to align with ast2700a1 MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Reduce ca35 ram size from 2GiB to 1GiB to align with ast2700a1-evb, where the ram-container is defined as 1GiB in its class. Signed-off-by: Steven Lee Reviewed-by: Cédric Le Goater Link: https://lore.kernel.org/qemu-devel/20250523093144.991408-3-steven_lee@aspeedtech.com Signed-off-by: Cédric Le Goater --- hw/arm/aspeed_ast27x0-fc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/aspeed_ast27x0-fc.c b/hw/arm/aspeed_ast27x0-fc.c index 7bf4f2a52d..f8cb632bca 100644 --- a/hw/arm/aspeed_ast27x0-fc.c +++ b/hw/arm/aspeed_ast27x0-fc.c @@ -48,7 +48,7 @@ struct Ast2700FCState { bool mmio_exec; }; -#define AST2700FC_BMC_RAM_SIZE (2 * GiB) +#define AST2700FC_BMC_RAM_SIZE (1 * GiB) #define AST2700FC_CM4_DRAM_SIZE (32 * MiB) #define AST2700FC_HW_STRAP1 0x000000C0 -- 2.39.5