From 66ff0ae9e124b035d361c66515ef163d7431dd22 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Sun, 13 Aug 2017 15:33:42 -0700 Subject: [PATCH] 4.9-stable patches added patches: iio-adc-vf610_adc-fix-valt-selection-value-for-refsel-bits.patch pinctrl-intel-merrifield-correct-uart-pin-lists.patch pinctrl-meson-gxbb-add-missing-gpiodv_18-pin-entry.patch pinctrl-samsung-remove-bogus-irq_mask-from-resource-management.patch pinctrl-sunxi-add-a-missing-function-of-a10-a20-pinctrl-driver.patch pinctrl-uniphier-fix-warn_on-of-pingroups-dump-on-ld11.patch pinctrl-uniphier-fix-warn_on-of-pingroups-dump-on-ld20.patch pnfs-blocklayout-require-64-bit-sector_t.patch --- ...valt-selection-value-for-refsel-bits.patch | 35 ++ ...el-merrifield-correct-uart-pin-lists.patch | 37 ++ ...gxbb-add-missing-gpiodv_18-pin-entry.patch | 31 ++ ...us-irq_mask-from-resource-management.patch | 57 +++ ...g-function-of-a10-a20-pinctrl-driver.patch | 42 ++ ...ix-warn_on-of-pingroups-dump-on-ld11.patch | 421 +++++++++++++++++ ...ix-warn_on-of-pingroups-dump-on-ld20.patch | 446 ++++++++++++++++++ ...-blocklayout-require-64-bit-sector_t.patch | 33 ++ queue-4.9/series | 8 + 9 files changed, 1110 insertions(+) create mode 100644 queue-4.9/iio-adc-vf610_adc-fix-valt-selection-value-for-refsel-bits.patch create mode 100644 queue-4.9/pinctrl-intel-merrifield-correct-uart-pin-lists.patch create mode 100644 queue-4.9/pinctrl-meson-gxbb-add-missing-gpiodv_18-pin-entry.patch create mode 100644 queue-4.9/pinctrl-samsung-remove-bogus-irq_mask-from-resource-management.patch create mode 100644 queue-4.9/pinctrl-sunxi-add-a-missing-function-of-a10-a20-pinctrl-driver.patch create mode 100644 queue-4.9/pinctrl-uniphier-fix-warn_on-of-pingroups-dump-on-ld11.patch create mode 100644 queue-4.9/pinctrl-uniphier-fix-warn_on-of-pingroups-dump-on-ld20.patch create mode 100644 queue-4.9/pnfs-blocklayout-require-64-bit-sector_t.patch diff --git a/queue-4.9/iio-adc-vf610_adc-fix-valt-selection-value-for-refsel-bits.patch b/queue-4.9/iio-adc-vf610_adc-fix-valt-selection-value-for-refsel-bits.patch new file mode 100644 index 00000000000..0ded55fce40 --- /dev/null +++ b/queue-4.9/iio-adc-vf610_adc-fix-valt-selection-value-for-refsel-bits.patch @@ -0,0 +1,35 @@ +From d466d3c1217406b14b834335b5b4b33c0d45bd09 Mon Sep 17 00:00:00 2001 +From: Stefan-Gabriel Mirea +Date: Thu, 6 Jul 2017 10:06:41 +0100 +Subject: iio: adc: vf610_adc: Fix VALT selection value for REFSEL bits + +From: Stefan-Gabriel Mirea + +commit d466d3c1217406b14b834335b5b4b33c0d45bd09 upstream. + +In order to select the alternate voltage reference pair (VALTH/VALTL), the +right value for the REFSEL field in the ADCx_CFG register is "01", leading +to 0x800 as register mask. See section 8.2.6.4 in the reference manual[1]. + +[1] http://www.nxp.com/docs/en/reference-manual/VFXXXRM.pdf + +Fixes: a775427632fd ("iio:adc:imx: add Freescale Vybrid vf610 adc driver") +Signed-off-by: Stefan-Gabriel Mirea +Signed-off-by: Jonathan Cameron +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/iio/adc/vf610_adc.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/iio/adc/vf610_adc.c ++++ b/drivers/iio/adc/vf610_adc.c +@@ -77,7 +77,7 @@ + #define VF610_ADC_ADSTS_MASK 0x300 + #define VF610_ADC_ADLPC_EN 0x80 + #define VF610_ADC_ADHSC_EN 0x400 +-#define VF610_ADC_REFSEL_VALT 0x100 ++#define VF610_ADC_REFSEL_VALT 0x800 + #define VF610_ADC_REFSEL_VBG 0x1000 + #define VF610_ADC_ADTRG_HARD 0x2000 + #define VF610_ADC_AVGS_8 0x4000 diff --git a/queue-4.9/pinctrl-intel-merrifield-correct-uart-pin-lists.patch b/queue-4.9/pinctrl-intel-merrifield-correct-uart-pin-lists.patch new file mode 100644 index 00000000000..1e7e88de113 --- /dev/null +++ b/queue-4.9/pinctrl-intel-merrifield-correct-uart-pin-lists.patch @@ -0,0 +1,37 @@ +From 5d996132d921c391af5f267123eca1a6a3148ecd Mon Sep 17 00:00:00 2001 +From: Andy Shevchenko +Date: Fri, 4 Aug 2017 19:26:34 +0300 +Subject: pinctrl: intel: merrifield: Correct UART pin lists + +From: Andy Shevchenko + +commit 5d996132d921c391af5f267123eca1a6a3148ecd upstream. + +UART pin lists consist GPIO numbers which is simply wrong. +Replace it by pin numbers. + +Fixes: 4e80c8f50574 ("pinctrl: intel: Add Intel Merrifield pin controller support") +Signed-off-by: Andy Shevchenko +Acked-by: Mika Westerberg +Signed-off-by: Linus Walleij +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/pinctrl/intel/pinctrl-merrifield.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/drivers/pinctrl/intel/pinctrl-merrifield.c ++++ b/drivers/pinctrl/intel/pinctrl-merrifield.c +@@ -343,9 +343,9 @@ static const struct pinctrl_pin_desc mrf + + static const unsigned int mrfld_sdio_pins[] = { 50, 51, 52, 53, 54, 55, 56 }; + static const unsigned int mrfld_spi5_pins[] = { 90, 91, 92, 93, 94, 95, 96 }; +-static const unsigned int mrfld_uart0_pins[] = { 124, 125, 126, 127 }; +-static const unsigned int mrfld_uart1_pins[] = { 128, 129, 130, 131 }; +-static const unsigned int mrfld_uart2_pins[] = { 132, 133, 134, 135 }; ++static const unsigned int mrfld_uart0_pins[] = { 115, 116, 117, 118 }; ++static const unsigned int mrfld_uart1_pins[] = { 119, 120, 121, 122 }; ++static const unsigned int mrfld_uart2_pins[] = { 123, 124, 125, 126 }; + static const unsigned int mrfld_pwm0_pins[] = { 144 }; + static const unsigned int mrfld_pwm1_pins[] = { 145 }; + static const unsigned int mrfld_pwm2_pins[] = { 132 }; diff --git a/queue-4.9/pinctrl-meson-gxbb-add-missing-gpiodv_18-pin-entry.patch b/queue-4.9/pinctrl-meson-gxbb-add-missing-gpiodv_18-pin-entry.patch new file mode 100644 index 00000000000..421a0c0ecfe --- /dev/null +++ b/queue-4.9/pinctrl-meson-gxbb-add-missing-gpiodv_18-pin-entry.patch @@ -0,0 +1,31 @@ +From 34e61801a3b9df74b69f0e359d64a197a77dd6ac Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Tue, 23 May 2017 16:09:19 +0200 +Subject: pinctrl: meson-gxbb: Add missing GPIODV_18 pin entry + +From: Neil Armstrong + +commit 34e61801a3b9df74b69f0e359d64a197a77dd6ac upstream. + +GPIODV_18 entry was missing in the original driver push. + +Fixes: 468c234f9ed7 ("pinctrl: amlogic: Add support for Amlogic Meson GXBB SoC") +Signed-off-by: Neil Armstrong +Reviewed-by: Jerome Brunet +Signed-off-by: Linus Walleij +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c ++++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c +@@ -85,6 +85,7 @@ static const struct pinctrl_pin_desc mes + MESON_PIN(GPIODV_15, EE_OFF), + MESON_PIN(GPIODV_16, EE_OFF), + MESON_PIN(GPIODV_17, EE_OFF), ++ MESON_PIN(GPIODV_18, EE_OFF), + MESON_PIN(GPIODV_19, EE_OFF), + MESON_PIN(GPIODV_20, EE_OFF), + MESON_PIN(GPIODV_21, EE_OFF), diff --git a/queue-4.9/pinctrl-samsung-remove-bogus-irq_mask-from-resource-management.patch b/queue-4.9/pinctrl-samsung-remove-bogus-irq_mask-from-resource-management.patch new file mode 100644 index 00000000000..c4e4aa834de --- /dev/null +++ b/queue-4.9/pinctrl-samsung-remove-bogus-irq_mask-from-resource-management.patch @@ -0,0 +1,57 @@ +From 3fa53ec2ed885b0aec3f0472e3b4a8a6f1cd748c Mon Sep 17 00:00:00 2001 +From: Thomas Gleixner +Date: Thu, 29 Jun 2017 23:33:35 +0200 +Subject: pinctrl: samsung: Remove bogus irq_[un]mask from resource management + +From: Thomas Gleixner + +commit 3fa53ec2ed885b0aec3f0472e3b4a8a6f1cd748c upstream. + +The irq chip callbacks irq_request/release_resources() have absolutely no +business with masking and unmasking the irq. + +The core code unmasks the interrupt after complete setup and masks it +before invoking irq_release_resources(). + +The unmask is actually harmful as it happens before the interrupt is +completely initialized in __setup_irq(). + +Remove it. + +Fixes: f6a8249f9e55 ("pinctrl: exynos: Lock GPIOs as interrupts when used as EINTs") +Signed-off-by: Thomas Gleixner +Cc: Krzysztof Kozlowski +Cc: Sylwester Nawrocki +Cc: Linus Walleij +Cc: Kukjin Kim +Cc: linux-arm-kernel@lists.infradead.org +Cc: linux-samsung-soc@vger.kernel.org +Cc: linux-gpio@vger.kernel.org +Acked-by: Tomasz Figa +Signed-off-by: Linus Walleij +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/pinctrl/samsung/pinctrl-exynos.c | 4 ---- + 1 file changed, 4 deletions(-) + +--- a/drivers/pinctrl/samsung/pinctrl-exynos.c ++++ b/drivers/pinctrl/samsung/pinctrl-exynos.c +@@ -195,8 +195,6 @@ static int exynos_irq_request_resources( + + spin_unlock_irqrestore(&bank->slock, flags); + +- exynos_irq_unmask(irqd); +- + return 0; + } + +@@ -217,8 +215,6 @@ static void exynos_irq_release_resources + shift = irqd->hwirq * bank_type->fld_width[PINCFG_TYPE_FUNC]; + mask = (1 << bank_type->fld_width[PINCFG_TYPE_FUNC]) - 1; + +- exynos_irq_mask(irqd); +- + spin_lock_irqsave(&bank->slock, flags); + + con = readl(d->virt_base + reg_con); diff --git a/queue-4.9/pinctrl-sunxi-add-a-missing-function-of-a10-a20-pinctrl-driver.patch b/queue-4.9/pinctrl-sunxi-add-a-missing-function-of-a10-a20-pinctrl-driver.patch new file mode 100644 index 00000000000..afacd628c7b --- /dev/null +++ b/queue-4.9/pinctrl-sunxi-add-a-missing-function-of-a10-a20-pinctrl-driver.patch @@ -0,0 +1,42 @@ +From d81ece747d8727bb8b1cfc9a20dbe62f09a4e35a Mon Sep 17 00:00:00 2001 +From: Icenowy Zheng +Date: Sat, 22 Jul 2017 10:50:53 +0800 +Subject: pinctrl: sunxi: add a missing function of A10/A20 pinctrl driver + +From: Icenowy Zheng + +commit d81ece747d8727bb8b1cfc9a20dbe62f09a4e35a upstream. + +The PH16 pin has a function with mux id 0x5, which is the DET pin of the +"sim" (smart card reader) IP block. + +This function is missing in old versions of A10/A20 SoCs' datasheets and +user manuals, so it's also missing in the old drivers. The newest A10 +Datasheet V1.70 and A20 Datasheet V1.41 contain this pin function, and +it's discovered during implementing R40 pinctrl driver. + +Add it to the driver. As we now merged A20 pinctrl driver to the A10 +one, we need to only fix the A10 driver now. + +Fixes: f2821b1ca3a2 ("pinctrl: sunxi: Move Allwinner A10 pinctrl +driver to a driver of its own") + +Signed-off-by: Icenowy Zheng +Reviewed-by: Chen-Yu Tsai +Signed-off-by: Linus Walleij +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c ++++ b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c +@@ -811,6 +811,7 @@ static const struct sunxi_desc_pin sun4i + SUNXI_FUNCTION(0x2, "lcd1"), /* D16 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAD12 */ + SUNXI_FUNCTION(0x4, "keypad"), /* IN6 */ ++ SUNXI_FUNCTION(0x5, "sim"), /* DET */ + SUNXI_FUNCTION_IRQ(0x6, 16), /* EINT16 */ + SUNXI_FUNCTION(0x7, "csi1")), /* D16 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17), diff --git a/queue-4.9/pinctrl-uniphier-fix-warn_on-of-pingroups-dump-on-ld11.patch b/queue-4.9/pinctrl-uniphier-fix-warn_on-of-pingroups-dump-on-ld11.patch new file mode 100644 index 00000000000..a0431e30b24 --- /dev/null +++ b/queue-4.9/pinctrl-uniphier-fix-warn_on-of-pingroups-dump-on-ld11.patch @@ -0,0 +1,421 @@ +From 9592bc256d50481dfcdba93890e576a728fb373c Mon Sep 17 00:00:00 2001 +From: Masahiro Yamada +Date: Wed, 14 Jun 2017 13:49:29 +0900 +Subject: pinctrl: uniphier: fix WARN_ON() of pingroups dump on LD11 + +From: Masahiro Yamada + +commit 9592bc256d50481dfcdba93890e576a728fb373c upstream. + +The pingroups dump of debugfs hits WARN_ON() in pinctrl_groups_show(). +Filling non-existing ports with '-1' turned out a bad idea. + +Fixes: 70f2f9c4cf25 ("pinctrl: uniphier: add UniPhier PH1-LD11 pinctrl driver") +Signed-off-by: Masahiro Yamada +Signed-off-by: Linus Walleij +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c | 364 ++++++++++++----------- + 1 file changed, 192 insertions(+), 172 deletions(-) + +--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c ++++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c +@@ -508,57 +508,71 @@ static const unsigned usb1_pins[] = {48, + static const int usb1_muxvals[] = {0, 0}; + static const unsigned usb2_pins[] = {50, 51}; + static const int usb2_muxvals[] = {0, 0}; +-static const unsigned port_range_pins[] = { ++static const unsigned port_range0_pins[] = { + 159, 160, 161, 162, 163, 164, 165, 166, /* PORT0x */ + 0, 1, 2, 3, 4, 5, 6, 7, /* PORT1x */ + 8, 9, 10, 11, 12, 13, 14, 15, /* PORT2x */ +- 16, 17, 18, -1, -1, -1, -1, -1, /* PORT3x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT4x */ +- -1, -1, -1, 46, 47, 48, 49, 50, /* PORT5x */ +- 51, -1, -1, 54, 55, 56, 57, 58, /* PORT6x */ ++ 16, 17, 18, /* PORT30-32 */ ++}; ++static const int port_range0_muxvals[] = { ++ 15, 15, 15, 15, 15, 15, 15, 15, /* PORT0x */ ++ 15, 15, 15, 15, 15, 15, 15, 15, /* PORT1x */ ++ 15, 15, 15, 15, 15, 15, 15, 15, /* PORT2x */ ++ 15, 15, 15, /* PORT30-32 */ ++}; ++static const unsigned port_range1_pins[] = { ++ 46, 47, 48, 49, 50, /* PORT53-57 */ ++ 51, /* PORT60 */ ++}; ++static const int port_range1_muxvals[] = { ++ 15, 15, 15, 15, 15, /* PORT53-57 */ ++ 15, /* PORT60 */ ++}; ++static const unsigned port_range2_pins[] = { ++ 54, 55, 56, 57, 58, /* PORT63-67 */ + 59, 60, 69, 70, 71, 72, 73, 74, /* PORT7x */ + 75, 76, 77, 78, 79, 80, 81, 82, /* PORT8x */ + 83, 84, 85, 86, 87, 88, 89, 90, /* PORT9x */ + 91, 92, 93, 94, 95, 96, 97, 98, /* PORT10x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT11x */ +- 99, 100, 101, 102, 103, 104, 105, 106, /* PORT12x */ +- 107, 108, 109, 110, 111, 112, 113, 114, /* PORT13x */ +- 115, 116, 117, 118, 119, 120, 121, 122, /* PORT14x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT15x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT16x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT17x */ +- 61, 62, 63, 64, 65, 66, 67, 68, /* PORT18x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT19x */ +- 123, 124, 125, 126, 127, 128, 129, 130, /* PORT20x */ +- 131, 132, 133, 134, 135, 136, 137, 138, /* PORT21x */ +- 139, 140, 141, 142, -1, -1, -1, -1, /* PORT22x */ +- 147, 148, 149, 150, 151, 152, 153, 154, /* PORT23x */ +- 155, 156, 157, 143, 144, 145, 146, 158, /* PORT24x */ + }; +-static const int port_range_muxvals[] = { +- 15, 15, 15, 15, 15, 15, 15, 15, /* PORT0x */ +- 15, 15, 15, 15, 15, 15, 15, 15, /* PORT1x */ +- 15, 15, 15, 15, 15, 15, 15, 15, /* PORT2x */ +- 15, 15, 15, -1, -1, -1, -1, -1, /* PORT3x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT4x */ +- -1, -1, -1, 15, 15, 15, 15, 15, /* PORT5x */ +- 15, -1, -1, 15, 15, 15, 15, 15, /* PORT6x */ ++static const int port_range2_muxvals[] = { ++ 15, 15, 15, 15, 15, /* PORT63-67 */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT7x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT8x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT9x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT10x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT11x */ ++}; ++static const unsigned port_range3_pins[] = { ++ 99, 100, 101, 102, 103, 104, 105, 106, /* PORT12x */ ++ 107, 108, 109, 110, 111, 112, 113, 114, /* PORT13x */ ++ 115, 116, 117, 118, 119, 120, 121, 122, /* PORT14x */ ++}; ++static const int port_range3_muxvals[] = { + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT12x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT13x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT14x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT15x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT16x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT17x */ ++}; ++static const unsigned port_range4_pins[] = { ++ 61, 62, 63, 64, 65, 66, 67, 68, /* PORT18x */ ++}; ++static const int port_range4_muxvals[] = { + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT18x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT19x */ ++}; ++static const unsigned port_range5_pins[] = { ++ 123, 124, 125, 126, 127, 128, 129, 130, /* PORT20x */ ++ 131, 132, 133, 134, 135, 136, 137, 138, /* PORT21x */ ++ 139, 140, 141, 142, /* PORT220-223 */ ++}; ++static const int port_range5_muxvals[] = { + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT20x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT21x */ +- 15, 15, 15, 15, -1, -1, -1, -1, /* PORT22x */ ++ 15, 15, 15, 15, /* PORT220-223 */ ++}; ++static const unsigned port_range6_pins[] = { ++ 147, 148, 149, 150, 151, 152, 153, 154, /* PORT23x */ ++ 155, 156, 157, 143, 144, 145, 146, 158, /* PORT24x */ ++}; ++static const int port_range6_muxvals[] = { + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT23x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT24x */ + }; +@@ -607,147 +621,153 @@ static const struct uniphier_pinctrl_gro + UNIPHIER_PINCTRL_GROUP(usb0), + UNIPHIER_PINCTRL_GROUP(usb1), + UNIPHIER_PINCTRL_GROUP(usb2), +- UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range), ++ UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range0), ++ UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range1), ++ UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range2), ++ UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range3), ++ UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range4), ++ UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range5), ++ UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range6), + UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_IRQ(xirq), + UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_IRQ(xirq_alternatives), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port00, port_range, 0), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port01, port_range, 1), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port02, port_range, 2), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port03, port_range, 3), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port04, port_range, 4), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port05, port_range, 5), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port06, port_range, 6), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port07, port_range, 7), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port10, port_range, 8), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port11, port_range, 9), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port12, port_range, 10), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port13, port_range, 11), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port14, port_range, 12), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port15, port_range, 13), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port16, port_range, 14), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port17, port_range, 15), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port20, port_range, 16), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port21, port_range, 17), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port22, port_range, 18), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port23, port_range, 19), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port24, port_range, 20), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port25, port_range, 21), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port26, port_range, 22), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port27, port_range, 23), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port30, port_range, 24), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port31, port_range, 25), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port32, port_range, 26), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port53, port_range, 43), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port54, port_range, 44), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port55, port_range, 45), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port56, port_range, 46), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port57, port_range, 47), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port60, port_range, 48), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port63, port_range, 51), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port64, port_range, 52), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port65, port_range, 53), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port66, port_range, 54), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port67, port_range, 55), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port70, port_range, 56), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port71, port_range, 57), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port72, port_range, 58), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port73, port_range, 59), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port74, port_range, 60), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port75, port_range, 61), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port76, port_range, 62), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port77, port_range, 63), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port80, port_range, 64), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port81, port_range, 65), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port82, port_range, 66), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port83, port_range, 67), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port84, port_range, 68), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port85, port_range, 69), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port86, port_range, 70), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port87, port_range, 71), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port90, port_range, 72), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port91, port_range, 73), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port92, port_range, 74), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port93, port_range, 75), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port94, port_range, 76), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port95, port_range, 77), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port96, port_range, 78), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port97, port_range, 79), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port100, port_range, 80), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port101, port_range, 81), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port102, port_range, 82), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port103, port_range, 83), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port104, port_range, 84), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port105, port_range, 85), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port106, port_range, 86), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port107, port_range, 87), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port120, port_range, 96), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port121, port_range, 97), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port122, port_range, 98), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port123, port_range, 99), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port124, port_range, 100), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port125, port_range, 101), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port126, port_range, 102), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port127, port_range, 103), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port130, port_range, 104), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port131, port_range, 105), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port132, port_range, 106), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port133, port_range, 107), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port134, port_range, 108), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port135, port_range, 109), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port136, port_range, 110), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port137, port_range, 111), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port140, port_range, 112), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port141, port_range, 113), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port142, port_range, 114), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port143, port_range, 115), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port144, port_range, 116), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port145, port_range, 117), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port146, port_range, 118), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port147, port_range, 119), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port180, port_range, 144), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port181, port_range, 145), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port182, port_range, 146), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port183, port_range, 147), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port184, port_range, 148), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port185, port_range, 149), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port186, port_range, 150), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port187, port_range, 151), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port200, port_range, 160), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port201, port_range, 161), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port202, port_range, 162), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port203, port_range, 163), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port204, port_range, 164), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port205, port_range, 165), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port206, port_range, 166), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port207, port_range, 167), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port210, port_range, 168), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port211, port_range, 169), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port212, port_range, 170), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port213, port_range, 171), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port214, port_range, 172), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port215, port_range, 173), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port216, port_range, 174), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port217, port_range, 175), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port220, port_range, 176), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port221, port_range, 177), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port222, port_range, 178), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port223, port_range, 179), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port230, port_range, 184), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port231, port_range, 185), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port232, port_range, 186), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port233, port_range, 187), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port234, port_range, 188), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port235, port_range, 189), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port236, port_range, 190), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port237, port_range, 191), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port240, port_range, 192), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port241, port_range, 193), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port242, port_range, 194), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port243, port_range, 195), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port244, port_range, 196), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port245, port_range, 197), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port246, port_range, 198), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port247, port_range, 199), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port00, port_range0, 0), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port01, port_range0, 1), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port02, port_range0, 2), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port03, port_range0, 3), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port04, port_range0, 4), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port05, port_range0, 5), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port06, port_range0, 6), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port07, port_range0, 7), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port10, port_range0, 8), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port11, port_range0, 9), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port12, port_range0, 10), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port13, port_range0, 11), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port14, port_range0, 12), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port15, port_range0, 13), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port16, port_range0, 14), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port17, port_range0, 15), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port20, port_range0, 16), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port21, port_range0, 17), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port22, port_range0, 18), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port23, port_range0, 19), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port24, port_range0, 20), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port25, port_range0, 21), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port26, port_range0, 22), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port27, port_range0, 23), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port30, port_range0, 24), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port31, port_range0, 25), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port32, port_range0, 26), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port53, port_range1, 0), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port54, port_range1, 1), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port55, port_range1, 2), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port56, port_range1, 3), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port57, port_range1, 4), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port60, port_range1, 5), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port63, port_range2, 0), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port64, port_range2, 1), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port65, port_range2, 2), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port66, port_range2, 3), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port67, port_range2, 4), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port70, port_range2, 5), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port71, port_range2, 6), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port72, port_range2, 7), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port73, port_range2, 8), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port74, port_range2, 9), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port75, port_range2, 10), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port76, port_range2, 11), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port77, port_range2, 12), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port80, port_range2, 13), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port81, port_range2, 14), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port82, port_range2, 15), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port83, port_range2, 16), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port84, port_range2, 17), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port85, port_range2, 18), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port86, port_range2, 19), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port87, port_range2, 20), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port90, port_range2, 21), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port91, port_range2, 22), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port92, port_range2, 23), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port93, port_range2, 24), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port94, port_range2, 25), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port95, port_range2, 26), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port96, port_range2, 27), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port97, port_range2, 28), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port100, port_range2, 29), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port101, port_range2, 30), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port102, port_range2, 31), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port103, port_range2, 32), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port104, port_range2, 33), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port105, port_range2, 34), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port106, port_range2, 35), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port107, port_range2, 36), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port120, port_range3, 0), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port121, port_range3, 1), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port122, port_range3, 2), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port123, port_range3, 3), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port124, port_range3, 4), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port125, port_range3, 5), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port126, port_range3, 6), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port127, port_range3, 7), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port130, port_range3, 8), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port131, port_range3, 9), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port132, port_range3, 10), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port133, port_range3, 11), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port134, port_range3, 12), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port135, port_range3, 13), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port136, port_range3, 14), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port137, port_range3, 15), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port140, port_range3, 16), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port141, port_range3, 17), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port142, port_range3, 18), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port143, port_range3, 19), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port144, port_range3, 20), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port145, port_range3, 21), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port146, port_range3, 22), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port147, port_range3, 23), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port180, port_range4, 0), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port181, port_range4, 1), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port182, port_range4, 2), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port183, port_range4, 3), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port184, port_range4, 4), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port185, port_range4, 5), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port186, port_range4, 6), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port187, port_range4, 7), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port200, port_range5, 0), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port201, port_range5, 1), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port202, port_range5, 2), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port203, port_range5, 3), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port204, port_range5, 4), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port205, port_range5, 5), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port206, port_range5, 6), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port207, port_range5, 7), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port210, port_range5, 8), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port211, port_range5, 9), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port212, port_range5, 10), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port213, port_range5, 11), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port214, port_range5, 12), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port215, port_range5, 13), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port216, port_range5, 14), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port217, port_range5, 15), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port220, port_range5, 16), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port221, port_range5, 17), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port222, port_range5, 18), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port223, port_range5, 19), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port230, port_range6, 0), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port231, port_range6, 1), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port232, port_range6, 2), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port233, port_range6, 3), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port234, port_range6, 4), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port235, port_range6, 5), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port236, port_range6, 6), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port237, port_range6, 7), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port240, port_range6, 8), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port241, port_range6, 9), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port242, port_range6, 10), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port243, port_range6, 11), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port244, port_range6, 12), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port245, port_range6, 13), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port246, port_range6, 14), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port247, port_range6, 15), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq0, xirq, 0), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq1, xirq, 1), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq2, xirq, 2), diff --git a/queue-4.9/pinctrl-uniphier-fix-warn_on-of-pingroups-dump-on-ld20.patch b/queue-4.9/pinctrl-uniphier-fix-warn_on-of-pingroups-dump-on-ld20.patch new file mode 100644 index 00000000000..1ac435ea41d --- /dev/null +++ b/queue-4.9/pinctrl-uniphier-fix-warn_on-of-pingroups-dump-on-ld20.patch @@ -0,0 +1,446 @@ +From 1bd303dc04c3f744474e77c153575087b657f7e1 Mon Sep 17 00:00:00 2001 +From: Masahiro Yamada +Date: Wed, 14 Jun 2017 13:49:30 +0900 +Subject: pinctrl: uniphier: fix WARN_ON() of pingroups dump on LD20 + +From: Masahiro Yamada + +commit 1bd303dc04c3f744474e77c153575087b657f7e1 upstream. + +The pingroups dump of debugfs hits WARN_ON() in pinctrl_groups_show(). +Filling non-existing ports with '-1' turned out a bad idea. + +Fixes: 336306ee1f2d ("pinctrl: uniphier: add UniPhier PH1-LD20 pinctrl driver") +Signed-off-by: Masahiro Yamada +Signed-off-by: Linus Walleij +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c | 383 +++++++++++------------ + 1 file changed, 194 insertions(+), 189 deletions(-) + +--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c ++++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c +@@ -597,7 +597,7 @@ static const unsigned usb2_pins[] = {50, + static const int usb2_muxvals[] = {0, 0}; + static const unsigned usb3_pins[] = {52, 53}; + static const int usb3_muxvals[] = {0, 0}; +-static const unsigned port_range_pins[] = { ++static const unsigned port_range0_pins[] = { + 168, 169, 170, 171, 172, 173, 174, 175, /* PORT0x */ + 0, 1, 2, 3, 4, 5, 6, 7, /* PORT1x */ + 8, 9, 10, 11, 12, 13, 14, 15, /* PORT2x */ +@@ -609,23 +609,8 @@ static const unsigned port_range_pins[] + 75, 76, 77, 78, 79, 80, 81, 82, /* PORT8x */ + 83, 84, 85, 86, 87, 88, 89, 90, /* PORT9x */ + 91, 92, 93, 94, 95, 96, 97, 98, /* PORT10x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT11x */ +- 99, 100, 101, 102, 103, 104, 105, 106, /* PORT12x */ +- 107, 108, 109, 110, 111, 112, 113, 114, /* PORT13x */ +- 115, 116, 117, 118, 119, 120, 121, 122, /* PORT14x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT15x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT16x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT17x */ +- 61, 62, 63, 64, 65, 66, 67, 68, /* PORT18x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT19x */ +- 123, 124, 125, 126, 127, 128, 129, 130, /* PORT20x */ +- 131, 132, 133, 134, 135, 136, 137, 138, /* PORT21x */ +- 139, 140, 141, 142, 143, 144, 145, 146, /* PORT22x */ +- 147, 148, 149, 150, 151, 152, 153, 154, /* PORT23x */ +- 155, 156, 157, 158, 159, 160, 161, 162, /* PORT24x */ +- 163, 164, 165, 166, 167, /* PORT25x */ + }; +-static const int port_range_muxvals[] = { ++static const int port_range0_muxvals[] = { + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT0x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT1x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT2x */ +@@ -637,21 +622,38 @@ static const int port_range_muxvals[] = + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT8x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT9x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT10x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT11x */ ++}; ++static const unsigned port_range1_pins[] = { ++ 99, 100, 101, 102, 103, 104, 105, 106, /* PORT12x */ ++ 107, 108, 109, 110, 111, 112, 113, 114, /* PORT13x */ ++ 115, 116, 117, 118, 119, 120, 121, 122, /* PORT14x */ ++}; ++static const int port_range1_muxvals[] = { + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT12x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT13x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT14x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT15x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT16x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT17x */ ++}; ++static const unsigned port_range2_pins[] = { ++ 61, 62, 63, 64, 65, 66, 67, 68, /* PORT18x */ ++}; ++static const int port_range2_muxvals[] = { + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT18x */ +- -1, -1, -1, -1, -1, -1, -1, -1, /* PORT19x */ ++}; ++static const unsigned port_range3_pins[] = { ++ 123, 124, 125, 126, 127, 128, 129, 130, /* PORT20x */ ++ 131, 132, 133, 134, 135, 136, 137, 138, /* PORT21x */ ++ 139, 140, 141, 142, 143, 144, 145, 146, /* PORT22x */ ++ 147, 148, 149, 150, 151, 152, 153, 154, /* PORT23x */ ++ 155, 156, 157, 158, 159, 160, 161, 162, /* PORT24x */ ++ 163, 164, 165, 166, 167, /* PORT250-254 */ ++}; ++static const int port_range3_muxvals[] = { + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT20x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT21x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT22x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT23x */ + 15, 15, 15, 15, 15, 15, 15, 15, /* PORT24x */ +- 15, 15, 15, 15, 15, /* PORT25x */ ++ 15, 15, 15, 15, 15, /* PORT250-254 */ + }; + static const unsigned xirq_pins[] = { + 149, 150, 151, 152, 153, 154, 155, 156, /* XIRQ0-7 */ +@@ -695,174 +697,177 @@ static const struct uniphier_pinctrl_gro + UNIPHIER_PINCTRL_GROUP(usb1), + UNIPHIER_PINCTRL_GROUP(usb2), + UNIPHIER_PINCTRL_GROUP(usb3), +- UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range), ++ UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range0), ++ UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range1), ++ UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range2), ++ UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(port_range3), + UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_IRQ(xirq), + UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_IRQ(xirq_alternatives), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port00, port_range, 0), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port01, port_range, 1), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port02, port_range, 2), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port03, port_range, 3), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port04, port_range, 4), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port05, port_range, 5), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port06, port_range, 6), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port07, port_range, 7), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port10, port_range, 8), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port11, port_range, 9), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port12, port_range, 10), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port13, port_range, 11), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port14, port_range, 12), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port15, port_range, 13), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port16, port_range, 14), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port17, port_range, 15), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port20, port_range, 16), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port21, port_range, 17), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port22, port_range, 18), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port23, port_range, 19), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port24, port_range, 20), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port25, port_range, 21), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port26, port_range, 22), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port27, port_range, 23), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port30, port_range, 24), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port31, port_range, 25), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port32, port_range, 26), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port33, port_range, 27), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port34, port_range, 28), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port35, port_range, 29), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port36, port_range, 30), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port37, port_range, 31), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port40, port_range, 32), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port41, port_range, 33), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port42, port_range, 34), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port43, port_range, 35), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port44, port_range, 36), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port45, port_range, 37), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port46, port_range, 38), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port47, port_range, 39), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port50, port_range, 40), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port51, port_range, 41), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port52, port_range, 42), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port53, port_range, 43), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port54, port_range, 44), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port55, port_range, 45), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port56, port_range, 46), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port57, port_range, 47), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port60, port_range, 48), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port61, port_range, 49), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port62, port_range, 50), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port63, port_range, 51), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port64, port_range, 52), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port65, port_range, 53), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port66, port_range, 54), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port67, port_range, 55), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port70, port_range, 56), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port71, port_range, 57), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port72, port_range, 58), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port73, port_range, 59), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port74, port_range, 60), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port75, port_range, 61), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port76, port_range, 62), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port77, port_range, 63), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port80, port_range, 64), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port81, port_range, 65), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port82, port_range, 66), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port83, port_range, 67), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port84, port_range, 68), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port85, port_range, 69), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port86, port_range, 70), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port87, port_range, 71), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port90, port_range, 72), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port91, port_range, 73), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port92, port_range, 74), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port93, port_range, 75), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port94, port_range, 76), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port95, port_range, 77), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port96, port_range, 78), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port97, port_range, 79), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port100, port_range, 80), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port101, port_range, 81), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port102, port_range, 82), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port103, port_range, 83), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port104, port_range, 84), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port105, port_range, 85), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port106, port_range, 86), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port107, port_range, 87), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port120, port_range, 96), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port121, port_range, 97), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port122, port_range, 98), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port123, port_range, 99), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port124, port_range, 100), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port125, port_range, 101), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port126, port_range, 102), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port127, port_range, 103), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port130, port_range, 104), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port131, port_range, 105), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port132, port_range, 106), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port133, port_range, 107), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port134, port_range, 108), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port135, port_range, 109), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port136, port_range, 110), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port137, port_range, 111), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port140, port_range, 112), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port141, port_range, 113), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port142, port_range, 114), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port143, port_range, 115), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port144, port_range, 116), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port145, port_range, 117), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port146, port_range, 118), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port147, port_range, 119), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port180, port_range, 144), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port181, port_range, 145), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port182, port_range, 146), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port183, port_range, 147), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port184, port_range, 148), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port185, port_range, 149), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port186, port_range, 150), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port187, port_range, 151), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port200, port_range, 160), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port201, port_range, 161), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port202, port_range, 162), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port203, port_range, 163), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port204, port_range, 164), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port205, port_range, 165), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port206, port_range, 166), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port207, port_range, 167), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port210, port_range, 168), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port211, port_range, 169), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port212, port_range, 170), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port213, port_range, 171), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port214, port_range, 172), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port215, port_range, 173), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port216, port_range, 174), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port217, port_range, 175), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port220, port_range, 176), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port221, port_range, 177), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port222, port_range, 178), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port223, port_range, 179), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port224, port_range, 180), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port225, port_range, 181), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port226, port_range, 182), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port227, port_range, 183), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port230, port_range, 184), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port231, port_range, 185), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port232, port_range, 186), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port233, port_range, 187), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port234, port_range, 188), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port235, port_range, 189), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port236, port_range, 190), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port237, port_range, 191), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port240, port_range, 192), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port241, port_range, 193), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port242, port_range, 194), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port243, port_range, 195), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port244, port_range, 196), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port245, port_range, 197), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port246, port_range, 198), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port247, port_range, 199), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port250, port_range, 200), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port251, port_range, 201), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port252, port_range, 202), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port253, port_range, 203), +- UNIPHIER_PINCTRL_GROUP_SINGLE(port254, port_range, 204), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port00, port_range0, 0), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port01, port_range0, 1), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port02, port_range0, 2), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port03, port_range0, 3), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port04, port_range0, 4), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port05, port_range0, 5), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port06, port_range0, 6), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port07, port_range0, 7), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port10, port_range0, 8), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port11, port_range0, 9), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port12, port_range0, 10), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port13, port_range0, 11), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port14, port_range0, 12), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port15, port_range0, 13), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port16, port_range0, 14), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port17, port_range0, 15), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port20, port_range0, 16), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port21, port_range0, 17), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port22, port_range0, 18), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port23, port_range0, 19), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port24, port_range0, 20), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port25, port_range0, 21), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port26, port_range0, 22), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port27, port_range0, 23), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port30, port_range0, 24), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port31, port_range0, 25), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port32, port_range0, 26), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port33, port_range0, 27), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port34, port_range0, 28), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port35, port_range0, 29), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port36, port_range0, 30), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port37, port_range0, 31), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port40, port_range0, 32), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port41, port_range0, 33), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port42, port_range0, 34), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port43, port_range0, 35), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port44, port_range0, 36), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port45, port_range0, 37), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port46, port_range0, 38), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port47, port_range0, 39), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port50, port_range0, 40), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port51, port_range0, 41), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port52, port_range0, 42), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port53, port_range0, 43), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port54, port_range0, 44), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port55, port_range0, 45), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port56, port_range0, 46), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port57, port_range0, 47), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port60, port_range0, 48), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port61, port_range0, 49), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port62, port_range0, 50), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port63, port_range0, 51), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port64, port_range0, 52), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port65, port_range0, 53), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port66, port_range0, 54), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port67, port_range0, 55), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port70, port_range0, 56), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port71, port_range0, 57), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port72, port_range0, 58), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port73, port_range0, 59), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port74, port_range0, 60), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port75, port_range0, 61), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port76, port_range0, 62), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port77, port_range0, 63), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port80, port_range0, 64), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port81, port_range0, 65), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port82, port_range0, 66), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port83, port_range0, 67), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port84, port_range0, 68), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port85, port_range0, 69), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port86, port_range0, 70), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port87, port_range0, 71), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port90, port_range0, 72), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port91, port_range0, 73), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port92, port_range0, 74), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port93, port_range0, 75), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port94, port_range0, 76), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port95, port_range0, 77), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port96, port_range0, 78), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port97, port_range0, 79), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port100, port_range0, 80), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port101, port_range0, 81), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port102, port_range0, 82), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port103, port_range0, 83), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port104, port_range0, 84), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port105, port_range0, 85), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port106, port_range0, 86), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port107, port_range0, 87), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port120, port_range1, 0), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port121, port_range1, 1), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port122, port_range1, 2), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port123, port_range1, 3), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port124, port_range1, 4), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port125, port_range1, 5), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port126, port_range1, 6), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port127, port_range1, 7), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port130, port_range1, 8), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port131, port_range1, 9), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port132, port_range1, 10), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port133, port_range1, 11), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port134, port_range1, 12), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port135, port_range1, 13), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port136, port_range1, 14), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port137, port_range1, 15), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port140, port_range1, 16), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port141, port_range1, 17), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port142, port_range1, 18), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port143, port_range1, 19), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port144, port_range1, 20), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port145, port_range1, 21), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port146, port_range1, 22), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port147, port_range1, 23), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port180, port_range2, 0), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port181, port_range2, 1), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port182, port_range2, 2), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port183, port_range2, 3), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port184, port_range2, 4), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port185, port_range2, 5), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port186, port_range2, 6), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port187, port_range2, 7), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port200, port_range3, 0), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port201, port_range3, 1), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port202, port_range3, 2), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port203, port_range3, 3), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port204, port_range3, 4), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port205, port_range3, 5), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port206, port_range3, 6), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port207, port_range3, 7), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port210, port_range3, 8), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port211, port_range3, 9), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port212, port_range3, 10), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port213, port_range3, 11), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port214, port_range3, 12), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port215, port_range3, 13), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port216, port_range3, 14), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port217, port_range3, 15), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port220, port_range3, 16), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port221, port_range3, 17), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port222, port_range3, 18), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port223, port_range3, 19), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port224, port_range3, 20), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port225, port_range3, 21), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port226, port_range3, 22), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port227, port_range3, 23), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port230, port_range3, 24), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port231, port_range3, 25), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port232, port_range3, 26), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port233, port_range3, 27), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port234, port_range3, 28), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port235, port_range3, 29), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port236, port_range3, 30), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port237, port_range3, 31), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port240, port_range3, 32), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port241, port_range3, 33), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port242, port_range3, 34), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port243, port_range3, 35), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port244, port_range3, 36), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port245, port_range3, 37), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port246, port_range3, 38), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port247, port_range3, 39), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port250, port_range3, 40), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port251, port_range3, 41), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port252, port_range3, 42), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port253, port_range3, 43), ++ UNIPHIER_PINCTRL_GROUP_SINGLE(port254, port_range3, 44), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq0, xirq, 0), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq1, xirq, 1), + UNIPHIER_PINCTRL_GROUP_SINGLE(xirq2, xirq, 2), diff --git a/queue-4.9/pnfs-blocklayout-require-64-bit-sector_t.patch b/queue-4.9/pnfs-blocklayout-require-64-bit-sector_t.patch new file mode 100644 index 00000000000..b2805901d8a --- /dev/null +++ b/queue-4.9/pnfs-blocklayout-require-64-bit-sector_t.patch @@ -0,0 +1,33 @@ +From 8a9d6e964d318533ba3d2901ce153ba317c99a89 Mon Sep 17 00:00:00 2001 +From: Christoph Hellwig +Date: Sat, 5 Aug 2017 10:59:14 +0200 +Subject: pnfs/blocklayout: require 64-bit sector_t + +From: Christoph Hellwig + +commit 8a9d6e964d318533ba3d2901ce153ba317c99a89 upstream. + +The blocklayout code does not compile cleanly for a 32-bit sector_t, +and also has no reliable checks for devices sizes, which makes it +unsafe to use with a kernel that doesn't support large block devices. + +Signed-off-by: Christoph Hellwig +Reported-by: Arnd Bergmann +Fixes: 5c83746a0cf2 ("pnfs/blocklayout: in-kernel GETDEVICEINFO XDR parsing") +Signed-off-by: Anna Schumaker +Signed-off-by: Greg Kroah-Hartman + +--- + fs/nfs/Kconfig | 1 + + 1 file changed, 1 insertion(+) + +--- a/fs/nfs/Kconfig ++++ b/fs/nfs/Kconfig +@@ -121,6 +121,7 @@ config PNFS_FILE_LAYOUT + config PNFS_BLOCK + tristate + depends on NFS_V4_1 && BLK_DEV_DM ++ depends on 64BIT || LBDAF + default NFS_V4 + + config PNFS_OBJLAYOUT diff --git a/queue-4.9/series b/queue-4.9/series index 65a78bc494e..39e47764b9b 100644 --- a/queue-4.9/series +++ b/queue-4.9/series @@ -30,3 +30,11 @@ usb-check-for-dropped-connection-before-switching-to-full-speed.patch usb-core-unlink-urbs-from-the-tail-of-the-endpoint-s-urb_list.patch usb-quirks-add-no-lpm-quirk-for-moshi-usb-to-ethernet-adapter.patch usb-xhci-add-quirk-for-certain-failing-hp-keyboard-on-reset-after-resume.patch +iio-adc-vf610_adc-fix-valt-selection-value-for-refsel-bits.patch +pnfs-blocklayout-require-64-bit-sector_t.patch +pinctrl-sunxi-add-a-missing-function-of-a10-a20-pinctrl-driver.patch +pinctrl-intel-merrifield-correct-uart-pin-lists.patch +pinctrl-uniphier-fix-warn_on-of-pingroups-dump-on-ld11.patch +pinctrl-uniphier-fix-warn_on-of-pingroups-dump-on-ld20.patch +pinctrl-samsung-remove-bogus-irq_mask-from-resource-management.patch +pinctrl-meson-gxbb-add-missing-gpiodv_18-pin-entry.patch -- 2.47.3