From 67ac4bf12d3ee90a252ece8ff3bbb8bf6b0bed8b Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Wed, 3 Jun 2015 11:56:44 +0900 Subject: [PATCH] 4.0-stable patches added patches: arm-8325-1-exynos-move-resume-code-to-.text-section.patch --- ...os-move-resume-code-to-.text-section.patch | 84 +++++++++++++++++++ queue-4.0/series | 1 + 2 files changed, 85 insertions(+) create mode 100644 queue-4.0/arm-8325-1-exynos-move-resume-code-to-.text-section.patch diff --git a/queue-4.0/arm-8325-1-exynos-move-resume-code-to-.text-section.patch b/queue-4.0/arm-8325-1-exynos-move-resume-code-to-.text-section.patch new file mode 100644 index 00000000000..4d3177c99c0 --- /dev/null +++ b/queue-4.0/arm-8325-1-exynos-move-resume-code-to-.text-section.patch @@ -0,0 +1,84 @@ +From 12833bacf5d904c2dac0c3f52b2ebde5f2c5a2bc Mon Sep 17 00:00:00 2001 +From: Ard Biesheuvel +Date: Wed, 25 Mar 2015 07:41:43 +0100 +Subject: ARM: 8325/1: exynos: move resume code to .text section + +From: Ard Biesheuvel + +commit 12833bacf5d904c2dac0c3f52b2ebde5f2c5a2bc upstream. + +This code calls cpu_resume() using a straight branch (b), so +now that we have moved cpu_resume() back to .text, this should +be moved there as well. Any direct references to symbols that will +remain in the .data section are replaced with explicit PC-relative +references. + +Acked-by: Nicolas Pitre +Signed-off-by: Ard Biesheuvel +Signed-off-by: Russell King +Signed-off-by: Kevin Hilman +Signed-off-by: Greg Kroah-Hartman + +--- + arch/arm/mach-exynos/sleep.S | 31 ++++++++++++++++--------------- + 1 file changed, 16 insertions(+), 15 deletions(-) + +--- a/arch/arm/mach-exynos/sleep.S ++++ b/arch/arm/mach-exynos/sleep.S +@@ -23,14 +23,7 @@ + #define CPU_MASK 0xff0ffff0 + #define CPU_CORTEX_A9 0x410fc090 + +- /* +- * The following code is located into the .data section. This is to +- * allow l2x0_regs_phys to be accessed with a relative load while we +- * can't rely on any MMU translation. We could have put l2x0_regs_phys +- * in the .text section as well, but some setups might insist on it to +- * be truly read-only. (Reference from: arch/arm/kernel/sleep.S) +- */ +- .data ++ .text + .align + + /* +@@ -69,10 +62,12 @@ ENTRY(exynos_cpu_resume_ns) + cmp r0, r1 + bne skip_cp15 + +- adr r0, cp15_save_power ++ adr r0, _cp15_save_power + ldr r1, [r0] +- adr r0, cp15_save_diag ++ ldr r1, [r0, r1] ++ adr r0, _cp15_save_diag + ldr r2, [r0] ++ ldr r2, [r0, r2] + mov r0, #SMC_CMD_C15RESUME + dsb + smc #0 +@@ -118,14 +113,20 @@ skip_l2x0: + skip_cp15: + b cpu_resume + ENDPROC(exynos_cpu_resume_ns) ++ ++ .align ++_cp15_save_power: ++ .long cp15_save_power - . ++_cp15_save_diag: ++ .long cp15_save_diag - . ++#ifdef CONFIG_CACHE_L2X0 ++1: .long l2x0_saved_regs - . ++#endif /* CONFIG_CACHE_L2X0 */ ++ ++ .data + .globl cp15_save_diag + cp15_save_diag: + .long 0 @ cp15 diagnostic + .globl cp15_save_power + cp15_save_power: + .long 0 @ cp15 power control +- +-#ifdef CONFIG_CACHE_L2X0 +- .align +-1: .long l2x0_saved_regs - . +-#endif /* CONFIG_CACHE_L2X0 */ diff --git a/queue-4.0/series b/queue-4.0/series index 49137588b5d..e5e740109a7 100644 --- a/queue-4.0/series +++ b/queue-4.0/series @@ -92,3 +92,4 @@ libata-ignore-spurious-phy-event-on-lpm-policy-change.patch libata-blacklist-queued-trim-on-all-samsung-800-series.patch arm64-bpf-fix-signedness-bug-in-loading-64-bit-immediate.patch rt2x00-add-new-rt2800usb-device-dwa-130.patch +arm-8325-1-exynos-move-resume-code-to-.text-section.patch -- 2.47.3