From 6a2afbfe3d62a67cd123682906e692d5232b4968 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Fri, 21 Jul 2023 06:45:10 +0200 Subject: [PATCH] 5.4-stable patches added patches: mtd-rawnand-meson-fix-unaligned-dma-buffers-handling.patch net-bcmgenet-ensure-mdio-unregistration-has-clocks-enabled.patch pinctrl-amd-detect-internal-gpio0-debounce-handling.patch pinctrl-amd-fix-mistake-in-handling-clearing-pins-at-startup.patch pinctrl-amd-only-use-special-debounce-behavior-for-gpio-0.patch tpm-tpm_vtpm_proxy-fix-a-race-condition-in-dev-vtpmx-creation.patch --- ...n-fix-unaligned-dma-buffers-handling.patch | 44 ++++++++++ ...io-unregistration-has-clocks-enabled.patch | 39 +++++++++ ...ect-internal-gpio0-debounce-handling.patch | 77 ++++++++++++++++++ ...in-handling-clearing-pins-at-startup.patch | 39 +++++++++ ...special-debounce-behavior-for-gpio-0.patch | 40 ++++++++++ queue-5.4/series | 6 ++ ...race-condition-in-dev-vtpmx-creation.patch | 80 +++++++++++++++++++ 7 files changed, 325 insertions(+) create mode 100644 queue-5.4/mtd-rawnand-meson-fix-unaligned-dma-buffers-handling.patch create mode 100644 queue-5.4/net-bcmgenet-ensure-mdio-unregistration-has-clocks-enabled.patch create mode 100644 queue-5.4/pinctrl-amd-detect-internal-gpio0-debounce-handling.patch create mode 100644 queue-5.4/pinctrl-amd-fix-mistake-in-handling-clearing-pins-at-startup.patch create mode 100644 queue-5.4/pinctrl-amd-only-use-special-debounce-behavior-for-gpio-0.patch create mode 100644 queue-5.4/tpm-tpm_vtpm_proxy-fix-a-race-condition-in-dev-vtpmx-creation.patch diff --git a/queue-5.4/mtd-rawnand-meson-fix-unaligned-dma-buffers-handling.patch b/queue-5.4/mtd-rawnand-meson-fix-unaligned-dma-buffers-handling.patch new file mode 100644 index 00000000000..6fcf564b932 --- /dev/null +++ b/queue-5.4/mtd-rawnand-meson-fix-unaligned-dma-buffers-handling.patch @@ -0,0 +1,44 @@ +From 98480a181a08ceeede417e5b28f6d0429d8ae156 Mon Sep 17 00:00:00 2001 +From: Arseniy Krasnov +Date: Thu, 15 Jun 2023 11:08:15 +0300 +Subject: mtd: rawnand: meson: fix unaligned DMA buffers handling + +From: Arseniy Krasnov + +commit 98480a181a08ceeede417e5b28f6d0429d8ae156 upstream. + +Meson NAND controller requires 8 bytes alignment for DMA addresses, +otherwise it "aligns" passed address by itself thus accessing invalid +location in the provided buffer. This patch makes unaligned buffers to +be reallocated to become valid. + +Fixes: 8fae856c5350 ("mtd: rawnand: meson: add support for Amlogic NAND flash controller") +Cc: +Signed-off-by: Arseniy Krasnov +Signed-off-by: Miquel Raynal +Link: https://lore.kernel.org/linux-mtd/20230615080815.3291006-1-AVKrasnov@sberdevices.ru +Signed-off-by: Greg Kroah-Hartman +--- + drivers/mtd/nand/raw/meson_nand.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/mtd/nand/raw/meson_nand.c ++++ b/drivers/mtd/nand/raw/meson_nand.c +@@ -72,6 +72,7 @@ + #define GENCMDIADDRH(aih, addr) ((aih) | (((addr) >> 16) & 0xffff)) + + #define DMA_DIR(dir) ((dir) ? NFC_CMD_N2M : NFC_CMD_M2N) ++#define DMA_ADDR_ALIGN 8 + + #define ECC_CHECK_RETURN_FF (-1) + +@@ -838,6 +839,9 @@ static int meson_nfc_read_oob(struct nan + + static bool meson_nfc_is_buffer_dma_safe(const void *buffer) + { ++ if ((uintptr_t)buffer % DMA_ADDR_ALIGN) ++ return false; ++ + if (virt_addr_valid(buffer) && (!object_is_on_stack(buffer))) + return true; + return false; diff --git a/queue-5.4/net-bcmgenet-ensure-mdio-unregistration-has-clocks-enabled.patch b/queue-5.4/net-bcmgenet-ensure-mdio-unregistration-has-clocks-enabled.patch new file mode 100644 index 00000000000..6492955c808 --- /dev/null +++ b/queue-5.4/net-bcmgenet-ensure-mdio-unregistration-has-clocks-enabled.patch @@ -0,0 +1,39 @@ +From 1b5ea7ffb7a3bdfffb4b7f40ce0d20a3372ee405 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Thu, 22 Jun 2023 03:31:07 -0700 +Subject: net: bcmgenet: Ensure MDIO unregistration has clocks enabled + +From: Florian Fainelli + +commit 1b5ea7ffb7a3bdfffb4b7f40ce0d20a3372ee405 upstream. + +With support for Ethernet PHY LEDs having been added, while +unregistering a MDIO bus and its child device liks PHYs there may be +"late" accesses to the MDIO bus. One typical use case is setting the PHY +LEDs brightness to OFF for instance. + +We need to ensure that the MDIO bus controller remains entirely +functional since it runs off the main GENET adapter clock. + +Cc: stable@vger.kernel.org +Link: https://lore.kernel.org/all/20230617155500.4005881-1-andrew@lunn.ch/ +Fixes: 9a4e79697009 ("net: bcmgenet: utilize generic Broadcom UniMAC MDIO controller driver") +Signed-off-by: Florian Fainelli +Reviewed-by: Andrew Lunn +Link: https://lore.kernel.org/r/20230622103107.1760280-1-florian.fainelli@broadcom.com +Signed-off-by: Jakub Kicinski +Signed-off-by: Greg Kroah-Hartman +--- + drivers/net/ethernet/broadcom/genet/bcmmii.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/net/ethernet/broadcom/genet/bcmmii.c ++++ b/drivers/net/ethernet/broadcom/genet/bcmmii.c +@@ -618,5 +618,7 @@ void bcmgenet_mii_exit(struct net_device + if (of_phy_is_fixed_link(dn)) + of_phy_deregister_fixed_link(dn); + of_node_put(priv->phy_dn); ++ clk_prepare_enable(priv->clk); + platform_device_unregister(priv->mii_pdev); ++ clk_disable_unprepare(priv->clk); + } diff --git a/queue-5.4/pinctrl-amd-detect-internal-gpio0-debounce-handling.patch b/queue-5.4/pinctrl-amd-detect-internal-gpio0-debounce-handling.patch new file mode 100644 index 00000000000..2cf6df7d4b3 --- /dev/null +++ b/queue-5.4/pinctrl-amd-detect-internal-gpio0-debounce-handling.patch @@ -0,0 +1,77 @@ +From 968ab9261627fa305307e3935ca1a32fcddd36cb Mon Sep 17 00:00:00 2001 +From: Mario Limonciello +Date: Fri, 21 Apr 2023 07:06:21 -0500 +Subject: pinctrl: amd: Detect internal GPIO0 debounce handling + +From: Mario Limonciello + +commit 968ab9261627fa305307e3935ca1a32fcddd36cb upstream. + +commit 4e5a04be88fe ("pinctrl: amd: disable and mask interrupts on probe") +had a mistake in loop iteration 63 that it would clear offset 0xFC instead +of 0x100. Offset 0xFC is actually `WAKE_INT_MASTER_REG`. This was +clearing bits 13 and 15 from the register which significantly changed the +expected handling for some platforms for GPIO0. + +commit b26cd9325be4 ("pinctrl: amd: Disable and mask interrupts on resume") +actually fixed this bug, but lead to regressions on Lenovo Z13 and some +other systems. This is because there was no handling in the driver for bit +15 debounce behavior. + +Quoting a public BKDG: +``` +EnWinBlueBtn. Read-write. Reset: 0. 0=GPIO0 detect debounced power button; +Power button override is 4 seconds. 1=GPIO0 detect debounced power button +in S3/S5/S0i3, and detect "pressed less than 2 seconds" and "pressed 2~10 +seconds" in S0; Power button override is 10 seconds +``` + +Cross referencing the same master register in Windows it's obvious that +Windows doesn't use debounce values in this configuration. So align the +Linux driver to do this as well. This fixes wake on lid when +WAKE_INT_MASTER_REG is properly programmed. + +Cc: stable@vger.kernel.org +Link: https://bugzilla.kernel.org/show_bug.cgi?id=217315 +Signed-off-by: Mario Limonciello +Link: https://lore.kernel.org/r/20230421120625.3366-2-mario.limonciello@amd.com +Signed-off-by: Linus Walleij +Signed-off-by: Greg Kroah-Hartman +--- + drivers/pinctrl/pinctrl-amd.c | 7 +++++++ + drivers/pinctrl/pinctrl-amd.h | 1 + + 2 files changed, 8 insertions(+) + +--- a/drivers/pinctrl/pinctrl-amd.c ++++ b/drivers/pinctrl/pinctrl-amd.c +@@ -123,6 +123,12 @@ static int amd_gpio_set_debounce(struct + struct amd_gpio *gpio_dev = gpiochip_get_data(gc); + + raw_spin_lock_irqsave(&gpio_dev->lock, flags); ++ ++ /* Use special handling for Pin0 debounce */ ++ pin_reg = readl(gpio_dev->base + WAKE_INT_MASTER_REG); ++ if (pin_reg & INTERNAL_GPIO0_DEBOUNCE) ++ debounce = 0; ++ + pin_reg = readl(gpio_dev->base + offset * 4); + + if (debounce) { +@@ -212,6 +218,7 @@ static void amd_gpio_dbg_show(struct seq + char *output_value; + char *output_enable; + ++ seq_printf(s, "WAKE_INT_MASTER_REG: 0x%08x\n", readl(gpio_dev->base + WAKE_INT_MASTER_REG)); + for (bank = 0; bank < gpio_dev->hwbank_num; bank++) { + seq_printf(s, "GPIO bank%d\t", bank); + +--- a/drivers/pinctrl/pinctrl-amd.h ++++ b/drivers/pinctrl/pinctrl-amd.h +@@ -17,6 +17,7 @@ + #define AMD_GPIO_PINS_BANK3 32 + + #define WAKE_INT_MASTER_REG 0xfc ++#define INTERNAL_GPIO0_DEBOUNCE (1 << 15) + #define EOI_MASK (1 << 29) + + #define WAKE_INT_STATUS_REG0 0x2f8 diff --git a/queue-5.4/pinctrl-amd-fix-mistake-in-handling-clearing-pins-at-startup.patch b/queue-5.4/pinctrl-amd-fix-mistake-in-handling-clearing-pins-at-startup.patch new file mode 100644 index 00000000000..ac6a83a7e29 --- /dev/null +++ b/queue-5.4/pinctrl-amd-fix-mistake-in-handling-clearing-pins-at-startup.patch @@ -0,0 +1,39 @@ +From a855724dc08b8cb0c13ab1e065a4922f1e5a7552 Mon Sep 17 00:00:00 2001 +From: Mario Limonciello +Date: Fri, 21 Apr 2023 07:06:22 -0500 +Subject: pinctrl: amd: Fix mistake in handling clearing pins at startup + +From: Mario Limonciello + +commit a855724dc08b8cb0c13ab1e065a4922f1e5a7552 upstream. + +commit 4e5a04be88fe ("pinctrl: amd: disable and mask interrupts on probe") +had a mistake in loop iteration 63 that it would clear offset 0xFC instead +of 0x100. Offset 0xFC is actually `WAKE_INT_MASTER_REG`. This was +clearing bits 13 and 15 from the register which significantly changed the +expected handling for some platforms for GPIO0. + +Cc: stable@vger.kernel.org +Link: https://bugzilla.kernel.org/show_bug.cgi?id=217315 +Signed-off-by: Mario Limonciello +Link: https://lore.kernel.org/r/20230421120625.3366-3-mario.limonciello@amd.com +Signed-off-by: Linus Walleij +Signed-off-by: Greg Kroah-Hartman +--- + drivers/pinctrl/pinctrl-amd.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/pinctrl/pinctrl-amd.c ++++ b/drivers/pinctrl/pinctrl-amd.c +@@ -790,9 +790,9 @@ static void amd_gpio_irq_init(struct amd + + raw_spin_lock_irqsave(&gpio_dev->lock, flags); + +- pin_reg = readl(gpio_dev->base + i * 4); ++ pin_reg = readl(gpio_dev->base + pin * 4); + pin_reg &= ~mask; +- writel(pin_reg, gpio_dev->base + i * 4); ++ writel(pin_reg, gpio_dev->base + pin * 4); + + raw_spin_unlock_irqrestore(&gpio_dev->lock, flags); + } diff --git a/queue-5.4/pinctrl-amd-only-use-special-debounce-behavior-for-gpio-0.patch b/queue-5.4/pinctrl-amd-only-use-special-debounce-behavior-for-gpio-0.patch new file mode 100644 index 00000000000..53373c7e749 --- /dev/null +++ b/queue-5.4/pinctrl-amd-only-use-special-debounce-behavior-for-gpio-0.patch @@ -0,0 +1,40 @@ +From 0d5ace1a07f7e846d0f6d972af60d05515599d0b Mon Sep 17 00:00:00 2001 +From: Mario Limonciello +Date: Wed, 5 Jul 2023 08:30:02 -0500 +Subject: pinctrl: amd: Only use special debounce behavior for GPIO 0 + +From: Mario Limonciello + +commit 0d5ace1a07f7e846d0f6d972af60d05515599d0b upstream. + +It's uncommon to use debounce on any other pin, but technically +we should only set debounce to 0 when working off GPIO0. + +Cc: stable@vger.kernel.org +Tested-by: Jan Visser +Fixes: 968ab9261627 ("pinctrl: amd: Detect internal GPIO0 debounce handling") +Signed-off-by: Mario Limonciello +Link: https://lore.kernel.org/r/20230705133005.577-2-mario.limonciello@amd.com +Signed-off-by: Linus Walleij +Signed-off-by: Greg Kroah-Hartman +--- + drivers/pinctrl/pinctrl-amd.c | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +--- a/drivers/pinctrl/pinctrl-amd.c ++++ b/drivers/pinctrl/pinctrl-amd.c +@@ -125,9 +125,11 @@ static int amd_gpio_set_debounce(struct + raw_spin_lock_irqsave(&gpio_dev->lock, flags); + + /* Use special handling for Pin0 debounce */ +- pin_reg = readl(gpio_dev->base + WAKE_INT_MASTER_REG); +- if (pin_reg & INTERNAL_GPIO0_DEBOUNCE) +- debounce = 0; ++ if (offset == 0) { ++ pin_reg = readl(gpio_dev->base + WAKE_INT_MASTER_REG); ++ if (pin_reg & INTERNAL_GPIO0_DEBOUNCE) ++ debounce = 0; ++ } + + pin_reg = readl(gpio_dev->base + offset * 4); + diff --git a/queue-5.4/series b/queue-5.4/series index 188961c14a3..0a7f7236a95 100644 --- a/queue-5.4/series +++ b/queue-5.4/series @@ -226,3 +226,9 @@ wifi-airo-avoid-uninitialized-warning-in-airo_get_ra.patch cls_flower-add-extack-support-for-src-and-dst-port-r.patch net-sched-flower-ensure-both-minimum-and-maximum-por.patch net-sched-make-psched_mtu-rtnl-less-safe.patch +pinctrl-amd-fix-mistake-in-handling-clearing-pins-at-startup.patch +pinctrl-amd-detect-internal-gpio0-debounce-handling.patch +pinctrl-amd-only-use-special-debounce-behavior-for-gpio-0.patch +tpm-tpm_vtpm_proxy-fix-a-race-condition-in-dev-vtpmx-creation.patch +mtd-rawnand-meson-fix-unaligned-dma-buffers-handling.patch +net-bcmgenet-ensure-mdio-unregistration-has-clocks-enabled.patch diff --git a/queue-5.4/tpm-tpm_vtpm_proxy-fix-a-race-condition-in-dev-vtpmx-creation.patch b/queue-5.4/tpm-tpm_vtpm_proxy-fix-a-race-condition-in-dev-vtpmx-creation.patch new file mode 100644 index 00000000000..16723c43da3 --- /dev/null +++ b/queue-5.4/tpm-tpm_vtpm_proxy-fix-a-race-condition-in-dev-vtpmx-creation.patch @@ -0,0 +1,80 @@ +From f4032d615f90970d6c3ac1d9c0bce3351eb4445c Mon Sep 17 00:00:00 2001 +From: Jarkko Sakkinen +Date: Tue, 16 May 2023 01:25:54 +0300 +Subject: tpm: tpm_vtpm_proxy: fix a race condition in /dev/vtpmx creation + +From: Jarkko Sakkinen + +commit f4032d615f90970d6c3ac1d9c0bce3351eb4445c upstream. + +/dev/vtpmx is made visible before 'workqueue' is initialized, which can +lead to a memory corruption in the worst case scenario. + +Address this by initializing 'workqueue' as the very first step of the +driver initialization. + +Cc: stable@vger.kernel.org +Fixes: 6f99612e2500 ("tpm: Proxy driver for supporting multiple emulated TPMs") +Reviewed-by: Stefan Berger +Signed-off-by: Jarkko Sakkinen +Signed-off-by: Jarkko Sakkinen +Signed-off-by: Greg Kroah-Hartman +--- + drivers/char/tpm/tpm_vtpm_proxy.c | 30 +++++++----------------------- + 1 file changed, 7 insertions(+), 23 deletions(-) + +--- a/drivers/char/tpm/tpm_vtpm_proxy.c ++++ b/drivers/char/tpm/tpm_vtpm_proxy.c +@@ -693,37 +693,21 @@ static struct miscdevice vtpmx_miscdev = + .fops = &vtpmx_fops, + }; + +-static int vtpmx_init(void) +-{ +- return misc_register(&vtpmx_miscdev); +-} +- +-static void vtpmx_cleanup(void) +-{ +- misc_deregister(&vtpmx_miscdev); +-} +- + static int __init vtpm_module_init(void) + { + int rc; + +- rc = vtpmx_init(); +- if (rc) { +- pr_err("couldn't create vtpmx device\n"); +- return rc; +- } +- + workqueue = create_workqueue("tpm-vtpm"); + if (!workqueue) { + pr_err("couldn't create workqueue\n"); +- rc = -ENOMEM; +- goto err_vtpmx_cleanup; ++ return -ENOMEM; + } + +- return 0; +- +-err_vtpmx_cleanup: +- vtpmx_cleanup(); ++ rc = misc_register(&vtpmx_miscdev); ++ if (rc) { ++ pr_err("couldn't create vtpmx device\n"); ++ destroy_workqueue(workqueue); ++ } + + return rc; + } +@@ -731,7 +715,7 @@ err_vtpmx_cleanup: + static void __exit vtpm_module_exit(void) + { + destroy_workqueue(workqueue); +- vtpmx_cleanup(); ++ misc_deregister(&vtpmx_miscdev); + } + + module_init(vtpm_module_init); -- 2.47.3