From 6a7f78388a0b7a4be398a7e8d22de86448352cd6 Mon Sep 17 00:00:00 2001 From: Ashok Reddy Soma Date: Tue, 11 May 2021 04:37:27 -0600 Subject: [PATCH] spi: cadence_qspi: Enable linear mode in mini u-boot OSPI writes are done using direct access(DAC) mode with AHB bus. This needs linear mode to be enabled. In case of full U-Boot linear mode is enabled using xilinx_pm_request() calls. But in mini u-boot it will not work since ZYNQMP_FIRMWARE will not be enabled. Tried enabling ZYNQMP_FIRMWARE, ZYNQMP_IPI and MAILBOX to make xilinx_pm_request() working for mini U-Boot as well but it is getting hung somewhere before it comes to the prompt. This needs to be debugged later. For now add condition to call xilinx_pm_request() only if ZYNQMP_FIRMWARE is enabled in config. Enable linear mode using register writes. Also remove ZYNQMP_FIRMWARE from Kconfig as a dependency. Signed-off-by: Ashok Reddy Soma --- arch/arm/mach-versal/include/mach/hardware.h | 4 +++ drivers/spi/Kconfig | 2 +- drivers/spi/cadence_ospi_versal.c | 28 ++++++++++++++------ drivers/spi/cadence_qspi.c | 6 +++-- 4 files changed, 29 insertions(+), 11 deletions(-) diff --git a/arch/arm/mach-versal/include/mach/hardware.h b/arch/arm/mach-versal/include/mach/hardware.h index 9af5afd3f3f..f3617985b4b 100644 --- a/arch/arm/mach-versal/include/mach/hardware.h +++ b/arch/arm/mach-versal/include/mach/hardware.h @@ -58,6 +58,10 @@ struct rpu_regs { #define VERSAL_CRP_BASEADDR 0xF1260000 +#define VERSAL_SLCR_BASEADDR 0xF1060000 +#define VERSAL_AXI_MUX_SEL (VERSAL_SLCR_BASEADDR + 0x504) +#define VERSAL_OSPI_LINEAR_MODE BIT(1) + struct crp_regs { u32 reserved0[128]; u32 boot_mode_usr; diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 98788125352..08ceb0d1945 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -123,7 +123,7 @@ config CADENCE_QSPI config CADENCE_OSPI_VERSAL bool "Configure Versal OSPI" - depends on ARCH_VERSAL && CADENCE_QSPI && ZYNQMP_FIRMWARE + depends on ARCH_VERSAL && CADENCE_QSPI imply DM_GPIO help This option is used to enable Versal OSPI DMA operations which diff --git a/drivers/spi/cadence_ospi_versal.c b/drivers/spi/cadence_ospi_versal.c index 551520aecfb..558161f87ee 100644 --- a/drivers/spi/cadence_ospi_versal.c +++ b/drivers/spi/cadence_ospi_versal.c @@ -14,6 +14,7 @@ #include #include #include +#include #include "cadence_qspi.h" #define CMD_4BYTE_READ 0x13 @@ -21,14 +22,25 @@ void cadence_qspi_apb_enable_linear_mode(bool enable) { - if (enable) - /* ahb read mode */ - xilinx_pm_request(PM_IOCTL, DEV_OSPI, IOCTL_OSPI_MUX_SELECT, - PM_OSPI_MUX_SEL_LINEAR, 0, NULL); - else - /* DMA mode */ - xilinx_pm_request(PM_IOCTL, DEV_OSPI, IOCTL_OSPI_MUX_SELECT, - PM_OSPI_MUX_SEL_DMA, 0, NULL); + if (CONFIG_IS_ENABLED(ZYNQMP_FIRMWARE)) { + if (enable) + /* ahb read mode */ + xilinx_pm_request(PM_IOCTL, DEV_OSPI, + IOCTL_OSPI_MUX_SELECT, + PM_OSPI_MUX_SEL_LINEAR, 0, NULL); + else + /* DMA mode */ + xilinx_pm_request(PM_IOCTL, DEV_OSPI, + IOCTL_OSPI_MUX_SELECT, + PM_OSPI_MUX_SEL_DMA, 0, NULL); + } else { + if (enable) + writel(readl(VERSAL_AXI_MUX_SEL) | + VERSAL_OSPI_LINEAR_MODE, VERSAL_AXI_MUX_SEL); + else + writel(readl(VERSAL_AXI_MUX_SEL) & + ~VERSAL_OSPI_LINEAR_MODE, VERSAL_AXI_MUX_SEL); + } } int cadence_qspi_apb_dma_read(struct cadence_spi_platdata *plat, diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index 87b5e31665d..e42c398b3e5 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -191,8 +191,10 @@ static int cadence_spi_probe(struct udevice *bus) priv->ahbbase = plat->ahbbase; priv->is_dual = plat->is_dual; - xilinx_pm_request(PM_REQUEST_NODE, DEV_OSPI, PM_CAPABILITY_ACCESS, - PM_MAX_QOS, PM_REQUEST_ACK_NO, NULL); + if (CONFIG_IS_ENABLED(ZYNQMP_FIRMWARE)) + xilinx_pm_request(PM_REQUEST_NODE, DEV_OSPI, + PM_CAPABILITY_ACCESS, PM_MAX_QOS, + PM_REQUEST_ACK_NO, NULL); if (plat->ref_clk_hz == 0) { ret = clk_get_by_index(bus, 0, &clk); -- 2.47.3