From 6da397e0ebe6a3c39efe93bb7f40946c8ba92947 Mon Sep 17 00:00:00 2001 From: Kevin Buettner Date: Thu, 3 May 2007 17:51:19 +0000 Subject: [PATCH] * mips-tdep.c (mips_eabi_push_dummy_call): When pushing floating point arguments, test explicitly for use of the EABI32 ABI instead of inferring this condition from tests on register sizes. --- gdb/ChangeLog | 7 +++++++ gdb/mips-tdep.c | 7 ++++++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 188bed35b02..754592e3649 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,10 @@ +2007-05-03 Kevin Buettner + + * mips-tdep.c (mips_eabi_push_dummy_call): When pushing floating + point arguments, test explicitly for use of the EABI32 ABI + instead of inferring this condition from tests on register + sizes. + 2007-05-03 Kevin Buettner * breakpoint.c (set_raw_breakpoint): Adjust breakpoint's address diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c index d53b602575e..a291aa523a0 100644 --- a/gdb/mips-tdep.c +++ b/gdb/mips-tdep.c @@ -2507,7 +2507,12 @@ mips_eabi_push_dummy_call (struct gdbarch *gdbarch, struct value *function, if (fp_register_arg_p (typecode, arg_type) && float_argreg <= MIPS_LAST_FP_ARG_REGNUM) { - if (register_size (gdbarch, float_argreg) < 8 && len == 8) + /* EABI32 will pass doubles in consecutive registers, even on + 64-bit cores. At one time, we used to check the size of + `float_argreg' to determine whether or not to pass doubles + in consecutive registers, but this is not sufficient for + making the ABI determination. */ + if (len == 8 && mips_abi (gdbarch) == MIPS_ABI_EABI32) { int low_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0; unsigned long regval; -- 2.39.2