From 705c19dd4984cf803e3102cf385087d5d29623ad Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Fri, 10 Mar 2023 11:57:01 +0100 Subject: [PATCH] drop parport patch as it breaks the build --- ...p-mode-and-ecr-masks-for-oxford-semi.patch | 140 ------------------ queue-4.14/series | 1 - ...p-mode-and-ecr-masks-for-oxford-semi.patch | 140 ------------------ queue-4.19/series | 1 - ...p-mode-and-ecr-masks-for-oxford-semi.patch | 140 ------------------ queue-5.10/series | 1 - ...p-mode-and-ecr-masks-for-oxford-semi.patch | 140 ------------------ queue-5.15/series | 1 - ...p-mode-and-ecr-masks-for-oxford-semi.patch | 140 ------------------ queue-5.4/series | 1 - ...p-mode-and-ecr-masks-for-oxford-semi.patch | 140 ------------------ queue-6.1/series | 1 - ...p-mode-and-ecr-masks-for-oxford-semi.patch | 140 ------------------ queue-6.2/series | 1 - 14 files changed, 987 deletions(-) delete mode 100644 queue-4.14/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch delete mode 100644 queue-4.19/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch delete mode 100644 queue-5.10/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch delete mode 100644 queue-5.15/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch delete mode 100644 queue-5.4/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch delete mode 100644 queue-6.1/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch delete mode 100644 queue-6.2/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch diff --git a/queue-4.14/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch b/queue-4.14/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch deleted file mode 100644 index bbb400872c6..00000000000 --- a/queue-4.14/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch +++ /dev/null @@ -1,140 +0,0 @@ -From 5be1d59814c8b707e3bcd2ad5f05585912b0c326 Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Sun, 8 Jan 2023 21:56:55 +0000 -Subject: parport_pc: Set up mode and ECR masks for Oxford Semiconductor - devices - -From: Maciej W. Rozycki - -[ Upstream commit c087df8d1e7dc2e764d11234d84b5af46d500f16 ] - -No Oxford Semiconductor PCI or PCIe parallel port device supports the -Parallel Port FIFO mode. All support the PS/2 Parallel Port mode and -the Enhanced Parallel Port mode via the ECR register. The original 5V -PCI OX16PCI954 device does not support the Extended Capabilities Port -mode, the Test mode or the Configuration mode, but all the other OxSemi -devices do, including in particular the 3.3V PCI OXmPCI954 device and -the universal voltage PCI OXuPCI954 device. All the unsupported modes -are marked reserved in the relevant datasheets. - -Accordingly enable the `base_hi' BAR for the 954 devices to enable PS2 -and EPP mode support via the ECR register, however mask the COMPAT mode -and, until we have a way to determine what chip variant it is that we -poke at, also the ECP mode, and mask the COMPAT mode only for all the -remaining OxSemi devices, fixing errors like: - -parport0: FIFO is stuck -FIFO write timed out - -and a non-functional port when the Parallel Port FIFO mode is selected. - -Complementing the fix apply an ECR mask for all these devices, which are -documented to only permit writing to the mode field of the ECR register -with a bit pattern of 00001 required to be written to bits 4:0 on mode -field writes. No nFault or service interrupts are implemented, which -will therefore never have to be enabled, though bit 2 does report the -FIFO threshold status to be polled for in the ECP mode where supported. - -We have a documented case of writing 1 to bit 2 causing a lock-up with -at least one OX12PCI840 device (from old drivers/parport/ChangeLog): - -2001-10-10 Tim Waugh - - * parport_pc.c: Support for OX12PCI840 PCI card (reported by - mk@daveg.com). Lock-ups diagnosed by Ronnie Arosa (and now we - just don't trust its ECR). - -which commit adbd321a17cc ("parport_pc: add base_hi BAR for oxsemi_840") -must have broken and by applying an ECR mask here we prevent the lock-up -from triggering. This could have been the reason for requiring 00001 to -be written to bits 4:0 of ECR. - -Update the inline comment accordingly; it has come from Linux 2.4.12 -back in 2001 and predates the introduction of OXmPCI954 and OXuPCI954 -devices that do support ECP. - -References: - -[1] "OX16PCI954 Integrated Quad UART and PCI interface", Oxford - Semiconductor Ltd., Data Sheet Revision 1.3, Feb. 1999, Chapter 9 - "Bidirectional Parallel Port", pp. 53-55 - -[2] "OX16PCI952 Data Sheet, Integrated High Performance Dual UARTs, - Parallel Port and 5.0v PCI interface", Oxford Semiconductor Ltd., - DS_B008A_00, Datasheet rev 1.1, June 2001, Chapter 8 "Bi-directional - Parallel Port", pp. 52-56 - -[3] "OXmPCI954 DATA SHEET Integrated High Performance Quad UARTs, 8-bit - Local Bus/Parallel Port. 3.3v PCI/miniPCI interface.", Oxford - Semiconductor Ltd., DS-0019, June 2005, Chapter 10 "Bidirectional - Parallel Port", pp. 86-90 - -[4] "OXmPCI952 Data Sheet, Integrated High Performance Dual UARTs, 8-bit - Local Bus/Parallel Port. 3.3v PCI/miniPCI interface.", Oxford - Semiconductor Ltd., DS-0020, June 2005, Chapter 8 "Bidirectional - Parallel Port", pp. 73-77 - -[5] "OX12PCI840 Integrated Parallel Port and PCI interface", Oxford - Semiconductor Ltd., DS-0021, Jun 2005, Chapter 5 "Bi-directional - Parallel Port", pp. 18-21 - -[6] "OXPCIe952 PCI Express Bridge to Dual Serial & Parallel Port", - Oxford Semiconductor, Inc., DS-0046, Mar 06 08, Chapter "Parallel - Port Function", pp. 59-62 - -[7] "OXPCIe840 PCI Express Bridge to Parallel Port", Oxford - Semiconductor, Inc., DS-0049, Mar 06 08, Chapter "Parallel Port - Function", pp. 15-18 - -[8] "OXuPCI954 Data Sheet, Integrated High Performance Quad UARTs, 8-bit - Local Bus/Parallel Port, 3.3 V and 5 V (Universal Voltage) PCI - Interface.", Oxford Semiconductor, Inc., DS-0058, 26 Jan 2009, - Chapter 8 "Bidirectional Parallel Port", pp. 62-65 - -[9] "OXuPCI952 Data Sheet, Integrated High Performance Dual UARTs, 8-bit - Local Bus/Parallel Port, 3.3 V and 5.0 V Universal Voltage PCI - Interface.", Oxford Semiconductor, Inc., DS-0059, Sep 2007, Chapter - 8 "Bidirectional Parallel Port", pp. 61-64 - -Signed-off-by: Maciej W. Rozycki -Signed-off-by: Sudip Mukherjee -Link: https://lore.kernel.org/r/20230108215656.6433-6-sudipm.mukherjee@gmail.com -Signed-off-by: Greg Kroah-Hartman -Signed-off-by: Sasha Levin ---- - drivers/parport/parport_pc.c | 19 +++++++++++++------ - 1 file changed, 13 insertions(+), 6 deletions(-) - -diff --git a/drivers/parport/parport_pc.c b/drivers/parport/parport_pc.c -index d99ac73a1d89e..40c29e19f8647 100644 ---- a/drivers/parport/parport_pc.c -+++ b/drivers/parport/parport_pc.c -@@ -2691,12 +2691,19 @@ static struct parport_pc_pci { - /* titan_010l */ { 1, { { 3, -1 }, } }, - /* avlab_1p */ { 1, { { 0, 1}, } }, - /* avlab_2p */ { 2, { { 0, 1}, { 2, 3 },} }, -- /* The Oxford Semi cards are unusual: 954 doesn't support ECP, -- * and 840 locks up if you write 1 to bit 2! */ -- /* oxsemi_952 */ { 1, { { 0, 1 }, } }, -- /* oxsemi_954 */ { 1, { { 0, -1 }, } }, -- /* oxsemi_840 */ { 1, { { 0, 1 }, } }, -- /* oxsemi_pcie_pport */ { 1, { { 0, 1 }, } }, -+ /* The Oxford Semi cards are unusual: older variants of 954 don't -+ * support ECP, and 840 locks up if you write 1 to bit 2! None -+ * implement nFault or service interrupts and all require 00001 -+ * bit pattern to be used for bits 4:0 with ECR writes. */ -+ /* oxsemi_952 */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, -+ /* oxsemi_954 */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_ECP | -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, -+ /* oxsemi_840 */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, -+ /* oxsemi_pcie_pport */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, - /* aks_0100 */ { 1, { { 0, -1 }, } }, - /* mobility_pp */ { 1, { { 0, 1 }, } }, - --- -2.39.2 - diff --git a/queue-4.14/series b/queue-4.14/series index a6570c1fee8..fefdb277a40 100644 --- a/queue-4.14/series +++ b/queue-4.14/series @@ -179,7 +179,6 @@ firmware-efi-sysfb_efi-add-quirk-for-lenovo-ideapad-.patch media-uvcvideo-handle-cameras-with-invalid-descripto.patch tty-fix-out-of-bounds-access-in-tty_driver_lookup_tt.patch tty-serial-fsl_lpuart-disable-the-cts-when-send-brea.patch -parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch tools-iio-iio_utils-fix-memory-leak.patch iio-accel-mma9551_core-prevent-uninitialized-variabl.patch iio-accel-mma9551_core-prevent-uninitialized-variabl.patch-21890 diff --git a/queue-4.19/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch b/queue-4.19/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch deleted file mode 100644 index 52f73a625e7..00000000000 --- a/queue-4.19/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch +++ /dev/null @@ -1,140 +0,0 @@ -From a5cee9206bb802f06e8f32e0f24f274f1cc9ed53 Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Sun, 8 Jan 2023 21:56:55 +0000 -Subject: parport_pc: Set up mode and ECR masks for Oxford Semiconductor - devices - -From: Maciej W. Rozycki - -[ Upstream commit c087df8d1e7dc2e764d11234d84b5af46d500f16 ] - -No Oxford Semiconductor PCI or PCIe parallel port device supports the -Parallel Port FIFO mode. All support the PS/2 Parallel Port mode and -the Enhanced Parallel Port mode via the ECR register. The original 5V -PCI OX16PCI954 device does not support the Extended Capabilities Port -mode, the Test mode or the Configuration mode, but all the other OxSemi -devices do, including in particular the 3.3V PCI OXmPCI954 device and -the universal voltage PCI OXuPCI954 device. All the unsupported modes -are marked reserved in the relevant datasheets. - -Accordingly enable the `base_hi' BAR for the 954 devices to enable PS2 -and EPP mode support via the ECR register, however mask the COMPAT mode -and, until we have a way to determine what chip variant it is that we -poke at, also the ECP mode, and mask the COMPAT mode only for all the -remaining OxSemi devices, fixing errors like: - -parport0: FIFO is stuck -FIFO write timed out - -and a non-functional port when the Parallel Port FIFO mode is selected. - -Complementing the fix apply an ECR mask for all these devices, which are -documented to only permit writing to the mode field of the ECR register -with a bit pattern of 00001 required to be written to bits 4:0 on mode -field writes. No nFault or service interrupts are implemented, which -will therefore never have to be enabled, though bit 2 does report the -FIFO threshold status to be polled for in the ECP mode where supported. - -We have a documented case of writing 1 to bit 2 causing a lock-up with -at least one OX12PCI840 device (from old drivers/parport/ChangeLog): - -2001-10-10 Tim Waugh - - * parport_pc.c: Support for OX12PCI840 PCI card (reported by - mk@daveg.com). Lock-ups diagnosed by Ronnie Arosa (and now we - just don't trust its ECR). - -which commit adbd321a17cc ("parport_pc: add base_hi BAR for oxsemi_840") -must have broken and by applying an ECR mask here we prevent the lock-up -from triggering. This could have been the reason for requiring 00001 to -be written to bits 4:0 of ECR. - -Update the inline comment accordingly; it has come from Linux 2.4.12 -back in 2001 and predates the introduction of OXmPCI954 and OXuPCI954 -devices that do support ECP. - -References: - -[1] "OX16PCI954 Integrated Quad UART and PCI interface", Oxford - Semiconductor Ltd., Data Sheet Revision 1.3, Feb. 1999, Chapter 9 - "Bidirectional Parallel Port", pp. 53-55 - -[2] "OX16PCI952 Data Sheet, Integrated High Performance Dual UARTs, - Parallel Port and 5.0v PCI interface", Oxford Semiconductor Ltd., - DS_B008A_00, Datasheet rev 1.1, June 2001, Chapter 8 "Bi-directional - Parallel Port", pp. 52-56 - -[3] "OXmPCI954 DATA SHEET Integrated High Performance Quad UARTs, 8-bit - Local Bus/Parallel Port. 3.3v PCI/miniPCI interface.", Oxford - Semiconductor Ltd., DS-0019, June 2005, Chapter 10 "Bidirectional - Parallel Port", pp. 86-90 - -[4] "OXmPCI952 Data Sheet, Integrated High Performance Dual UARTs, 8-bit - Local Bus/Parallel Port. 3.3v PCI/miniPCI interface.", Oxford - Semiconductor Ltd., DS-0020, June 2005, Chapter 8 "Bidirectional - Parallel Port", pp. 73-77 - -[5] "OX12PCI840 Integrated Parallel Port and PCI interface", Oxford - Semiconductor Ltd., DS-0021, Jun 2005, Chapter 5 "Bi-directional - Parallel Port", pp. 18-21 - -[6] "OXPCIe952 PCI Express Bridge to Dual Serial & Parallel Port", - Oxford Semiconductor, Inc., DS-0046, Mar 06 08, Chapter "Parallel - Port Function", pp. 59-62 - -[7] "OXPCIe840 PCI Express Bridge to Parallel Port", Oxford - Semiconductor, Inc., DS-0049, Mar 06 08, Chapter "Parallel Port - Function", pp. 15-18 - -[8] "OXuPCI954 Data Sheet, Integrated High Performance Quad UARTs, 8-bit - Local Bus/Parallel Port, 3.3 V and 5 V (Universal Voltage) PCI - Interface.", Oxford Semiconductor, Inc., DS-0058, 26 Jan 2009, - Chapter 8 "Bidirectional Parallel Port", pp. 62-65 - -[9] "OXuPCI952 Data Sheet, Integrated High Performance Dual UARTs, 8-bit - Local Bus/Parallel Port, 3.3 V and 5.0 V Universal Voltage PCI - Interface.", Oxford Semiconductor, Inc., DS-0059, Sep 2007, Chapter - 8 "Bidirectional Parallel Port", pp. 61-64 - -Signed-off-by: Maciej W. Rozycki -Signed-off-by: Sudip Mukherjee -Link: https://lore.kernel.org/r/20230108215656.6433-6-sudipm.mukherjee@gmail.com -Signed-off-by: Greg Kroah-Hartman -Signed-off-by: Sasha Levin ---- - drivers/parport/parport_pc.c | 19 +++++++++++++------ - 1 file changed, 13 insertions(+), 6 deletions(-) - -diff --git a/drivers/parport/parport_pc.c b/drivers/parport/parport_pc.c -index d99ac73a1d89e..40c29e19f8647 100644 ---- a/drivers/parport/parport_pc.c -+++ b/drivers/parport/parport_pc.c -@@ -2691,12 +2691,19 @@ static struct parport_pc_pci { - /* titan_010l */ { 1, { { 3, -1 }, } }, - /* avlab_1p */ { 1, { { 0, 1}, } }, - /* avlab_2p */ { 2, { { 0, 1}, { 2, 3 },} }, -- /* The Oxford Semi cards are unusual: 954 doesn't support ECP, -- * and 840 locks up if you write 1 to bit 2! */ -- /* oxsemi_952 */ { 1, { { 0, 1 }, } }, -- /* oxsemi_954 */ { 1, { { 0, -1 }, } }, -- /* oxsemi_840 */ { 1, { { 0, 1 }, } }, -- /* oxsemi_pcie_pport */ { 1, { { 0, 1 }, } }, -+ /* The Oxford Semi cards are unusual: older variants of 954 don't -+ * support ECP, and 840 locks up if you write 1 to bit 2! None -+ * implement nFault or service interrupts and all require 00001 -+ * bit pattern to be used for bits 4:0 with ECR writes. */ -+ /* oxsemi_952 */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, -+ /* oxsemi_954 */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_ECP | -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, -+ /* oxsemi_840 */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, -+ /* oxsemi_pcie_pport */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, - /* aks_0100 */ { 1, { { 0, -1 }, } }, - /* mobility_pp */ { 1, { { 0, 1 }, } }, - --- -2.39.2 - diff --git a/queue-4.19/series b/queue-4.19/series index 496b16fc113..308c18be0ea 100644 --- a/queue-4.19/series +++ b/queue-4.19/series @@ -235,7 +235,6 @@ media-uvcvideo-silence-memcpy-run-time-false-positiv.patch tty-fix-out-of-bounds-access-in-tty_driver_lookup_tt.patch tty-serial-fsl_lpuart-disable-the-cts-when-send-brea.patch mei-bus-fixup-upon-error-print-return-values-of-send.patch -parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch tools-iio-iio_utils-fix-memory-leak.patch iio-accel-mma9551_core-prevent-uninitialized-variabl.patch iio-accel-mma9551_core-prevent-uninitialized-variabl.patch-26174 diff --git a/queue-5.10/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch b/queue-5.10/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch deleted file mode 100644 index 9f72a3a59e7..00000000000 --- a/queue-5.10/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch +++ /dev/null @@ -1,140 +0,0 @@ -From 84375f27795536025fb1d27a530ea1c0e47910be Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Sun, 8 Jan 2023 21:56:55 +0000 -Subject: parport_pc: Set up mode and ECR masks for Oxford Semiconductor - devices - -From: Maciej W. Rozycki - -[ Upstream commit c087df8d1e7dc2e764d11234d84b5af46d500f16 ] - -No Oxford Semiconductor PCI or PCIe parallel port device supports the -Parallel Port FIFO mode. All support the PS/2 Parallel Port mode and -the Enhanced Parallel Port mode via the ECR register. The original 5V -PCI OX16PCI954 device does not support the Extended Capabilities Port -mode, the Test mode or the Configuration mode, but all the other OxSemi -devices do, including in particular the 3.3V PCI OXmPCI954 device and -the universal voltage PCI OXuPCI954 device. All the unsupported modes -are marked reserved in the relevant datasheets. - -Accordingly enable the `base_hi' BAR for the 954 devices to enable PS2 -and EPP mode support via the ECR register, however mask the COMPAT mode -and, until we have a way to determine what chip variant it is that we -poke at, also the ECP mode, and mask the COMPAT mode only for all the -remaining OxSemi devices, fixing errors like: - -parport0: FIFO is stuck -FIFO write timed out - -and a non-functional port when the Parallel Port FIFO mode is selected. - -Complementing the fix apply an ECR mask for all these devices, which are -documented to only permit writing to the mode field of the ECR register -with a bit pattern of 00001 required to be written to bits 4:0 on mode -field writes. No nFault or service interrupts are implemented, which -will therefore never have to be enabled, though bit 2 does report the -FIFO threshold status to be polled for in the ECP mode where supported. - -We have a documented case of writing 1 to bit 2 causing a lock-up with -at least one OX12PCI840 device (from old drivers/parport/ChangeLog): - -2001-10-10 Tim Waugh - - * parport_pc.c: Support for OX12PCI840 PCI card (reported by - mk@daveg.com). Lock-ups diagnosed by Ronnie Arosa (and now we - just don't trust its ECR). - -which commit adbd321a17cc ("parport_pc: add base_hi BAR for oxsemi_840") -must have broken and by applying an ECR mask here we prevent the lock-up -from triggering. This could have been the reason for requiring 00001 to -be written to bits 4:0 of ECR. - -Update the inline comment accordingly; it has come from Linux 2.4.12 -back in 2001 and predates the introduction of OXmPCI954 and OXuPCI954 -devices that do support ECP. - -References: - -[1] "OX16PCI954 Integrated Quad UART and PCI interface", Oxford - Semiconductor Ltd., Data Sheet Revision 1.3, Feb. 1999, Chapter 9 - "Bidirectional Parallel Port", pp. 53-55 - -[2] "OX16PCI952 Data Sheet, Integrated High Performance Dual UARTs, - Parallel Port and 5.0v PCI interface", Oxford Semiconductor Ltd., - DS_B008A_00, Datasheet rev 1.1, June 2001, Chapter 8 "Bi-directional - Parallel Port", pp. 52-56 - -[3] "OXmPCI954 DATA SHEET Integrated High Performance Quad UARTs, 8-bit - Local Bus/Parallel Port. 3.3v PCI/miniPCI interface.", Oxford - Semiconductor Ltd., DS-0019, June 2005, Chapter 10 "Bidirectional - Parallel Port", pp. 86-90 - -[4] "OXmPCI952 Data Sheet, Integrated High Performance Dual UARTs, 8-bit - Local Bus/Parallel Port. 3.3v PCI/miniPCI interface.", Oxford - Semiconductor Ltd., DS-0020, June 2005, Chapter 8 "Bidirectional - Parallel Port", pp. 73-77 - -[5] "OX12PCI840 Integrated Parallel Port and PCI interface", Oxford - Semiconductor Ltd., DS-0021, Jun 2005, Chapter 5 "Bi-directional - Parallel Port", pp. 18-21 - -[6] "OXPCIe952 PCI Express Bridge to Dual Serial & Parallel Port", - Oxford Semiconductor, Inc., DS-0046, Mar 06 08, Chapter "Parallel - Port Function", pp. 59-62 - -[7] "OXPCIe840 PCI Express Bridge to Parallel Port", Oxford - Semiconductor, Inc., DS-0049, Mar 06 08, Chapter "Parallel Port - Function", pp. 15-18 - -[8] "OXuPCI954 Data Sheet, Integrated High Performance Quad UARTs, 8-bit - Local Bus/Parallel Port, 3.3 V and 5 V (Universal Voltage) PCI - Interface.", Oxford Semiconductor, Inc., DS-0058, 26 Jan 2009, - Chapter 8 "Bidirectional Parallel Port", pp. 62-65 - -[9] "OXuPCI952 Data Sheet, Integrated High Performance Dual UARTs, 8-bit - Local Bus/Parallel Port, 3.3 V and 5.0 V Universal Voltage PCI - Interface.", Oxford Semiconductor, Inc., DS-0059, Sep 2007, Chapter - 8 "Bidirectional Parallel Port", pp. 61-64 - -Signed-off-by: Maciej W. Rozycki -Signed-off-by: Sudip Mukherjee -Link: https://lore.kernel.org/r/20230108215656.6433-6-sudipm.mukherjee@gmail.com -Signed-off-by: Greg Kroah-Hartman -Signed-off-by: Sasha Levin ---- - drivers/parport/parport_pc.c | 19 +++++++++++++------ - 1 file changed, 13 insertions(+), 6 deletions(-) - -diff --git a/drivers/parport/parport_pc.c b/drivers/parport/parport_pc.c -index 925be41eeebec..c2af2aa6d437c 100644 ---- a/drivers/parport/parport_pc.c -+++ b/drivers/parport/parport_pc.c -@@ -2657,12 +2657,19 @@ static struct parport_pc_pci { - /* titan_010l */ { 1, { { 3, -1 }, } }, - /* avlab_1p */ { 1, { { 0, 1}, } }, - /* avlab_2p */ { 2, { { 0, 1}, { 2, 3 },} }, -- /* The Oxford Semi cards are unusual: 954 doesn't support ECP, -- * and 840 locks up if you write 1 to bit 2! */ -- /* oxsemi_952 */ { 1, { { 0, 1 }, } }, -- /* oxsemi_954 */ { 1, { { 0, -1 }, } }, -- /* oxsemi_840 */ { 1, { { 0, 1 }, } }, -- /* oxsemi_pcie_pport */ { 1, { { 0, 1 }, } }, -+ /* The Oxford Semi cards are unusual: older variants of 954 don't -+ * support ECP, and 840 locks up if you write 1 to bit 2! None -+ * implement nFault or service interrupts and all require 00001 -+ * bit pattern to be used for bits 4:0 with ECR writes. */ -+ /* oxsemi_952 */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, -+ /* oxsemi_954 */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_ECP | -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, -+ /* oxsemi_840 */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, -+ /* oxsemi_pcie_pport */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, - /* aks_0100 */ { 1, { { 0, -1 }, } }, - /* mobility_pp */ { 1, { { 0, 1 }, } }, - --- -2.39.2 - diff --git a/queue-5.10/series b/queue-5.10/series index 020a9df3a4f..0253175995b 100644 --- a/queue-5.10/series +++ b/queue-5.10/series @@ -494,7 +494,6 @@ tty-fix-out-of-bounds-access-in-tty_driver_lookup_tt.patch tty-serial-fsl_lpuart-disable-the-cts-when-send-brea.patch serial-sc16is7xx-setup-gpio-controller-later-in-prob.patch mei-bus-fixup-upon-error-print-return-values-of-send.patch -parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch tools-iio-iio_utils-fix-memory-leak.patch iio-accel-mma9551_core-prevent-uninitialized-variabl.patch iio-accel-mma9551_core-prevent-uninitialized-variabl.patch-4278 diff --git a/queue-5.15/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch b/queue-5.15/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch deleted file mode 100644 index 6ebbbdab89b..00000000000 --- a/queue-5.15/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch +++ /dev/null @@ -1,140 +0,0 @@ -From 46698ecfaab4b13756a72444e98b4afac9646be4 Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Sun, 8 Jan 2023 21:56:55 +0000 -Subject: parport_pc: Set up mode and ECR masks for Oxford Semiconductor - devices - -From: Maciej W. Rozycki - -[ Upstream commit c087df8d1e7dc2e764d11234d84b5af46d500f16 ] - -No Oxford Semiconductor PCI or PCIe parallel port device supports the -Parallel Port FIFO mode. All support the PS/2 Parallel Port mode and -the Enhanced Parallel Port mode via the ECR register. The original 5V -PCI OX16PCI954 device does not support the Extended Capabilities Port -mode, the Test mode or the Configuration mode, but all the other OxSemi -devices do, including in particular the 3.3V PCI OXmPCI954 device and -the universal voltage PCI OXuPCI954 device. All the unsupported modes -are marked reserved in the relevant datasheets. - -Accordingly enable the `base_hi' BAR for the 954 devices to enable PS2 -and EPP mode support via the ECR register, however mask the COMPAT mode -and, until we have a way to determine what chip variant it is that we -poke at, also the ECP mode, and mask the COMPAT mode only for all the -remaining OxSemi devices, fixing errors like: - -parport0: FIFO is stuck -FIFO write timed out - -and a non-functional port when the Parallel Port FIFO mode is selected. - -Complementing the fix apply an ECR mask for all these devices, which are -documented to only permit writing to the mode field of the ECR register -with a bit pattern of 00001 required to be written to bits 4:0 on mode -field writes. No nFault or service interrupts are implemented, which -will therefore never have to be enabled, though bit 2 does report the -FIFO threshold status to be polled for in the ECP mode where supported. - -We have a documented case of writing 1 to bit 2 causing a lock-up with -at least one OX12PCI840 device (from old drivers/parport/ChangeLog): - -2001-10-10 Tim Waugh - - * parport_pc.c: Support for OX12PCI840 PCI card (reported by - mk@daveg.com). Lock-ups diagnosed by Ronnie Arosa (and now we - just don't trust its ECR). - -which commit adbd321a17cc ("parport_pc: add base_hi BAR for oxsemi_840") -must have broken and by applying an ECR mask here we prevent the lock-up -from triggering. This could have been the reason for requiring 00001 to -be written to bits 4:0 of ECR. - -Update the inline comment accordingly; it has come from Linux 2.4.12 -back in 2001 and predates the introduction of OXmPCI954 and OXuPCI954 -devices that do support ECP. - -References: - -[1] "OX16PCI954 Integrated Quad UART and PCI interface", Oxford - Semiconductor Ltd., Data Sheet Revision 1.3, Feb. 1999, Chapter 9 - "Bidirectional Parallel Port", pp. 53-55 - -[2] "OX16PCI952 Data Sheet, Integrated High Performance Dual UARTs, - Parallel Port and 5.0v PCI interface", Oxford Semiconductor Ltd., - DS_B008A_00, Datasheet rev 1.1, June 2001, Chapter 8 "Bi-directional - Parallel Port", pp. 52-56 - -[3] "OXmPCI954 DATA SHEET Integrated High Performance Quad UARTs, 8-bit - Local Bus/Parallel Port. 3.3v PCI/miniPCI interface.", Oxford - Semiconductor Ltd., DS-0019, June 2005, Chapter 10 "Bidirectional - Parallel Port", pp. 86-90 - -[4] "OXmPCI952 Data Sheet, Integrated High Performance Dual UARTs, 8-bit - Local Bus/Parallel Port. 3.3v PCI/miniPCI interface.", Oxford - Semiconductor Ltd., DS-0020, June 2005, Chapter 8 "Bidirectional - Parallel Port", pp. 73-77 - -[5] "OX12PCI840 Integrated Parallel Port and PCI interface", Oxford - Semiconductor Ltd., DS-0021, Jun 2005, Chapter 5 "Bi-directional - Parallel Port", pp. 18-21 - -[6] "OXPCIe952 PCI Express Bridge to Dual Serial & Parallel Port", - Oxford Semiconductor, Inc., DS-0046, Mar 06 08, Chapter "Parallel - Port Function", pp. 59-62 - -[7] "OXPCIe840 PCI Express Bridge to Parallel Port", Oxford - Semiconductor, Inc., DS-0049, Mar 06 08, Chapter "Parallel Port - Function", pp. 15-18 - -[8] "OXuPCI954 Data Sheet, Integrated High Performance Quad UARTs, 8-bit - Local Bus/Parallel Port, 3.3 V and 5 V (Universal Voltage) PCI - Interface.", Oxford Semiconductor, Inc., DS-0058, 26 Jan 2009, - Chapter 8 "Bidirectional Parallel Port", pp. 62-65 - -[9] "OXuPCI952 Data Sheet, Integrated High Performance Dual UARTs, 8-bit - Local Bus/Parallel Port, 3.3 V and 5.0 V Universal Voltage PCI - Interface.", Oxford Semiconductor, Inc., DS-0059, Sep 2007, Chapter - 8 "Bidirectional Parallel Port", pp. 61-64 - -Signed-off-by: Maciej W. Rozycki -Signed-off-by: Sudip Mukherjee -Link: https://lore.kernel.org/r/20230108215656.6433-6-sudipm.mukherjee@gmail.com -Signed-off-by: Greg Kroah-Hartman -Signed-off-by: Sasha Levin ---- - drivers/parport/parport_pc.c | 19 +++++++++++++------ - 1 file changed, 13 insertions(+), 6 deletions(-) - -diff --git a/drivers/parport/parport_pc.c b/drivers/parport/parport_pc.c -index 925be41eeebec..c2af2aa6d437c 100644 ---- a/drivers/parport/parport_pc.c -+++ b/drivers/parport/parport_pc.c -@@ -2657,12 +2657,19 @@ static struct parport_pc_pci { - /* titan_010l */ { 1, { { 3, -1 }, } }, - /* avlab_1p */ { 1, { { 0, 1}, } }, - /* avlab_2p */ { 2, { { 0, 1}, { 2, 3 },} }, -- /* The Oxford Semi cards are unusual: 954 doesn't support ECP, -- * and 840 locks up if you write 1 to bit 2! */ -- /* oxsemi_952 */ { 1, { { 0, 1 }, } }, -- /* oxsemi_954 */ { 1, { { 0, -1 }, } }, -- /* oxsemi_840 */ { 1, { { 0, 1 }, } }, -- /* oxsemi_pcie_pport */ { 1, { { 0, 1 }, } }, -+ /* The Oxford Semi cards are unusual: older variants of 954 don't -+ * support ECP, and 840 locks up if you write 1 to bit 2! None -+ * implement nFault or service interrupts and all require 00001 -+ * bit pattern to be used for bits 4:0 with ECR writes. */ -+ /* oxsemi_952 */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, -+ /* oxsemi_954 */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_ECP | -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, -+ /* oxsemi_840 */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, -+ /* oxsemi_pcie_pport */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, - /* aks_0100 */ { 1, { { 0, -1 }, } }, - /* mobility_pp */ { 1, { { 0, 1 }, } }, - --- -2.39.2 - diff --git a/queue-5.15/series b/queue-5.15/series index 0c82216ea6c..7e9b775ebcb 100644 --- a/queue-5.15/series +++ b/queue-5.15/series @@ -88,7 +88,6 @@ tty-fix-out-of-bounds-access-in-tty_driver_lookup_tt.patch tty-serial-fsl_lpuart-disable-the-cts-when-send-brea.patch serial-sc16is7xx-setup-gpio-controller-later-in-prob.patch mei-bus-fixup-upon-error-print-return-values-of-send.patch -parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch tools-iio-iio_utils-fix-memory-leak.patch iio-accel-mma9551_core-prevent-uninitialized-variabl.patch iio-accel-mma9551_core-prevent-uninitialized-variabl.patch-31264 diff --git a/queue-5.4/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch b/queue-5.4/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch deleted file mode 100644 index 37a724d989b..00000000000 --- a/queue-5.4/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch +++ /dev/null @@ -1,140 +0,0 @@ -From 1d4aed1e3bc9c59bf95dcbc8479b32234e423377 Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Sun, 8 Jan 2023 21:56:55 +0000 -Subject: parport_pc: Set up mode and ECR masks for Oxford Semiconductor - devices - -From: Maciej W. Rozycki - -[ Upstream commit c087df8d1e7dc2e764d11234d84b5af46d500f16 ] - -No Oxford Semiconductor PCI or PCIe parallel port device supports the -Parallel Port FIFO mode. All support the PS/2 Parallel Port mode and -the Enhanced Parallel Port mode via the ECR register. The original 5V -PCI OX16PCI954 device does not support the Extended Capabilities Port -mode, the Test mode or the Configuration mode, but all the other OxSemi -devices do, including in particular the 3.3V PCI OXmPCI954 device and -the universal voltage PCI OXuPCI954 device. All the unsupported modes -are marked reserved in the relevant datasheets. - -Accordingly enable the `base_hi' BAR for the 954 devices to enable PS2 -and EPP mode support via the ECR register, however mask the COMPAT mode -and, until we have a way to determine what chip variant it is that we -poke at, also the ECP mode, and mask the COMPAT mode only for all the -remaining OxSemi devices, fixing errors like: - -parport0: FIFO is stuck -FIFO write timed out - -and a non-functional port when the Parallel Port FIFO mode is selected. - -Complementing the fix apply an ECR mask for all these devices, which are -documented to only permit writing to the mode field of the ECR register -with a bit pattern of 00001 required to be written to bits 4:0 on mode -field writes. No nFault or service interrupts are implemented, which -will therefore never have to be enabled, though bit 2 does report the -FIFO threshold status to be polled for in the ECP mode where supported. - -We have a documented case of writing 1 to bit 2 causing a lock-up with -at least one OX12PCI840 device (from old drivers/parport/ChangeLog): - -2001-10-10 Tim Waugh - - * parport_pc.c: Support for OX12PCI840 PCI card (reported by - mk@daveg.com). Lock-ups diagnosed by Ronnie Arosa (and now we - just don't trust its ECR). - -which commit adbd321a17cc ("parport_pc: add base_hi BAR for oxsemi_840") -must have broken and by applying an ECR mask here we prevent the lock-up -from triggering. This could have been the reason for requiring 00001 to -be written to bits 4:0 of ECR. - -Update the inline comment accordingly; it has come from Linux 2.4.12 -back in 2001 and predates the introduction of OXmPCI954 and OXuPCI954 -devices that do support ECP. - -References: - -[1] "OX16PCI954 Integrated Quad UART and PCI interface", Oxford - Semiconductor Ltd., Data Sheet Revision 1.3, Feb. 1999, Chapter 9 - "Bidirectional Parallel Port", pp. 53-55 - -[2] "OX16PCI952 Data Sheet, Integrated High Performance Dual UARTs, - Parallel Port and 5.0v PCI interface", Oxford Semiconductor Ltd., - DS_B008A_00, Datasheet rev 1.1, June 2001, Chapter 8 "Bi-directional - Parallel Port", pp. 52-56 - -[3] "OXmPCI954 DATA SHEET Integrated High Performance Quad UARTs, 8-bit - Local Bus/Parallel Port. 3.3v PCI/miniPCI interface.", Oxford - Semiconductor Ltd., DS-0019, June 2005, Chapter 10 "Bidirectional - Parallel Port", pp. 86-90 - -[4] "OXmPCI952 Data Sheet, Integrated High Performance Dual UARTs, 8-bit - Local Bus/Parallel Port. 3.3v PCI/miniPCI interface.", Oxford - Semiconductor Ltd., DS-0020, June 2005, Chapter 8 "Bidirectional - Parallel Port", pp. 73-77 - -[5] "OX12PCI840 Integrated Parallel Port and PCI interface", Oxford - Semiconductor Ltd., DS-0021, Jun 2005, Chapter 5 "Bi-directional - Parallel Port", pp. 18-21 - -[6] "OXPCIe952 PCI Express Bridge to Dual Serial & Parallel Port", - Oxford Semiconductor, Inc., DS-0046, Mar 06 08, Chapter "Parallel - Port Function", pp. 59-62 - -[7] "OXPCIe840 PCI Express Bridge to Parallel Port", Oxford - Semiconductor, Inc., DS-0049, Mar 06 08, Chapter "Parallel Port - Function", pp. 15-18 - -[8] "OXuPCI954 Data Sheet, Integrated High Performance Quad UARTs, 8-bit - Local Bus/Parallel Port, 3.3 V and 5 V (Universal Voltage) PCI - Interface.", Oxford Semiconductor, Inc., DS-0058, 26 Jan 2009, - Chapter 8 "Bidirectional Parallel Port", pp. 62-65 - -[9] "OXuPCI952 Data Sheet, Integrated High Performance Dual UARTs, 8-bit - Local Bus/Parallel Port, 3.3 V and 5.0 V Universal Voltage PCI - Interface.", Oxford Semiconductor, Inc., DS-0059, Sep 2007, Chapter - 8 "Bidirectional Parallel Port", pp. 61-64 - -Signed-off-by: Maciej W. Rozycki -Signed-off-by: Sudip Mukherjee -Link: https://lore.kernel.org/r/20230108215656.6433-6-sudipm.mukherjee@gmail.com -Signed-off-by: Greg Kroah-Hartman -Signed-off-by: Sasha Levin ---- - drivers/parport/parport_pc.c | 19 +++++++++++++------ - 1 file changed, 13 insertions(+), 6 deletions(-) - -diff --git a/drivers/parport/parport_pc.c b/drivers/parport/parport_pc.c -index 3bc0027b7844b..6ebf2a3e9f04d 100644 ---- a/drivers/parport/parport_pc.c -+++ b/drivers/parport/parport_pc.c -@@ -2692,12 +2692,19 @@ static struct parport_pc_pci { - /* titan_010l */ { 1, { { 3, -1 }, } }, - /* avlab_1p */ { 1, { { 0, 1}, } }, - /* avlab_2p */ { 2, { { 0, 1}, { 2, 3 },} }, -- /* The Oxford Semi cards are unusual: 954 doesn't support ECP, -- * and 840 locks up if you write 1 to bit 2! */ -- /* oxsemi_952 */ { 1, { { 0, 1 }, } }, -- /* oxsemi_954 */ { 1, { { 0, -1 }, } }, -- /* oxsemi_840 */ { 1, { { 0, 1 }, } }, -- /* oxsemi_pcie_pport */ { 1, { { 0, 1 }, } }, -+ /* The Oxford Semi cards are unusual: older variants of 954 don't -+ * support ECP, and 840 locks up if you write 1 to bit 2! None -+ * implement nFault or service interrupts and all require 00001 -+ * bit pattern to be used for bits 4:0 with ECR writes. */ -+ /* oxsemi_952 */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, -+ /* oxsemi_954 */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_ECP | -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, -+ /* oxsemi_840 */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, -+ /* oxsemi_pcie_pport */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, - /* aks_0100 */ { 1, { { 0, -1 }, } }, - /* mobility_pp */ { 1, { { 0, 1 }, } }, - --- -2.39.2 - diff --git a/queue-5.4/series b/queue-5.4/series index c2b47e998c8..1fc4b8e8995 100644 --- a/queue-5.4/series +++ b/queue-5.4/series @@ -337,7 +337,6 @@ staging-emxx_udc-add-checks-for-dma_alloc_coherent.patch tty-fix-out-of-bounds-access-in-tty_driver_lookup_tt.patch tty-serial-fsl_lpuart-disable-the-cts-when-send-brea.patch mei-bus-fixup-upon-error-print-return-values-of-send.patch -parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch tools-iio-iio_utils-fix-memory-leak.patch iio-accel-mma9551_core-prevent-uninitialized-variabl.patch iio-accel-mma9551_core-prevent-uninitialized-variabl.patch-15017 diff --git a/queue-6.1/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch b/queue-6.1/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch deleted file mode 100644 index 650fa949062..00000000000 --- a/queue-6.1/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch +++ /dev/null @@ -1,140 +0,0 @@ -From e2688e02fb2c5050c6ad5cbce9bb0d5f6899f506 Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Sun, 8 Jan 2023 21:56:55 +0000 -Subject: parport_pc: Set up mode and ECR masks for Oxford Semiconductor - devices - -From: Maciej W. Rozycki - -[ Upstream commit c087df8d1e7dc2e764d11234d84b5af46d500f16 ] - -No Oxford Semiconductor PCI or PCIe parallel port device supports the -Parallel Port FIFO mode. All support the PS/2 Parallel Port mode and -the Enhanced Parallel Port mode via the ECR register. The original 5V -PCI OX16PCI954 device does not support the Extended Capabilities Port -mode, the Test mode or the Configuration mode, but all the other OxSemi -devices do, including in particular the 3.3V PCI OXmPCI954 device and -the universal voltage PCI OXuPCI954 device. All the unsupported modes -are marked reserved in the relevant datasheets. - -Accordingly enable the `base_hi' BAR for the 954 devices to enable PS2 -and EPP mode support via the ECR register, however mask the COMPAT mode -and, until we have a way to determine what chip variant it is that we -poke at, also the ECP mode, and mask the COMPAT mode only for all the -remaining OxSemi devices, fixing errors like: - -parport0: FIFO is stuck -FIFO write timed out - -and a non-functional port when the Parallel Port FIFO mode is selected. - -Complementing the fix apply an ECR mask for all these devices, which are -documented to only permit writing to the mode field of the ECR register -with a bit pattern of 00001 required to be written to bits 4:0 on mode -field writes. No nFault or service interrupts are implemented, which -will therefore never have to be enabled, though bit 2 does report the -FIFO threshold status to be polled for in the ECP mode where supported. - -We have a documented case of writing 1 to bit 2 causing a lock-up with -at least one OX12PCI840 device (from old drivers/parport/ChangeLog): - -2001-10-10 Tim Waugh - - * parport_pc.c: Support for OX12PCI840 PCI card (reported by - mk@daveg.com). Lock-ups diagnosed by Ronnie Arosa (and now we - just don't trust its ECR). - -which commit adbd321a17cc ("parport_pc: add base_hi BAR for oxsemi_840") -must have broken and by applying an ECR mask here we prevent the lock-up -from triggering. This could have been the reason for requiring 00001 to -be written to bits 4:0 of ECR. - -Update the inline comment accordingly; it has come from Linux 2.4.12 -back in 2001 and predates the introduction of OXmPCI954 and OXuPCI954 -devices that do support ECP. - -References: - -[1] "OX16PCI954 Integrated Quad UART and PCI interface", Oxford - Semiconductor Ltd., Data Sheet Revision 1.3, Feb. 1999, Chapter 9 - "Bidirectional Parallel Port", pp. 53-55 - -[2] "OX16PCI952 Data Sheet, Integrated High Performance Dual UARTs, - Parallel Port and 5.0v PCI interface", Oxford Semiconductor Ltd., - DS_B008A_00, Datasheet rev 1.1, June 2001, Chapter 8 "Bi-directional - Parallel Port", pp. 52-56 - -[3] "OXmPCI954 DATA SHEET Integrated High Performance Quad UARTs, 8-bit - Local Bus/Parallel Port. 3.3v PCI/miniPCI interface.", Oxford - Semiconductor Ltd., DS-0019, June 2005, Chapter 10 "Bidirectional - Parallel Port", pp. 86-90 - -[4] "OXmPCI952 Data Sheet, Integrated High Performance Dual UARTs, 8-bit - Local Bus/Parallel Port. 3.3v PCI/miniPCI interface.", Oxford - Semiconductor Ltd., DS-0020, June 2005, Chapter 8 "Bidirectional - Parallel Port", pp. 73-77 - -[5] "OX12PCI840 Integrated Parallel Port and PCI interface", Oxford - Semiconductor Ltd., DS-0021, Jun 2005, Chapter 5 "Bi-directional - Parallel Port", pp. 18-21 - -[6] "OXPCIe952 PCI Express Bridge to Dual Serial & Parallel Port", - Oxford Semiconductor, Inc., DS-0046, Mar 06 08, Chapter "Parallel - Port Function", pp. 59-62 - -[7] "OXPCIe840 PCI Express Bridge to Parallel Port", Oxford - Semiconductor, Inc., DS-0049, Mar 06 08, Chapter "Parallel Port - Function", pp. 15-18 - -[8] "OXuPCI954 Data Sheet, Integrated High Performance Quad UARTs, 8-bit - Local Bus/Parallel Port, 3.3 V and 5 V (Universal Voltage) PCI - Interface.", Oxford Semiconductor, Inc., DS-0058, 26 Jan 2009, - Chapter 8 "Bidirectional Parallel Port", pp. 62-65 - -[9] "OXuPCI952 Data Sheet, Integrated High Performance Dual UARTs, 8-bit - Local Bus/Parallel Port, 3.3 V and 5.0 V Universal Voltage PCI - Interface.", Oxford Semiconductor, Inc., DS-0059, Sep 2007, Chapter - 8 "Bidirectional Parallel Port", pp. 61-64 - -Signed-off-by: Maciej W. Rozycki -Signed-off-by: Sudip Mukherjee -Link: https://lore.kernel.org/r/20230108215656.6433-6-sudipm.mukherjee@gmail.com -Signed-off-by: Greg Kroah-Hartman -Signed-off-by: Sasha Levin ---- - drivers/parport/parport_pc.c | 19 +++++++++++++------ - 1 file changed, 13 insertions(+), 6 deletions(-) - -diff --git a/drivers/parport/parport_pc.c b/drivers/parport/parport_pc.c -index 5784dc20fb382..d6c63c7044608 100644 ---- a/drivers/parport/parport_pc.c -+++ b/drivers/parport/parport_pc.c -@@ -2658,12 +2658,19 @@ static struct parport_pc_pci { - /* titan_010l */ { 1, { { 3, -1 }, } }, - /* avlab_1p */ { 1, { { 0, 1}, } }, - /* avlab_2p */ { 2, { { 0, 1}, { 2, 3 },} }, -- /* The Oxford Semi cards are unusual: 954 doesn't support ECP, -- * and 840 locks up if you write 1 to bit 2! */ -- /* oxsemi_952 */ { 1, { { 0, 1 }, } }, -- /* oxsemi_954 */ { 1, { { 0, -1 }, } }, -- /* oxsemi_840 */ { 1, { { 0, 1 }, } }, -- /* oxsemi_pcie_pport */ { 1, { { 0, 1 }, } }, -+ /* The Oxford Semi cards are unusual: older variants of 954 don't -+ * support ECP, and 840 locks up if you write 1 to bit 2! None -+ * implement nFault or service interrupts and all require 00001 -+ * bit pattern to be used for bits 4:0 with ECR writes. */ -+ /* oxsemi_952 */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, -+ /* oxsemi_954 */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_ECP | -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, -+ /* oxsemi_840 */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, -+ /* oxsemi_pcie_pport */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, - /* aks_0100 */ { 1, { { 0, -1 }, } }, - /* mobility_pp */ { 1, { { 0, 1 }, } }, - /* netmos_9900 */ { 1, { { 0, -1 }, } }, --- -2.39.2 - diff --git a/queue-6.1/series b/queue-6.1/series index 4fb17870b35..8ec8a6dee5c 100644 --- a/queue-6.1/series +++ b/queue-6.1/series @@ -132,7 +132,6 @@ tty-fix-out-of-bounds-access-in-tty_driver_lookup_tt.patch tty-serial-fsl_lpuart-disable-the-cts-when-send-brea.patch serial-sc16is7xx-setup-gpio-controller-later-in-prob.patch mei-bus-fixup-upon-error-print-return-values-of-send.patch -parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch tools-iio-iio_utils-fix-memory-leak.patch bus-mhi-ep-fix-the-debug-message-for-mhi_pkt_type_re.patch iio-accel-mma9551_core-prevent-uninitialized-variabl.patch diff --git a/queue-6.2/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch b/queue-6.2/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch deleted file mode 100644 index 91addf3b62d..00000000000 --- a/queue-6.2/parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch +++ /dev/null @@ -1,140 +0,0 @@ -From 1ab7708c372d812a850d02c53db5fdc06c3dd6d0 Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Sun, 8 Jan 2023 21:56:55 +0000 -Subject: parport_pc: Set up mode and ECR masks for Oxford Semiconductor - devices - -From: Maciej W. Rozycki - -[ Upstream commit c087df8d1e7dc2e764d11234d84b5af46d500f16 ] - -No Oxford Semiconductor PCI or PCIe parallel port device supports the -Parallel Port FIFO mode. All support the PS/2 Parallel Port mode and -the Enhanced Parallel Port mode via the ECR register. The original 5V -PCI OX16PCI954 device does not support the Extended Capabilities Port -mode, the Test mode or the Configuration mode, but all the other OxSemi -devices do, including in particular the 3.3V PCI OXmPCI954 device and -the universal voltage PCI OXuPCI954 device. All the unsupported modes -are marked reserved in the relevant datasheets. - -Accordingly enable the `base_hi' BAR for the 954 devices to enable PS2 -and EPP mode support via the ECR register, however mask the COMPAT mode -and, until we have a way to determine what chip variant it is that we -poke at, also the ECP mode, and mask the COMPAT mode only for all the -remaining OxSemi devices, fixing errors like: - -parport0: FIFO is stuck -FIFO write timed out - -and a non-functional port when the Parallel Port FIFO mode is selected. - -Complementing the fix apply an ECR mask for all these devices, which are -documented to only permit writing to the mode field of the ECR register -with a bit pattern of 00001 required to be written to bits 4:0 on mode -field writes. No nFault or service interrupts are implemented, which -will therefore never have to be enabled, though bit 2 does report the -FIFO threshold status to be polled for in the ECP mode where supported. - -We have a documented case of writing 1 to bit 2 causing a lock-up with -at least one OX12PCI840 device (from old drivers/parport/ChangeLog): - -2001-10-10 Tim Waugh - - * parport_pc.c: Support for OX12PCI840 PCI card (reported by - mk@daveg.com). Lock-ups diagnosed by Ronnie Arosa (and now we - just don't trust its ECR). - -which commit adbd321a17cc ("parport_pc: add base_hi BAR for oxsemi_840") -must have broken and by applying an ECR mask here we prevent the lock-up -from triggering. This could have been the reason for requiring 00001 to -be written to bits 4:0 of ECR. - -Update the inline comment accordingly; it has come from Linux 2.4.12 -back in 2001 and predates the introduction of OXmPCI954 and OXuPCI954 -devices that do support ECP. - -References: - -[1] "OX16PCI954 Integrated Quad UART and PCI interface", Oxford - Semiconductor Ltd., Data Sheet Revision 1.3, Feb. 1999, Chapter 9 - "Bidirectional Parallel Port", pp. 53-55 - -[2] "OX16PCI952 Data Sheet, Integrated High Performance Dual UARTs, - Parallel Port and 5.0v PCI interface", Oxford Semiconductor Ltd., - DS_B008A_00, Datasheet rev 1.1, June 2001, Chapter 8 "Bi-directional - Parallel Port", pp. 52-56 - -[3] "OXmPCI954 DATA SHEET Integrated High Performance Quad UARTs, 8-bit - Local Bus/Parallel Port. 3.3v PCI/miniPCI interface.", Oxford - Semiconductor Ltd., DS-0019, June 2005, Chapter 10 "Bidirectional - Parallel Port", pp. 86-90 - -[4] "OXmPCI952 Data Sheet, Integrated High Performance Dual UARTs, 8-bit - Local Bus/Parallel Port. 3.3v PCI/miniPCI interface.", Oxford - Semiconductor Ltd., DS-0020, June 2005, Chapter 8 "Bidirectional - Parallel Port", pp. 73-77 - -[5] "OX12PCI840 Integrated Parallel Port and PCI interface", Oxford - Semiconductor Ltd., DS-0021, Jun 2005, Chapter 5 "Bi-directional - Parallel Port", pp. 18-21 - -[6] "OXPCIe952 PCI Express Bridge to Dual Serial & Parallel Port", - Oxford Semiconductor, Inc., DS-0046, Mar 06 08, Chapter "Parallel - Port Function", pp. 59-62 - -[7] "OXPCIe840 PCI Express Bridge to Parallel Port", Oxford - Semiconductor, Inc., DS-0049, Mar 06 08, Chapter "Parallel Port - Function", pp. 15-18 - -[8] "OXuPCI954 Data Sheet, Integrated High Performance Quad UARTs, 8-bit - Local Bus/Parallel Port, 3.3 V and 5 V (Universal Voltage) PCI - Interface.", Oxford Semiconductor, Inc., DS-0058, 26 Jan 2009, - Chapter 8 "Bidirectional Parallel Port", pp. 62-65 - -[9] "OXuPCI952 Data Sheet, Integrated High Performance Dual UARTs, 8-bit - Local Bus/Parallel Port, 3.3 V and 5.0 V Universal Voltage PCI - Interface.", Oxford Semiconductor, Inc., DS-0059, Sep 2007, Chapter - 8 "Bidirectional Parallel Port", pp. 61-64 - -Signed-off-by: Maciej W. Rozycki -Signed-off-by: Sudip Mukherjee -Link: https://lore.kernel.org/r/20230108215656.6433-6-sudipm.mukherjee@gmail.com -Signed-off-by: Greg Kroah-Hartman -Signed-off-by: Sasha Levin ---- - drivers/parport/parport_pc.c | 19 +++++++++++++------ - 1 file changed, 13 insertions(+), 6 deletions(-) - -diff --git a/drivers/parport/parport_pc.c b/drivers/parport/parport_pc.c -index 5784dc20fb382..d6c63c7044608 100644 ---- a/drivers/parport/parport_pc.c -+++ b/drivers/parport/parport_pc.c -@@ -2658,12 +2658,19 @@ static struct parport_pc_pci { - /* titan_010l */ { 1, { { 3, -1 }, } }, - /* avlab_1p */ { 1, { { 0, 1}, } }, - /* avlab_2p */ { 2, { { 0, 1}, { 2, 3 },} }, -- /* The Oxford Semi cards are unusual: 954 doesn't support ECP, -- * and 840 locks up if you write 1 to bit 2! */ -- /* oxsemi_952 */ { 1, { { 0, 1 }, } }, -- /* oxsemi_954 */ { 1, { { 0, -1 }, } }, -- /* oxsemi_840 */ { 1, { { 0, 1 }, } }, -- /* oxsemi_pcie_pport */ { 1, { { 0, 1 }, } }, -+ /* The Oxford Semi cards are unusual: older variants of 954 don't -+ * support ECP, and 840 locks up if you write 1 to bit 2! None -+ * implement nFault or service interrupts and all require 00001 -+ * bit pattern to be used for bits 4:0 with ECR writes. */ -+ /* oxsemi_952 */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, -+ /* oxsemi_954 */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_ECP | -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, -+ /* oxsemi_840 */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, -+ /* oxsemi_pcie_pport */ { 1, { { 0, 1 }, }, -+ PARPORT_MODE_COMPAT, ECR_MODE_MASK }, - /* aks_0100 */ { 1, { { 0, -1 }, } }, - /* mobility_pp */ { 1, { { 0, 1 }, } }, - /* netmos_9900 */ { 1, { { 0, -1 }, } }, --- -2.39.2 - diff --git a/queue-6.2/series b/queue-6.2/series index 8f80c257f7b..4b0a89a4219 100644 --- a/queue-6.2/series +++ b/queue-6.2/series @@ -144,7 +144,6 @@ tty-fix-out-of-bounds-access-in-tty_driver_lookup_tt.patch tty-serial-fsl_lpuart-disable-the-cts-when-send-brea.patch serial-sc16is7xx-setup-gpio-controller-later-in-prob.patch mei-bus-fixup-upon-error-print-return-values-of-send.patch -parport_pc-set-up-mode-and-ecr-masks-for-oxford-semi.patch tools-iio-iio_utils-fix-memory-leak.patch bus-mhi-ep-fix-the-debug-message-for-mhi_pkt_type_re.patch iio-accel-mma9551_core-prevent-uninitialized-variabl.patch -- 2.47.3