From 7601b250d53db736850eb7f7cc033a10dda2a23b Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Wed, 9 Sep 2020 22:10:47 +0930 Subject: [PATCH] power10 on ppc32 We don't support power10 on ppc32, mainly because some instructions have 34-bit fields for which we don't have relocations on ppc32. If you try to assemble typical code, you'll see errors saying "reloc ... not supported by object file format". Also, on 32-bit hosts with binutils configured without a 64-bit bfd, you'll see errors saying "bignum invalid" when using large offsets. But let's not kill output of prefix insns entirely on 32-bit hosts. * config/tc-ppc.c (md_assemble): Emit prefix insn by parts when valueT is smaller than 64 bits. (cherry picked from commit 15a32af52fdc010801396cbcf62f33d88435ac1a) --- gas/ChangeLog | 7 +++++++ gas/config/tc-ppc.c | 3 ++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/gas/ChangeLog b/gas/ChangeLog index 92ce9595d32..91104ea4a07 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,10 @@ +2021-01-28 Alan Modra + + Apply from master + 2020-09-09 Alan Modra + * config/tc-ppc.c (md_assemble): Emit prefix insn by parts when + valueT is smaller than 64 bits. + 2021-01-25 Alan Modra PR 27218 diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c index 9719341c546..9faf80f1629 100644 --- a/gas/config/tc-ppc.c +++ b/gas/config/tc-ppc.c @@ -4184,7 +4184,8 @@ md_assemble (char *str) /* The prefix part of an 8-byte instruction always occupies the lower addressed word in a doubleword, regardless of endianness. */ - if (!target_big_endian && insn_length == 8) + if (insn_length == 8 + && (sizeof (insn) > sizeof (valueT) || !target_big_endian)) { md_number_to_chars (f, PPC_GET_PREFIX (insn), 4); md_number_to_chars (f + 4, PPC_GET_SUFFIX (insn), 4); -- 2.39.5