From 80835abf7b908d1fc4b89e726ffac3d1312ca1ac Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Sat, 23 Aug 2025 10:07:29 +0200 Subject: [PATCH] 5.4-stable patches added patches: drm-amd-display-find-first-crtc-and-its-line-time-in-dce110_fill_display_configs.patch drm-amd-display-fix-fractional-fb-divider-in-set_pixel_clock_v3.patch --- ...-time-in-dce110_fill_display_configs.patch | 84 +++++++++++++++++++ ...nal-fb-divider-in-set_pixel_clock_v3.patch | 53 ++++++++++++ queue-5.4/series | 2 + 3 files changed, 139 insertions(+) create mode 100644 queue-5.4/drm-amd-display-find-first-crtc-and-its-line-time-in-dce110_fill_display_configs.patch create mode 100644 queue-5.4/drm-amd-display-fix-fractional-fb-divider-in-set_pixel_clock_v3.patch diff --git a/queue-5.4/drm-amd-display-find-first-crtc-and-its-line-time-in-dce110_fill_display_configs.patch b/queue-5.4/drm-amd-display-find-first-crtc-and-its-line-time-in-dce110_fill_display_configs.patch new file mode 100644 index 0000000000..9b4e3266ed --- /dev/null +++ b/queue-5.4/drm-amd-display-find-first-crtc-and-its-line-time-in-dce110_fill_display_configs.patch @@ -0,0 +1,84 @@ +From 669f73a26f6112eedbadac53a2f2707ac6d0b9c8 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Timur=20Krist=C3=B3f?= +Date: Thu, 31 Jul 2025 11:43:48 +0200 +Subject: drm/amd/display: Find first CRTC and its line time in dce110_fill_display_configs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Timur Kristóf + +commit 669f73a26f6112eedbadac53a2f2707ac6d0b9c8 upstream. + +dce110_fill_display_configs is shared between DCE 6-11, and +finding the first CRTC and its line time is relevant to DCE 6 too. +Move the code to find it from DCE 11 specific code. + +Signed-off-by: Timur Kristóf +Acked-by: Alex Deucher +Reviewed-by: Rodrigo Siqueira +Reviewed-by: Alex Hung +Signed-off-by: Alex Deucher +(cherry picked from commit 4ab09785f8d5d03df052827af073d5c508ff5f63) +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c | 30 ++++++---- + 1 file changed, 20 insertions(+), 10 deletions(-) + +--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c ++++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c +@@ -120,9 +120,12 @@ void dce110_fill_display_configs( + const struct dc_state *context, + struct dm_pp_display_configuration *pp_display_cfg) + { ++ struct dc *dc = context->clk_mgr->ctx->dc; + int j; + int num_cfgs = 0; + ++ pp_display_cfg->crtc_index = dc->res_pool->res_cap->num_timing_generator; ++ + for (j = 0; j < context->stream_count; j++) { + int k; + +@@ -164,6 +167,23 @@ void dce110_fill_display_configs( + cfg->v_refresh /= stream->timing.h_total; + cfg->v_refresh = (cfg->v_refresh + stream->timing.v_total / 2) + / stream->timing.v_total; ++ ++ /* Find first CRTC index and calculate its line time. ++ * This is necessary for DPM on SI GPUs. ++ */ ++ if (cfg->pipe_idx < pp_display_cfg->crtc_index) { ++ const struct dc_crtc_timing *timing = ++ &context->streams[0]->timing; ++ ++ pp_display_cfg->crtc_index = cfg->pipe_idx; ++ pp_display_cfg->line_time_in_us = ++ timing->h_total * 10000 / timing->pix_clk_100hz; ++ } ++ } ++ ++ if (!num_cfgs) { ++ pp_display_cfg->crtc_index = 0; ++ pp_display_cfg->line_time_in_us = 0; + } + + pp_display_cfg->display_count = num_cfgs; +@@ -231,16 +251,6 @@ void dce11_pplib_apply_display_requireme + + dce110_fill_display_configs(context, pp_display_cfg); + +- /* TODO: is this still applicable?*/ +- if (pp_display_cfg->display_count == 1) { +- const struct dc_crtc_timing *timing = +- &context->streams[0]->timing; +- +- pp_display_cfg->crtc_index = +- pp_display_cfg->disp_configs[0].pipe_idx; +- pp_display_cfg->line_time_in_us = timing->h_total * 10000 / timing->pix_clk_100hz; +- } +- + if (memcmp(&dc->current_state->pp_display_cfg, pp_display_cfg, sizeof(*pp_display_cfg)) != 0) + dm_pp_apply_display_requirements(dc->ctx, pp_display_cfg); + } diff --git a/queue-5.4/drm-amd-display-fix-fractional-fb-divider-in-set_pixel_clock_v3.patch b/queue-5.4/drm-amd-display-fix-fractional-fb-divider-in-set_pixel_clock_v3.patch new file mode 100644 index 0000000000..46f8717694 --- /dev/null +++ b/queue-5.4/drm-amd-display-fix-fractional-fb-divider-in-set_pixel_clock_v3.patch @@ -0,0 +1,53 @@ +From 10507478468f165ea681605d133991ed05cdff62 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Timur=20Krist=C3=B3f?= +Date: Thu, 31 Jul 2025 11:43:52 +0200 +Subject: drm/amd/display: Fix fractional fb divider in set_pixel_clock_v3 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Timur Kristóf + +commit 10507478468f165ea681605d133991ed05cdff62 upstream. + +For later VBIOS versions, the fractional feedback divider is +calculated as the remainder of dividing the feedback divider by +a factor, which is set to 1000000. For reference, see: +- calculate_fb_and_fractional_fb_divider +- calc_pll_max_vco_construct + +However, in case of old VBIOS versions that have +set_pixel_clock_v3, they only have 1 byte available for the +fractional feedback divider, and it's expected to be set to the +remainder from dividing the feedback divider by 10. +For reference see the legacy display code: +- amdgpu_pll_compute +- amdgpu_atombios_crtc_program_pll + +This commit fixes set_pixel_clock_v3 by dividing the fractional +feedback divider passed to the function by 100000. + +Fixes: 4562236b3bc0 ("drm/amd/dc: Add dc display driver (v2)") +Signed-off-by: Timur Kristóf +Acked-by: Alex Deucher +Reviewed-by: Rodrigo Siqueira +Reviewed-by: Alex Hung +Signed-off-by: Alex Deucher +(cherry picked from commit 027e7acc7e17802ebf28e1edb88a404836ad50d6) +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/display/dc/bios/command_table.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/gpu/drm/amd/display/dc/bios/command_table.c ++++ b/drivers/gpu/drm/amd/display/dc/bios/command_table.c +@@ -992,7 +992,7 @@ static enum bp_result set_pixel_clock_v3 + allocation.sPCLKInput.usFbDiv = + cpu_to_le16((uint16_t)bp_params->feedback_divider); + allocation.sPCLKInput.ucFracFbDiv = +- (uint8_t)bp_params->fractional_feedback_divider; ++ (uint8_t)(bp_params->fractional_feedback_divider / 100000); + allocation.sPCLKInput.ucPostDiv = + (uint8_t)bp_params->pixel_clock_post_divider; + diff --git a/queue-5.4/series b/queue-5.4/series index 50fb146e93..317b187cdd 100644 --- a/queue-5.4/series +++ b/queue-5.4/series @@ -307,3 +307,5 @@ media-ov2659-fix-memory-leaks-in-ov2659_probe.patch media-venus-add-a-check-for-packet-size-after-reading-from-shared-memory.patch memstick-fix-deadlock-by-moving-removing-flag-earlier.patch squashfs-fix-memory-leak-in-squashfs_fill_super.patch +drm-amd-display-fix-fractional-fb-divider-in-set_pixel_clock_v3.patch +drm-amd-display-find-first-crtc-and-its-line-time-in-dce110_fill_display_configs.patch -- 2.47.3