From 847343cfbf80bd221f42595a0038a8d5e7ab7088 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 16 Jan 2025 16:02:34 +0000 Subject: [PATCH] semihosting/arm-compat: Include missing 'cpu.h' header MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit ARM semihosting implementations in "common-semi-target.h" must de-reference the target CPUArchState, which is declared in each target "cpu.h" header. Include it in order to avoid when refactoring: In file included from ../../semihosting/arm-compat-semi.c:169: ../target/riscv/common-semi-target.h:16:5: error: use of undeclared identifier 'RISCVCPU' 16 | RISCVCPU *cpu = RISCV_CPU(cs); | ^ Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20250103171037.11265-4-philmd@linaro.org> Signed-off-by: Alex Bennée Message-Id: <20250116160306.1709518-6-alex.bennee@linaro.org> --- semihosting/arm-compat-semi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c index d78c6428b9..86e5260e50 100644 --- a/semihosting/arm-compat-semi.c +++ b/semihosting/arm-compat-semi.c @@ -166,6 +166,7 @@ static LayoutInfo common_semi_find_bases(CPUState *cs) #endif +#include "cpu.h" #include "common-semi-target.h" /* -- 2.39.5