From 8574af463cf20a290048885cae7435706142c750 Mon Sep 17 00:00:00 2001 From: law Date: Fri, 31 May 2019 21:40:25 +0000 Subject: [PATCH] * config/mips/mips.c (mips_expand_builtin_insn): Swap the 1st and 3rd operands of the fmadd/fmsub/maddv builtin. * gcc.target/mips/msa-fmadd.c: New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271826 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 6 ++ gcc/config/mips/mips.c | 13 +++ gcc/testsuite/ChangeLog | 4 + gcc/testsuite/gcc.target/mips/msa-fmadd.c | 101 ++++++++++++++++++++++ 4 files changed, 124 insertions(+) create mode 100644 gcc/testsuite/gcc.target/mips/msa-fmadd.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2717c3cf0733..e0a6acefdf0a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2019-05-31 Prachi Godbole + Robert Suchanek + + * config/mips/mips.c (mips_expand_builtin_insn): Swap the 1st + and 3rd operands of the fmadd/fmsub/maddv builtin. + 2019-05-31 Jakub Jelinek * tree.h (OMP_CLAUSE__CONDTEMP__ITER): Define. diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 6eafe3df3c13..c6433dca1155 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -16867,6 +16867,19 @@ mips_expand_builtin_insn (enum insn_code icode, unsigned int nops, std::swap (ops[1], ops[2]); break; + case CODE_FOR_msa_maddv_b: + case CODE_FOR_msa_maddv_h: + case CODE_FOR_msa_maddv_w: + case CODE_FOR_msa_maddv_d: + case CODE_FOR_msa_fmadd_w: + case CODE_FOR_msa_fmadd_d: + case CODE_FOR_msa_fmsub_w: + case CODE_FOR_msa_fmsub_d: + /* fma(a, b, c) results into (a * b + c), however builtin_msa_fmadd expects + it to be (a + b * c). Swap the 1st and 3rd operands. */ + std::swap (ops[1], ops[3]); + break; + case CODE_FOR_msa_slli_b: case CODE_FOR_msa_slli_h: case CODE_FOR_msa_slli_w: diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 04e7f552e3fc..e39b064a41aa 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2019-05-31 Dragan Mladjenovic + + * gcc.target/mips/msa-fmadd.c: New. + 2019-05-31 Jakub Jelinek * c-c++-common/gomp/lastprivate-conditional-2.c (foo): Don't expect diff --git a/gcc/testsuite/gcc.target/mips/msa-fmadd.c b/gcc/testsuite/gcc.target/mips/msa-fmadd.c new file mode 100644 index 000000000000..9265c04ff9c3 --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/msa-fmadd.c @@ -0,0 +1,101 @@ +/* { dg-do compile } */ +/* { dg-options "-mfp64 -mhard-float -mmsa -EL -flax-vector-conversions" } */ +/* { dg-skip-if "uses global registers" { *-*-* } { "-O0" } { "" } } */ + +typedef int v4i32 __attribute__ ((vector_size(16))); +typedef float v4f32 __attribute__ ((vector_size(16))); +typedef double v2f64 __attribute__ ((vector_size(16))); + +/* Test that MSA FMADD-like intrinsics do not use first operand for multiplication. */ + +register v4i32 a __asm__("$f20"); +register v4i32 b __asm__("$f22"); +register v4f32 c __asm__("$f24"); +register v4f32 d __asm__("$f26"); +register v2f64 e __asm__("$f28"); +register v2f64 f __asm__("$f30"); + +void +maddv_b_msa (void) +{ + a = __builtin_msa_maddv_b (a, b, b); +} +/* { dg-final { scan-assembler "maddv\\\.b\t\\\$w20,\\\$w22,\\\$w22" } } */ + +void +maddv_h_msa (void) +{ + a = __builtin_msa_maddv_h (a, b, b); +} +/* { dg-final { scan-assembler "maddv\\\.h\t\\\$w20,\\\$w22,\\\$w22" } } */ + +void +maddv_w_msa (void) +{ + a = __builtin_msa_maddv_w (a, b, b); +} +/* { dg-final { scan-assembler "maddv\\\.w\t\\\$w20,\\\$w22,\\\$w22" } } */ + +void +maddv_d_msa (void) +{ + a = __builtin_msa_maddv_d (a, b, b); +} +/* { dg-final { scan-assembler "maddv\\\.d\t\\\$w20,\\\$w22,\\\$w22" } } */ + +void +msubv_b_msa (void) +{ + a = __builtin_msa_msubv_b (a, b, b); +} +/* { dg-final { scan-assembler "msubv\\\.b\t\\\$w20,\\\$w22,\\\$w22" } } */ + +void +msubv_h_msa (void) +{ + a = __builtin_msa_msubv_h (a, b, b); +} +/* { dg-final { scan-assembler "msubv\\\.h\t\\\$w20,\\\$w22,\\\$w22" } } */ + +void +msubv_w_msa (void) +{ + a = __builtin_msa_msubv_w (a, b, b); +} +/* { dg-final { scan-assembler "msubv\\\.w\t\\\$w20,\\\$w22,\\\$w22" } } */ + +void +msubv_d_msa (void) +{ + a = __builtin_msa_msubv_d (a, b, b); +} +/* { dg-final { scan-assembler "msubv\\\.d\t\\\$w20,\\\$w22,\\\$w22" } } */ + +void +fmadd_w_msa (void) +{ + c = __builtin_msa_fmadd_w (c, d, d); +} +/* { dg-final { scan-assembler "fmadd\\\.w\t\\\$w24,\\\$w26,\\\$w26" } } */ + +void +fmadd_d_msa (void) +{ + e = __builtin_msa_fmadd_d (e, f, f); +} +/* { dg-final { scan-assembler "fmadd\\\.d\t\\\$w28,\\\$w30,\\\$w30" } } */ + +void +fmsub_w_msa (void) +{ + c = __builtin_msa_fmsub_w (c, d, d); +} +/* { dg-final { scan-assembler "fmsub\\\.w\t\\\$w24,\\\$w26,\\\$w26" } } */ + +void +fmsub_d_msa (void) +{ + e = __builtin_msa_fmsub_d (e, f, f); +} +/* { dg-final { scan-assembler "fmsub\\\.d\t\\\$w28,\\\$w30,\\\$w30" } } */ + -- 2.39.2