From 881d5094b138d002aab14922d41ec2058b9570c7 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Wed, 12 Feb 2025 11:00:06 +0100 Subject: [PATCH] soc: mediatek: mtk-mmsys: Fix MT8188 VDO1 DPI1 output selection The VDO1_MERGE4 hardware (merge5 software component) should be set to enable output to DPI1_SEL by setting BIT(2) but, despite the intention being exactly that, this won't work because the declared register mask is wrong as it is set as GENMASK(1, 0). Register MERGE4_MOUT_EN in VDO1 has four used bits [3, 0] so fix the mask to reflect that. That, in turn, allows the mmsys driver to actually set BIT(2) in this register, fixing the MERGE4 output to DPI1 selection. Fixes: c0349314d5a0 ("soc: mediatek: Support MT8188 VDOSYS1 in mtk-mmsys") Link: https://lore.kernel.org/r/20250212100012.33001-3-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno --- drivers/soc/mediatek/mt8188-mmsys.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/soc/mediatek/mt8188-mmsys.h b/drivers/soc/mediatek/mt8188-mmsys.h index 6bebf1a69fc07..a1d63be0a73dc 100644 --- a/drivers/soc/mediatek/mt8188-mmsys.h +++ b/drivers/soc/mediatek/mt8188-mmsys.h @@ -343,7 +343,7 @@ static const struct mtk_mmsys_routes mmsys_mt8188_vdo1_routing_table[] = { MT8188_DISP_DPI1_SEL_IN_FROM_VPP_MERGE4_MOUT }, { DDP_COMPONENT_MERGE5, DDP_COMPONENT_DPI1, - MT8188_VDO1_MERGE4_SOUT_SEL, GENMASK(1, 0), + MT8188_VDO1_MERGE4_SOUT_SEL, GENMASK(3, 0), MT8188_MERGE4_SOUT_TO_DPI1_SEL }, { DDP_COMPONENT_MERGE5, DDP_COMPONENT_DP_INTF1, -- 2.47.2