From 8e0b373f8aa4b9feec7b44029455587e2e3d2b0f Mon Sep 17 00:00:00 2001 From: Yongbok Kim Date: Wed, 20 Jun 2018 13:06:18 +0100 Subject: [PATCH] target/mips: Fix gdbstub to read/write 64 bit FP registers Fix gdbstub to read/write 64 bit FP registers Signed-off-by: Yongbok Kim Reviewed-by: Aleksandar Markovic Signed-off-by: Aleksandar Markovic --- target/mips/gdbstub.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/mips/gdbstub.c b/target/mips/gdbstub.c index 6d1fb70f2cb..18e0e6dce4d 100644 --- a/target/mips/gdbstub.c +++ b/target/mips/gdbstub.c @@ -39,7 +39,7 @@ int mips_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) return gdb_get_regl(mem_buf, (int32_t)env->active_fpu.fcr0); default: if (env->CP0_Status & (1 << CP0St_FR)) { - return gdb_get_regl(mem_buf, + return gdb_get_reg64(mem_buf, env->active_fpu.fpr[n - 38].d); } else { return gdb_get_regl(mem_buf, @@ -100,6 +100,7 @@ int mips_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) break; default: if (env->CP0_Status & (1 << CP0St_FR)) { + uint64_t tmp = ldq_p(mem_buf); env->active_fpu.fpr[n - 38].d = tmp; } else { env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX] = tmp; -- 2.39.5