From 98a18f4d1189886921f563bbff86c30090915dfd Mon Sep 17 00:00:00 2001 From: Nicholas Piggin Date: Tue, 8 Aug 2023 13:11:11 +1000 Subject: [PATCH] target/ppc: Remove single-step suppression inside 0x100-0xf00 MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Single-step interrupts are suppressed if the nip is between 0x100 and 0xf00. This has been the case for a long time and it's not clear what the intention is. Likely either an attempt to suppress trace interrupts for instructions that cause an interrupt on completion, or a workaround to prevent software tripping over itself single stepping its interrupt handlers. BookE interrupt vectors are set by IVOR registers, and BookS has AIL modes and new interrupt types, so there are many interrupts including the debug interrupt which can be outside this range. So any effect it might have had does not cover most cases (including Linux on recent BookS CPUs). Remove this special case. Signed-off-by: Nicholas Piggin [ clg : fixed typo in commit logs ] Signed-off-by: Cédric Le Goater --- target/ppc/translate.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 7111b340305..d71811a1b42 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -7408,8 +7408,7 @@ static void ppc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) } /* Honor single stepping. */ - if (unlikely(ctx->singlestep_enabled & CPU_SINGLE_STEP) - && (nip <= 0x100 || nip > 0xf00)) { + if (unlikely(ctx->singlestep_enabled & CPU_SINGLE_STEP)) { switch (is_jmp) { case DISAS_TOO_MANY: case DISAS_EXIT_UPDATE: -- 2.39.5