From 9f59ddcc4fb4cf4f96b2751d4170596c8df19280 Mon Sep 17 00:00:00 2001 From: Nathan Froyd Date: Sat, 20 Feb 2010 10:19:09 -0800 Subject: [PATCH] target-mips: fix CpU exception for coprocessor 0 When we signal a CpU exception for coprocessor 0, we should indicate that it's for coprocessor 0 instead of coprocessor 1. Signed-off-by: Nathan Froyd Signed-off-by: Aurelien Jarno (cherry picked from commit 13f160cebd0778113ba8d251aea297286b1666cb) --- target-mips/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-mips/translate.c b/target-mips/translate.c index f756ab9db64..bf983821ac1 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -821,7 +821,7 @@ static inline void gen_op_addr_add (DisasContext *ctx, TCGv ret, TCGv arg0, TCGv static inline void check_cp0_enabled(DisasContext *ctx) { if (unlikely(!(ctx->hflags & MIPS_HFLAG_CP0))) - generate_exception_err(ctx, EXCP_CpU, 1); + generate_exception_err(ctx, EXCP_CpU, 0); } static inline void check_cp1_enabled(DisasContext *ctx) -- 2.39.5