From a01491a238fab670ba68b5c649c109c64ae23e21 Mon Sep 17 00:00:00 2001 From: Helge Deller Date: Fri, 17 Nov 2023 11:02:39 +0100 Subject: [PATCH] target/hppa: Fix 64-bit SHRPD instruction When shifting the two joined 64-bit registers right, shift the upper 64-bit register to the left and the lower 64-bit register to the right before merging them with OR. Signed-off-by: Helge Deller Reviewed-by: Richard Henderson --- target/hppa/translate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 4a4830c3e3a..3ef39b1bd74 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -3438,9 +3438,9 @@ static bool trans_shrp_sar(DisasContext *ctx, arg_shrp_sar *a) TCGv_i64 n = tcg_temp_new_i64(); tcg_gen_xori_i64(n, cpu_sar, 63); - tcg_gen_shl_i64(t, src2, n); + tcg_gen_shl_i64(t, src1, n); tcg_gen_shli_i64(t, t, 1); - tcg_gen_shr_i64(dest, src1, cpu_sar); + tcg_gen_shr_i64(dest, src2, cpu_sar); tcg_gen_or_i64(dest, dest, t); } else { TCGv_i64 t = tcg_temp_new_i64(); -- 2.39.5