From add27101c45620c312abeed9ab50ec76d958d6b7 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Fri, 20 Apr 2018 18:54:42 +0200 Subject: [PATCH] 3.18-stable patches added patches: clk-mvebu-armada-38x-add-support-for-1866mhz-variants.patch clk-mvebu-armada-38x-add-support-for-missing-clocks.patch mmc-jz4740-fix-race-condition-in-irq-mask-update.patch thermal-imx-fix-race-condition-in-imx_thermal_probe.patch watchdog-f71808e_wdt-fix-wd_en-register-read.patch --- ...38x-add-support-for-1866mhz-variants.patch | 55 +++++++++++++ ...a-38x-add-support-for-missing-clocks.patch | 77 +++++++++++++++++++ ...ix-race-condition-in-irq-mask-update.patch | 54 +++++++++++++ queue-3.18/series | 5 ++ ...-race-condition-in-imx_thermal_probe.patch | 55 +++++++++++++ ...-f71808e_wdt-fix-wd_en-register-read.patch | 33 ++++++++ 6 files changed, 279 insertions(+) create mode 100644 queue-3.18/clk-mvebu-armada-38x-add-support-for-1866mhz-variants.patch create mode 100644 queue-3.18/clk-mvebu-armada-38x-add-support-for-missing-clocks.patch create mode 100644 queue-3.18/mmc-jz4740-fix-race-condition-in-irq-mask-update.patch create mode 100644 queue-3.18/thermal-imx-fix-race-condition-in-imx_thermal_probe.patch create mode 100644 queue-3.18/watchdog-f71808e_wdt-fix-wd_en-register-read.patch diff --git a/queue-3.18/clk-mvebu-armada-38x-add-support-for-1866mhz-variants.patch b/queue-3.18/clk-mvebu-armada-38x-add-support-for-1866mhz-variants.patch new file mode 100644 index 00000000000..13a0fbd0231 --- /dev/null +++ b/queue-3.18/clk-mvebu-armada-38x-add-support-for-1866mhz-variants.patch @@ -0,0 +1,55 @@ +From 9593f4f56cf5d1c443f66660a0c7f01de38f979d Mon Sep 17 00:00:00 2001 +From: Ralph Sennhauser +Date: Wed, 24 May 2017 16:58:52 +0200 +Subject: clk: mvebu: armada-38x: add support for 1866MHz variants + +From: Ralph Sennhauser + +commit 9593f4f56cf5d1c443f66660a0c7f01de38f979d upstream. + +The Linksys WRT3200ACM CPU is clocked at 1866MHz. Add 1866MHz to the +list of supported CPU frequencies. Also update multiplier and divisor +for the l2clk and ddrclk. + +Noticed by the following warning: +[ 0.000000] Selected CPU frequency (16) unsupported + +Signed-off-by: Ralph Sennhauser +Reviewed-by: Gregory CLEMENT +Signed-off-by: Stephen Boyd +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/clk/mvebu/armada-38x.c | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +--- a/drivers/clk/mvebu/armada-38x.c ++++ b/drivers/clk/mvebu/armada-38x.c +@@ -49,7 +49,8 @@ static const u32 armada_38x_cpu_frequenc + 0, 0, 0, 0, + 1066 * 1000 * 1000, 0, 0, 0, + 1332 * 1000 * 1000, 0, 0, 0, +- 1600 * 1000 * 1000, ++ 1600 * 1000 * 1000, 0, 0, 0, ++ 1866 * 1000 * 1000, + }; + + static u32 __init armada_38x_get_cpu_freq(void __iomem *sar) +@@ -79,7 +80,7 @@ static const int armada_38x_cpu_l2_ratio + {1, 2}, {0, 1}, {0, 1}, {0, 1}, + {1, 2}, {0, 1}, {0, 1}, {0, 1}, + {1, 2}, {0, 1}, {0, 1}, {0, 1}, +- {0, 1}, {0, 1}, {0, 1}, {0, 1}, ++ {1, 2}, {0, 1}, {0, 1}, {0, 1}, + {0, 1}, {0, 1}, {0, 1}, {0, 1}, + {0, 1}, {0, 1}, {0, 1}, {0, 1}, + {0, 1}, {0, 1}, {0, 1}, {0, 1}, +@@ -90,7 +91,7 @@ static const int armada_38x_cpu_ddr_rati + {1, 2}, {0, 1}, {0, 1}, {0, 1}, + {1, 2}, {0, 1}, {0, 1}, {0, 1}, + {1, 2}, {0, 1}, {0, 1}, {0, 1}, +- {0, 1}, {0, 1}, {0, 1}, {0, 1}, ++ {1, 2}, {0, 1}, {0, 1}, {0, 1}, + {0, 1}, {0, 1}, {0, 1}, {0, 1}, + {0, 1}, {0, 1}, {0, 1}, {0, 1}, + {0, 1}, {0, 1}, {0, 1}, {0, 1}, diff --git a/queue-3.18/clk-mvebu-armada-38x-add-support-for-missing-clocks.patch b/queue-3.18/clk-mvebu-armada-38x-add-support-for-missing-clocks.patch new file mode 100644 index 00000000000..35bb69f1175 --- /dev/null +++ b/queue-3.18/clk-mvebu-armada-38x-add-support-for-missing-clocks.patch @@ -0,0 +1,77 @@ +From 6a4a4595804548e173f0763a0e7274a3521c59a9 Mon Sep 17 00:00:00 2001 +From: Richard Genoud +Date: Tue, 13 Mar 2018 16:27:02 +0100 +Subject: clk: mvebu: armada-38x: add support for missing clocks + +From: Richard Genoud + +commit 6a4a4595804548e173f0763a0e7274a3521c59a9 upstream. + +Clearfog boards can come with a CPU clocked at 1600MHz (commercial) +or 1333MHz (industrial). + +They have also some dip-switches to select a different clock (666, 800, +1066, 1200). + +The funny thing is that the recovery button is on the MPP34 fq selector. +So, when booting an industrial board with this button down, the frequency +666MHz is selected (and the kernel didn't boot). + +This patch add all the missing clocks. + +The only mode I didn't test is 2GHz (uboot found 4294MHz instead :/ ). + +Fixes: 0e85aeced4d6 ("clk: mvebu: add clock support for Armada 380/385") +Cc: # 3.16.x: 9593f4f56cf5: clk: mvebu: armada-38x: add support for 1866MHz variants +Cc: # 3.16.x + +Signed-off-by: Richard Genoud +Acked-by: Gregory CLEMENT +Signed-off-by: Stephen Boyd +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/clk/mvebu/armada-38x.c | 14 +++++++------- + 1 file changed, 7 insertions(+), 7 deletions(-) + +--- a/drivers/clk/mvebu/armada-38x.c ++++ b/drivers/clk/mvebu/armada-38x.c +@@ -46,11 +46,11 @@ static u32 __init armada_38x_get_tclk_fr + } + + static const u32 armada_38x_cpu_frequencies[] __initconst = { +- 0, 0, 0, 0, +- 1066 * 1000 * 1000, 0, 0, 0, ++ 666 * 1000 * 1000, 0, 800 * 1000 * 1000, 0, ++ 1066 * 1000 * 1000, 0, 1200 * 1000 * 1000, 0, + 1332 * 1000 * 1000, 0, 0, 0, + 1600 * 1000 * 1000, 0, 0, 0, +- 1866 * 1000 * 1000, ++ 1866 * 1000 * 1000, 0, 0, 2000 * 1000 * 1000, + }; + + static u32 __init armada_38x_get_cpu_freq(void __iomem *sar) +@@ -76,11 +76,11 @@ static const struct coreclk_ratio armada + }; + + static const int armada_38x_cpu_l2_ratios[32][2] __initconst = { +- {0, 1}, {0, 1}, {0, 1}, {0, 1}, +- {1, 2}, {0, 1}, {0, 1}, {0, 1}, +- {1, 2}, {0, 1}, {0, 1}, {0, 1}, ++ {1, 2}, {0, 1}, {1, 2}, {0, 1}, ++ {1, 2}, {0, 1}, {1, 2}, {0, 1}, + {1, 2}, {0, 1}, {0, 1}, {0, 1}, + {1, 2}, {0, 1}, {0, 1}, {0, 1}, ++ {1, 2}, {0, 1}, {0, 1}, {1, 2}, + {0, 1}, {0, 1}, {0, 1}, {0, 1}, + {0, 1}, {0, 1}, {0, 1}, {0, 1}, + {0, 1}, {0, 1}, {0, 1}, {0, 1}, +@@ -91,7 +91,7 @@ static const int armada_38x_cpu_ddr_rati + {1, 2}, {0, 1}, {0, 1}, {0, 1}, + {1, 2}, {0, 1}, {0, 1}, {0, 1}, + {1, 2}, {0, 1}, {0, 1}, {0, 1}, +- {1, 2}, {0, 1}, {0, 1}, {0, 1}, ++ {1, 2}, {0, 1}, {0, 1}, {7, 15}, + {0, 1}, {0, 1}, {0, 1}, {0, 1}, + {0, 1}, {0, 1}, {0, 1}, {0, 1}, + {0, 1}, {0, 1}, {0, 1}, {0, 1}, diff --git a/queue-3.18/mmc-jz4740-fix-race-condition-in-irq-mask-update.patch b/queue-3.18/mmc-jz4740-fix-race-condition-in-irq-mask-update.patch new file mode 100644 index 00000000000..ad5574f2ae1 --- /dev/null +++ b/queue-3.18/mmc-jz4740-fix-race-condition-in-irq-mask-update.patch @@ -0,0 +1,54 @@ +From a04f0017c22453613d5f423326b190c61e3b4f98 Mon Sep 17 00:00:00 2001 +From: Alex Smith +Date: Wed, 28 Mar 2018 18:00:43 -0300 +Subject: mmc: jz4740: Fix race condition in IRQ mask update + +From: Alex Smith + +commit a04f0017c22453613d5f423326b190c61e3b4f98 upstream. + +A spinlock is held while updating the internal copy of the IRQ mask, +but not while writing it to the actual IMASK register. After the lock +is released, an IRQ can occur before the IMASK register is written. +If handling this IRQ causes the mask to be changed, when the handler +returns back to the middle of the first mask update, a stale value +will be written to the mask register. + +If this causes an IRQ to become unmasked that cannot have its status +cleared by writing a 1 to it in the IREG register, e.g. the SDIO IRQ, +then we can end up stuck with the same IRQ repeatedly being fired but +not handled. Normally the MMC IRQ handler attempts to clear any +unexpected IRQs by writing IREG, but for those that cannot be cleared +in this way then the IRQ will just repeatedly fire. + +This was resulting in lockups after a while of using Wi-Fi on the +CI20 (GitHub issue #19). + +Resolve by holding the spinlock until after the IMASK register has +been updated. + +Cc: stable@vger.kernel.org +Link: https://github.com/MIPS/CI20_linux/issues/19 +Fixes: 61bfbdb85687 ("MMC: Add support for the controller on JZ4740 SoCs.") +Tested-by: Mathieu Malaterre +Signed-off-by: Alex Smith +Signed-off-by: Ulf Hansson +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/mmc/host/jz4740_mmc.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/mmc/host/jz4740_mmc.c ++++ b/drivers/mmc/host/jz4740_mmc.c +@@ -368,9 +368,9 @@ static void jz4740_mmc_set_irq_enabled(s + host->irq_mask &= ~irq; + else + host->irq_mask |= irq; +- spin_unlock_irqrestore(&host->lock, flags); + + writew(host->irq_mask, host->base + JZ_REG_MMC_IMASK); ++ spin_unlock_irqrestore(&host->lock, flags); + } + + static void jz4740_mmc_clock_enable(struct jz4740_mmc_host *host, diff --git a/queue-3.18/series b/queue-3.18/series index 4e0729f9912..759014de5af 100644 --- a/queue-3.18/series +++ b/queue-3.18/series @@ -23,3 +23,8 @@ asoc-ssm2602-replace-reg_default_raw-with-reg_default.patch thunderbolt-resume-control-channel-after-hibernation-image-is-created.patch random-use-a-tighter-cap-in-credit_entropy_bits_safe.patch jbd2-if-the-journal-is-aborted-then-don-t-allow-update-of-the-log-tail.patch +mmc-jz4740-fix-race-condition-in-irq-mask-update.patch +clk-mvebu-armada-38x-add-support-for-1866mhz-variants.patch +clk-mvebu-armada-38x-add-support-for-missing-clocks.patch +thermal-imx-fix-race-condition-in-imx_thermal_probe.patch +watchdog-f71808e_wdt-fix-wd_en-register-read.patch diff --git a/queue-3.18/thermal-imx-fix-race-condition-in-imx_thermal_probe.patch b/queue-3.18/thermal-imx-fix-race-condition-in-imx_thermal_probe.patch new file mode 100644 index 00000000000..7e636da8bc7 --- /dev/null +++ b/queue-3.18/thermal-imx-fix-race-condition-in-imx_thermal_probe.patch @@ -0,0 +1,55 @@ +From cf1ba1d73a33944d8c1a75370a35434bf146b8a7 Mon Sep 17 00:00:00 2001 +From: Mikhail Lappo +Date: Fri, 2 Feb 2018 16:17:46 -0200 +Subject: thermal: imx: Fix race condition in imx_thermal_probe() + +From: Mikhail Lappo + +commit cf1ba1d73a33944d8c1a75370a35434bf146b8a7 upstream. + +When device boots with T > T_trip_1 and requests interrupt, +the race condition takes place. The interrupt comes before +THERMAL_DEVICE_ENABLED is set. This leads to an attempt to +reading sensor value from irq and disabling the sensor, based on +the data->mode field, which expected to be THERMAL_DEVICE_ENABLED, +but still stays as THERMAL_DEVICE_DISABLED. Afher this issue +sensor is never re-enabled, as the driver state is wrong. + +Fix this problem by setting the 'data' members prior to +requesting the interrupts. + +Fixes: 37713a1e8e4c ("thermal: imx: implement thermal alarm interrupt handling") +Cc: +Signed-off-by: Mikhail Lappo +Signed-off-by: Fabio Estevam +Reviewed-by: Philipp Zabel +Acked-by: Dong Aisheng +Signed-off-by: Zhang Rui +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/thermal/imx_thermal.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/drivers/thermal/imx_thermal.c ++++ b/drivers/thermal/imx_thermal.c +@@ -493,6 +493,9 @@ static int imx_thermal_probe(struct plat + if (data->irq < 0) + return data->irq; + ++ data->irq_enabled = true; ++ data->mode = THERMAL_DEVICE_ENABLED; ++ + ret = devm_request_threaded_irq(&pdev->dev, data->irq, + imx_thermal_alarm_irq, imx_thermal_alarm_irq_thread, + 0, "imx_thermal", data); +@@ -576,9 +579,6 @@ static int imx_thermal_probe(struct plat + regmap_write(map, TEMPSENSE0 + REG_CLR, TEMPSENSE0_POWER_DOWN); + regmap_write(map, TEMPSENSE0 + REG_SET, TEMPSENSE0_MEASURE_TEMP); + +- data->irq_enabled = true; +- data->mode = THERMAL_DEVICE_ENABLED; +- + return 0; + } + diff --git a/queue-3.18/watchdog-f71808e_wdt-fix-wd_en-register-read.patch b/queue-3.18/watchdog-f71808e_wdt-fix-wd_en-register-read.patch new file mode 100644 index 00000000000..b7820ee943b --- /dev/null +++ b/queue-3.18/watchdog-f71808e_wdt-fix-wd_en-register-read.patch @@ -0,0 +1,33 @@ +From 977f6f68331f94bb72ad84ee96b7b87ce737d89d Mon Sep 17 00:00:00 2001 +From: Igor Pylypiv +Date: Tue, 6 Mar 2018 23:47:25 -0800 +Subject: watchdog: f71808e_wdt: Fix WD_EN register read + +From: Igor Pylypiv + +commit 977f6f68331f94bb72ad84ee96b7b87ce737d89d upstream. + +F71808FG_FLAG_WD_EN defines bit position, not a bitmask + +Signed-off-by: Igor Pylypiv +Reviewed-by: Guenter Roeck +Signed-off-by: Guenter Roeck +Signed-off-by: Wim Van Sebroeck +Cc: stable +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/watchdog/f71808e_wdt.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/watchdog/f71808e_wdt.c ++++ b/drivers/watchdog/f71808e_wdt.c +@@ -450,7 +450,7 @@ static bool watchdog_is_running(void) + + is_running = (superio_inb(watchdog.sioaddr, SIO_REG_ENABLE) & BIT(0)) + && (superio_inb(watchdog.sioaddr, F71808FG_REG_WDT_CONF) +- & F71808FG_FLAG_WD_EN); ++ & BIT(F71808FG_FLAG_WD_EN)); + + superio_exit(watchdog.sioaddr); + -- 2.47.3