From af22ffb405a9cf68b858683af5b29ec2fedffaae Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Thu, 18 Aug 2016 14:07:46 +0200 Subject: [PATCH] 3.14-stable patches added patches: drm-i915-dp-revert-drm-i915-dp-fall-back-to-18-bpp-when-sink-capability-is-unknown.patch --- ...-bpp-when-sink-capability-is-unknown.patch | 80 +++++++++++++++++++ queue-3.14/series | 1 + 2 files changed, 81 insertions(+) create mode 100644 queue-3.14/drm-i915-dp-revert-drm-i915-dp-fall-back-to-18-bpp-when-sink-capability-is-unknown.patch diff --git a/queue-3.14/drm-i915-dp-revert-drm-i915-dp-fall-back-to-18-bpp-when-sink-capability-is-unknown.patch b/queue-3.14/drm-i915-dp-revert-drm-i915-dp-fall-back-to-18-bpp-when-sink-capability-is-unknown.patch new file mode 100644 index 00000000000..d9385210bc8 --- /dev/null +++ b/queue-3.14/drm-i915-dp-revert-drm-i915-dp-fall-back-to-18-bpp-when-sink-capability-is-unknown.patch @@ -0,0 +1,80 @@ +From 196f954e250943df414efd3d632254c29be38e59 Mon Sep 17 00:00:00 2001 +From: Mario Kleiner +Date: Wed, 6 Jul 2016 12:05:45 +0200 +Subject: drm/i915/dp: Revert "drm/i915/dp: fall back to 18 bpp when sink capability is unknown" +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Mario Kleiner + +commit 196f954e250943df414efd3d632254c29be38e59 upstream. + +This reverts commit 013dd9e03872 +("drm/i915/dp: fall back to 18 bpp when sink capability is unknown") + +This commit introduced a regression into stable kernels, +as it reduces output color depth to 6 bpc for any video +sink connected to a Displayport connector if that sink +doesn't report a specific color depth via EDID, or if +our EDID parser doesn't actually recognize the proper +bpc from EDID. + +Affected are active DisplayPort->VGA converters and +active DisplayPort->DVI converters. Both should be +able to handle 8 bpc, but are degraded to 6 bpc with +this patch. + +The reverted commit was meant to fix +Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=105331 + +A followup patch implements a fix for that specific bug, +which is caused by a faulty EDID of the affected DP panel +by adding a new EDID quirk for that panel. + +DP 18 bpp fallback handling and other improvements to +DP sink bpc detection will be handled for future +kernels in a separate series of patches. + +Please backport to stable. + +Signed-off-by: Mario Kleiner +Acked-by: Jani Nikula +Cc: Ville Syrjälä +Cc: Daniel Vetter +Signed-off-by: Dave Airlie +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_display.c | 20 +++++--------------- + 1 file changed, 5 insertions(+), 15 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -8841,21 +8841,11 @@ connected_sink_compute_bpp(struct intel_ + pipe_config->pipe_bpp = connector->base.display_info.bpc*3; + } + +- /* Clamp bpp to default limit on screens without EDID 1.4 */ +- if (connector->base.display_info.bpc == 0) { +- int type = connector->base.connector_type; +- int clamp_bpp = 24; +- +- /* Fall back to 18 bpp when DP sink capability is unknown. */ +- if (type == DRM_MODE_CONNECTOR_DisplayPort || +- type == DRM_MODE_CONNECTOR_eDP) +- clamp_bpp = 18; +- +- if (bpp > clamp_bpp) { +- DRM_DEBUG_KMS("clamping display bpp (was %d) to default limit of %d\n", +- bpp, clamp_bpp); +- pipe_config->pipe_bpp = clamp_bpp; +- } ++ /* Clamp bpp to 8 on screens without EDID 1.4 */ ++ if (connector->base.display_info.bpc == 0 && bpp > 24) { ++ DRM_DEBUG_KMS("clamping display bpp (was %d) to default limit of 24\n", ++ bpp); ++ pipe_config->pipe_bpp = 24; + } + } + diff --git a/queue-3.14/series b/queue-3.14/series index 954f37c92b7..d0878c860e2 100644 --- a/queue-3.14/series +++ b/queue-3.14/series @@ -26,3 +26,4 @@ drm-radeon-add-a-delay-after-atpx-dgpu-power-off.patch drm-radeon-poll-for-both-connect-disconnect-on-analog-connectors.patch drm-radeon-fix-firmware-info-version-checks.patch drm-radeon-support-backlight-control-for-uniphy3.patch +drm-i915-dp-revert-drm-i915-dp-fall-back-to-18-bpp-when-sink-capability-is-unknown.patch -- 2.47.2