From b4765fea4d0a584221c9cce029347d283662ed8c Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Mon, 23 Apr 2012 10:13:43 -0700 Subject: [PATCH] 3.0-stable patches added patches: alsa-hda-conexant-don-t-set-hp-pin-control-bit.patch arm-clps711x-serial-driver-hungs-are-a-result-of-call-disable_irq-within-isr.patch crypto-sha512-fix-byte-counter-overflow-in-sha-512.patch hwmon-fam15h_power-fix-bogus-values-with-current-bioses.patch --- ...onexant-don-t-set-hp-pin-control-bit.patch | 40 +++++++++ ...esult-of-call-disable_irq-within-isr.patch | 50 +++++++++++ ...fix-byte-counter-overflow-in-sha-512.patch | 34 +++++++ ...fix-bogus-values-with-current-bioses.patch | 90 +++++++++++++++++++ queue-3.0/series | 4 + 5 files changed, 218 insertions(+) create mode 100644 queue-3.0/alsa-hda-conexant-don-t-set-hp-pin-control-bit.patch create mode 100644 queue-3.0/arm-clps711x-serial-driver-hungs-are-a-result-of-call-disable_irq-within-isr.patch create mode 100644 queue-3.0/crypto-sha512-fix-byte-counter-overflow-in-sha-512.patch create mode 100644 queue-3.0/hwmon-fam15h_power-fix-bogus-values-with-current-bioses.patch diff --git a/queue-3.0/alsa-hda-conexant-don-t-set-hp-pin-control-bit.patch b/queue-3.0/alsa-hda-conexant-don-t-set-hp-pin-control-bit.patch new file mode 100644 index 00000000000..cea243dac84 --- /dev/null +++ b/queue-3.0/alsa-hda-conexant-don-t-set-hp-pin-control-bit.patch @@ -0,0 +1,40 @@ +From ca3649de026ff95c6f2847e8d096cf2f411c02b3 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Thu, 19 Apr 2012 15:15:25 +0200 +Subject: ALSA: hda/conexant - Don't set HP pin-control bit unconditionally + +From: Takashi Iwai + +commit ca3649de026ff95c6f2847e8d096cf2f411c02b3 upstream. + +Some output pins on Conexant chips have no HP control bit, but the +auto-parser initializes these pins unconditionally with PIN_HP. + +Check the pin-capability and avoid the HP bit if not supported. + +Signed-off-by: Takashi Iwai +Signed-off-by: Greg Kroah-Hartman + +--- + sound/pci/hda/patch_conexant.c | 9 +++++++-- + 1 file changed, 7 insertions(+), 2 deletions(-) + +--- a/sound/pci/hda/patch_conexant.c ++++ b/sound/pci/hda/patch_conexant.c +@@ -4003,9 +4003,14 @@ static void cx_auto_init_output(struct h + int i; + + mute_outputs(codec, spec->multiout.num_dacs, spec->multiout.dac_nids); +- for (i = 0; i < cfg->hp_outs; i++) ++ for (i = 0; i < cfg->hp_outs; i++) { ++ unsigned int val = PIN_OUT; ++ if (snd_hda_query_pin_caps(codec, cfg->hp_pins[i]) & ++ AC_PINCAP_HP_DRV) ++ val |= AC_PINCTL_HP_EN; + snd_hda_codec_write(codec, cfg->hp_pins[i], 0, +- AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP); ++ AC_VERB_SET_PIN_WIDGET_CONTROL, val); ++ } + mute_outputs(codec, cfg->hp_outs, cfg->hp_pins); + mute_outputs(codec, cfg->line_outs, cfg->line_out_pins); + mute_outputs(codec, cfg->speaker_outs, cfg->speaker_pins); diff --git a/queue-3.0/arm-clps711x-serial-driver-hungs-are-a-result-of-call-disable_irq-within-isr.patch b/queue-3.0/arm-clps711x-serial-driver-hungs-are-a-result-of-call-disable_irq-within-isr.patch new file mode 100644 index 00000000000..0f7bcffa28a --- /dev/null +++ b/queue-3.0/arm-clps711x-serial-driver-hungs-are-a-result-of-call-disable_irq-within-isr.patch @@ -0,0 +1,50 @@ +From 7a6fbc9a887193a1e9f8658703881c528040afbc Mon Sep 17 00:00:00 2001 +From: Alexander Shiyan +Date: Tue, 27 Mar 2012 12:22:49 +0400 +Subject: ARM: clps711x: serial driver hungs are a result of call disable_irq within ISR + +From: Alexander Shiyan + +commit 7a6fbc9a887193a1e9f8658703881c528040afbc upstream. + +Since 2.6.30-rc1 clps711x serial driver hungs system. This is a result +of call disable_irq from ISR. synchronize_irq waits for end of interrupt +and goes to infinite loop. This patch fix this problem. + +Signed-off-by: Alexander Shiyan +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/tty/serial/clps711x.c | 14 ++++++++------ + 1 file changed, 8 insertions(+), 6 deletions(-) + +--- a/drivers/tty/serial/clps711x.c ++++ b/drivers/tty/serial/clps711x.c +@@ -154,10 +154,9 @@ static irqreturn_t clps711xuart_int_tx(i + port->x_char = 0; + return IRQ_HANDLED; + } +- if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { +- clps711xuart_stop_tx(port); +- return IRQ_HANDLED; +- } ++ ++ if (uart_circ_empty(xmit) || uart_tx_stopped(port)) ++ goto disable_tx_irq; + + count = port->fifosize >> 1; + do { +@@ -171,8 +170,11 @@ static irqreturn_t clps711xuart_int_tx(i + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) + uart_write_wakeup(port); + +- if (uart_circ_empty(xmit)) +- clps711xuart_stop_tx(port); ++ if (uart_circ_empty(xmit)) { ++ disable_tx_irq: ++ disable_irq_nosync(TX_IRQ(port)); ++ tx_enabled(port) = 0; ++ } + + return IRQ_HANDLED; + } diff --git a/queue-3.0/crypto-sha512-fix-byte-counter-overflow-in-sha-512.patch b/queue-3.0/crypto-sha512-fix-byte-counter-overflow-in-sha-512.patch new file mode 100644 index 00000000000..bf5df776cdc --- /dev/null +++ b/queue-3.0/crypto-sha512-fix-byte-counter-overflow-in-sha-512.patch @@ -0,0 +1,34 @@ +From 25c3d30c918207556ae1d6e663150ebdf902186b Mon Sep 17 00:00:00 2001 +From: Kent Yoder +Date: Thu, 5 Apr 2012 20:34:20 +0800 +Subject: crypto: sha512 - Fix byte counter overflow in SHA-512 + +From: Kent Yoder + +commit 25c3d30c918207556ae1d6e663150ebdf902186b upstream. + +The current code only increments the upper 64 bits of the SHA-512 byte +counter when the number of bytes hashed happens to hit 2^64 exactly. + +This patch increments the upper 64 bits whenever the lower 64 bits +overflows. + +Signed-off-by: Kent Yoder +Signed-off-by: Herbert Xu +Signed-off-by: Greg Kroah-Hartman + +--- + crypto/sha512_generic.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/crypto/sha512_generic.c ++++ b/crypto/sha512_generic.c +@@ -174,7 +174,7 @@ sha512_update(struct shash_desc *desc, c + index = sctx->count[0] & 0x7f; + + /* Update number of bytes */ +- if (!(sctx->count[0] += len)) ++ if ((sctx->count[0] += len) < len) + sctx->count[1]++; + + part_len = 128 - index; diff --git a/queue-3.0/hwmon-fam15h_power-fix-bogus-values-with-current-bioses.patch b/queue-3.0/hwmon-fam15h_power-fix-bogus-values-with-current-bioses.patch new file mode 100644 index 00000000000..589bb50b1fd --- /dev/null +++ b/queue-3.0/hwmon-fam15h_power-fix-bogus-values-with-current-bioses.patch @@ -0,0 +1,90 @@ +From 00250ec90963b7ef6678438888f3244985ecde14 Mon Sep 17 00:00:00 2001 +From: Andre Przywara +Date: Mon, 9 Apr 2012 18:16:34 -0400 +Subject: hwmon: fam15h_power: fix bogus values with current BIOSes + +From: Andre Przywara + +commit 00250ec90963b7ef6678438888f3244985ecde14 upstream. + +Newer BKDG[1] versions recommend a different initialization value for +the running average range register in the northbridge. This improves +the power reading by avoiding counter saturations resulting in bogus +values for anything below about 80% of TDP power consumption. +Updated BIOSes will have this new value set up from the beginning, +but meanwhile we correct this value ourselves. +This needs to be done on all northbridges, even on those where the +driver itself does not register at. + +This fixes the driver on all current machines to provide proper +values for idle load. + +[1] +http://support.amd.com/us/Processor_TechDocs/42301_15h_Mod_00h-0Fh_BKDG.pdf +Chapter 3.8: D18F5xE0 Processor TDP Running Average (p. 452) + +Signed-off-by: Andre Przywara +Acked-by: Jean Delvare +[guenter.roeck@ericsson.com: Removed unnecessary return statement] +Signed-off-by: Guenter Roeck +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/hwmon/fam15h_power.c | 39 +++++++++++++++++++++++++++++++++++++++ + 1 file changed, 39 insertions(+) + +--- a/drivers/hwmon/fam15h_power.c ++++ b/drivers/hwmon/fam15h_power.c +@@ -122,6 +122,38 @@ static bool __devinit fam15h_power_is_in + return true; + } + ++/* ++ * Newer BKDG versions have an updated recommendation on how to properly ++ * initialize the running average range (was: 0xE, now: 0x9). This avoids ++ * counter saturations resulting in bogus power readings. ++ * We correct this value ourselves to cope with older BIOSes. ++ */ ++static void __devinit tweak_runavg_range(struct pci_dev *pdev) ++{ ++ u32 val; ++ const struct pci_device_id affected_device = { ++ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) }; ++ ++ /* ++ * let this quirk apply only to the current version of the ++ * northbridge, since future versions may change the behavior ++ */ ++ if (!pci_match_id(&affected_device, pdev)) ++ return; ++ ++ pci_bus_read_config_dword(pdev->bus, ++ PCI_DEVFN(PCI_SLOT(pdev->devfn), 5), ++ REG_TDP_RUNNING_AVERAGE, &val); ++ if ((val & 0xf) != 0xe) ++ return; ++ ++ val &= ~0xf; ++ val |= 0x9; ++ pci_bus_write_config_dword(pdev->bus, ++ PCI_DEVFN(PCI_SLOT(pdev->devfn), 5), ++ REG_TDP_RUNNING_AVERAGE, val); ++} ++ + static void __devinit fam15h_power_init_data(struct pci_dev *f4, + struct fam15h_power_data *data) + { +@@ -155,6 +187,13 @@ static int __devinit fam15h_power_probe( + struct device *dev; + int err; + ++ /* ++ * though we ignore every other northbridge, we still have to ++ * do the tweaking on _each_ node in MCM processors as the counters ++ * are working hand-in-hand ++ */ ++ tweak_runavg_range(pdev); ++ + if (!fam15h_power_is_internal_node0(pdev)) { + err = -ENODEV; + goto exit; diff --git a/queue-3.0/series b/queue-3.0/series index 4c03d30eab1..999ecd934d0 100644 --- a/queue-3.0/series +++ b/queue-3.0/series @@ -1 +1,5 @@ perf-fix-build-breakage.patch +crypto-sha512-fix-byte-counter-overflow-in-sha-512.patch +hwmon-fam15h_power-fix-bogus-values-with-current-bioses.patch +alsa-hda-conexant-don-t-set-hp-pin-control-bit.patch +arm-clps711x-serial-driver-hungs-are-a-result-of-call-disable_irq-within-isr.patch -- 2.47.3