From b696aeab6ad6abe3b45fac96264a40a555ff64ce Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Sun, 27 May 2012 18:34:50 +0400 Subject: [PATCH] target-xtensa: update EXCVADDR in case of page table lookup According to ISA, 4.4.2.6, EXCVADDR may be changed by any TLB miss, even if the miss is handled entirely by processor hardware. Signed-off-by: Max Filippov Signed-off-by: Blue Swirl (cherry picked from commit 39e7d37f0f25823c00d1105e8eb9b61182fd349c) Signed-off-by: Michael Roth --- target-xtensa/helper.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c index 20942278433..43a6611e623 100644 --- a/target-xtensa/helper.c +++ b/target-xtensa/helper.c @@ -516,6 +516,7 @@ static int autorefill_mmu(CPUXtensaState *env, uint32_t vaddr, bool dtlb, *wi = (++env->autorefill_idx) & 0x3; split_tlb_entry_spec_way(env, vaddr, dtlb, &vpn, *wi, ei); xtensa_tlb_set_entry(env, dtlb, *wi, *ei, vpn, pte); + env->sregs[EXCVADDR] = vaddr; qemu_log("%s: autorefill(%08x): %08x -> %08x\n", __func__, vaddr, vpn, pte); } -- 2.39.5