From b9770d3a7401bf1589ca5b2a5aa039091e7ced9f Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Fri, 6 Jan 2017 15:27:42 +0100 Subject: [PATCH] 4.8-stable patches added patches: acpi-video-add-force_native-quirk-for-dell-xps-17-l702x.patch acpi-video-add-force_native-quirk-for-hp-pavilion-dv6.patch docs-sphinx-extensions-make-rstflattable-work-with-docutils-0.13.patch drivers-gpu-drm-ast-fix-infinite-loop-if-read-fails.patch drm-amd-amdgpu-enable-gui-idle-int-after-enabling-cgcg.patch drm-amdgpu-fix-init-save-restore-list-in-gfx_v8.0.patch drm-gma500-add-compat-ioctl.patch drm-nouveau-bios-require-checksum-to-match-for-fast-acpi-shadow-method.patch drm-nouveau-fifo-gf100-protect-channel-preempt-with-subdev-mutex.patch drm-nouveau-gr-fallback-to-legacy-paths-during-firmware-lookup.patch drm-nouveau-i2c-gk110b-gm10x-use-the-correct-implementation.patch drm-nouveau-kms-lvds-panel-strap-moved-again-on-maxwell.patch drm-nouveau-ltc-protect-clearing-of-comptags-with-mutex.patch drm-nouveau-ttm-wait-for-bo-fence-to-signal-before-unmapping-vmas.patch drm-radeon-add-additional-pci-revision-to-dpm-workaround.patch drm-radeon-also-call-cursor_move_locked-when-the-cursor-size-changes.patch drm-radeon-hide-the-hw-cursor-while-it-s-out-of-bounds.patch drm-radeon-si-load-the-proper-firmware-on-0x87-oland-boards.patch hv-acquire-vmbus_connection.channel_mutex-in-vmbus_free_channels.patch staging-comedi-ni_mio_common-fix-e-series-ni_ai_insn_read-data.patch staging-comedi-ni_mio_common-fix-m-series-ni_ai_insn_read-data-mask.patch --- ...e_native-quirk-for-dell-xps-17-l702x.patch | 45 +++++ ...rce_native-quirk-for-hp-pavilion-dv6.patch | 50 ++++++ ...rstflattable-work-with-docutils-0.13.patch | 41 +++++ ...-ast-fix-infinite-loop-if-read-fails.patch | 50 ++++++ ...ble-gui-idle-int-after-enabling-cgcg.patch | 78 +++++++++ ...x-init-save-restore-list-in-gfx_v8.0.patch | 37 ++++ queue-4.8/drm-gma500-add-compat-ioctl.patch | 34 ++++ ...to-match-for-fast-acpi-shadow-method.patch | 55 ++++++ ...ct-channel-preempt-with-subdev-mutex.patch | 76 ++++++++ ...-legacy-paths-during-firmware-lookup.patch | 92 ++++++++++ ...gm10x-use-the-correct-implementation.patch | 50 ++++++ ...s-panel-strap-moved-again-on-maxwell.patch | 28 +++ ...tect-clearing-of-comptags-with-mutex.patch | 29 ++++ ...ence-to-signal-before-unmapping-vmas.patch | 36 ++++ ...ional-pci-revision-to-dpm-workaround.patch | 28 +++ ..._locked-when-the-cursor-size-changes.patch | 50 ++++++ ...e-hw-cursor-while-it-s-out-of-bounds.patch | 162 ++++++++++++++++++ ...proper-firmware-on-0x87-oland-boards.patch | 28 +++ ...channel_mutex-in-vmbus_free_channels.patch | 42 +++++ queue-4.8/series | 21 +++ ...on-fix-e-series-ni_ai_insn_read-data.patch | 61 +++++++ ...x-m-series-ni_ai_insn_read-data-mask.patch | 34 ++++ 22 files changed, 1127 insertions(+) create mode 100644 queue-4.8/acpi-video-add-force_native-quirk-for-dell-xps-17-l702x.patch create mode 100644 queue-4.8/acpi-video-add-force_native-quirk-for-hp-pavilion-dv6.patch create mode 100644 queue-4.8/docs-sphinx-extensions-make-rstflattable-work-with-docutils-0.13.patch create mode 100644 queue-4.8/drivers-gpu-drm-ast-fix-infinite-loop-if-read-fails.patch create mode 100644 queue-4.8/drm-amd-amdgpu-enable-gui-idle-int-after-enabling-cgcg.patch create mode 100644 queue-4.8/drm-amdgpu-fix-init-save-restore-list-in-gfx_v8.0.patch create mode 100644 queue-4.8/drm-gma500-add-compat-ioctl.patch create mode 100644 queue-4.8/drm-nouveau-bios-require-checksum-to-match-for-fast-acpi-shadow-method.patch create mode 100644 queue-4.8/drm-nouveau-fifo-gf100-protect-channel-preempt-with-subdev-mutex.patch create mode 100644 queue-4.8/drm-nouveau-gr-fallback-to-legacy-paths-during-firmware-lookup.patch create mode 100644 queue-4.8/drm-nouveau-i2c-gk110b-gm10x-use-the-correct-implementation.patch create mode 100644 queue-4.8/drm-nouveau-kms-lvds-panel-strap-moved-again-on-maxwell.patch create mode 100644 queue-4.8/drm-nouveau-ltc-protect-clearing-of-comptags-with-mutex.patch create mode 100644 queue-4.8/drm-nouveau-ttm-wait-for-bo-fence-to-signal-before-unmapping-vmas.patch create mode 100644 queue-4.8/drm-radeon-add-additional-pci-revision-to-dpm-workaround.patch create mode 100644 queue-4.8/drm-radeon-also-call-cursor_move_locked-when-the-cursor-size-changes.patch create mode 100644 queue-4.8/drm-radeon-hide-the-hw-cursor-while-it-s-out-of-bounds.patch create mode 100644 queue-4.8/drm-radeon-si-load-the-proper-firmware-on-0x87-oland-boards.patch create mode 100644 queue-4.8/hv-acquire-vmbus_connection.channel_mutex-in-vmbus_free_channels.patch create mode 100644 queue-4.8/staging-comedi-ni_mio_common-fix-e-series-ni_ai_insn_read-data.patch create mode 100644 queue-4.8/staging-comedi-ni_mio_common-fix-m-series-ni_ai_insn_read-data-mask.patch diff --git a/queue-4.8/acpi-video-add-force_native-quirk-for-dell-xps-17-l702x.patch b/queue-4.8/acpi-video-add-force_native-quirk-for-dell-xps-17-l702x.patch new file mode 100644 index 00000000000..fa839a427ce --- /dev/null +++ b/queue-4.8/acpi-video-add-force_native-quirk-for-dell-xps-17-l702x.patch @@ -0,0 +1,45 @@ +From 350fa038c31b056fc509624efb66348ac2c1e3d0 Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Tue, 29 Nov 2016 15:32:15 +0100 +Subject: ACPI / video: Add force_native quirk for Dell XPS 17 L702X + +From: Hans de Goede + +commit 350fa038c31b056fc509624efb66348ac2c1e3d0 upstream. + +The Dell XPS 17 L702X has a non-working acpi_video0 backlight interface +and an intel_backlight interface which works fine. Add a force_native +quirk for it so that the non-working acpi_video0 interface does not get +registered. + +Note that there also is an issue with the brightnesskeys on this laptop, +they do not generate key-press events in anyway. That is not solved by +this patch. + +Link: https://bugzilla.redhat.com/show_bug.cgi?id=1123661 +Signed-off-by: Hans de Goede +Signed-off-by: Rafael J. Wysocki +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/acpi/video_detect.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +--- a/drivers/acpi/video_detect.c ++++ b/drivers/acpi/video_detect.c +@@ -296,6 +296,15 @@ static const struct dmi_system_id video_ + DMI_MATCH(DMI_PRODUCT_NAME, "Vostro V131"), + }, + }, ++ { ++ /* https://bugzilla.redhat.com/show_bug.cgi?id=1123661 */ ++ .callback = video_detect_force_native, ++ .ident = "Dell XPS 17 L702X", ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), ++ DMI_MATCH(DMI_PRODUCT_NAME, "Dell System XPS L702X"), ++ }, ++ }, + { }, + }; + diff --git a/queue-4.8/acpi-video-add-force_native-quirk-for-hp-pavilion-dv6.patch b/queue-4.8/acpi-video-add-force_native-quirk-for-hp-pavilion-dv6.patch new file mode 100644 index 00000000000..cf003a66ea6 --- /dev/null +++ b/queue-4.8/acpi-video-add-force_native-quirk-for-hp-pavilion-dv6.patch @@ -0,0 +1,50 @@ +From 6276e53fa8c06a3a5cf7b95b77b079966de9ad66 Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Tue, 29 Nov 2016 15:32:16 +0100 +Subject: ACPI / video: Add force_native quirk for HP Pavilion dv6 + +From: Hans de Goede + +commit 6276e53fa8c06a3a5cf7b95b77b079966de9ad66 upstream. + +The HP Pavilion dv6 has a non-working acpi_video0 backlight interface +and an intel_backlight interface which works fine. Add a force_native +quirk for it so that the non-working acpi_video0 interface does not get +registered. + +Note that there are quite a few HP Pavilion dv6 variants, some +woth ATI and some with NVIDIA hybrid gfx, both seem to need this +quirk to have working backlight control. There are also some versions +with only Intel integrated gfx, these may not need this quirk, but it +should not hurt there. + +Link: https://bugzilla.redhat.com/show_bug.cgi?id=1204476 +Link: https://bugs.launchpad.net/ubuntu/+source/linux-lts-trusty/+bug/1416940 +Signed-off-by: Hans de Goede +Signed-off-by: Rafael J. Wysocki +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/acpi/video_detect.c | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +--- a/drivers/acpi/video_detect.c ++++ b/drivers/acpi/video_detect.c +@@ -305,6 +305,17 @@ static const struct dmi_system_id video_ + DMI_MATCH(DMI_PRODUCT_NAME, "Dell System XPS L702X"), + }, + }, ++ { ++ /* https://bugzilla.redhat.com/show_bug.cgi?id=1204476 */ ++ /* https://bugs.launchpad.net/ubuntu/+source/linux-lts-trusty/+bug/1416940 */ ++ .callback = video_detect_force_native, ++ .ident = "HP Pavilion dv6", ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), ++ DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv6 Notebook PC"), ++ }, ++ }, ++ + { }, + }; + diff --git a/queue-4.8/docs-sphinx-extensions-make-rstflattable-work-with-docutils-0.13.patch b/queue-4.8/docs-sphinx-extensions-make-rstflattable-work-with-docutils-0.13.patch new file mode 100644 index 00000000000..2dc5b6d464b --- /dev/null +++ b/queue-4.8/docs-sphinx-extensions-make-rstflattable-work-with-docutils-0.13.patch @@ -0,0 +1,41 @@ +From 217e2bfab22e740227df09f22165e834cddd8a3b Mon Sep 17 00:00:00 2001 +From: Dmitry Shachnev +Date: Sun, 18 Dec 2016 13:11:46 +0300 +Subject: docs: sphinx-extensions: make rstFlatTable work with docutils 0.13 + +From: Dmitry Shachnev + +commit 217e2bfab22e740227df09f22165e834cddd8a3b upstream. + +In docutils 0.13, the return type of get_column_widths method of the +Table directive has changed [1], which breaks our flat-table directive +and leads to a TypeError when trying to build the docs [2]. + +This patch adds support for the new return type, while keeping support +for older docutils versions too. + +[1] https://sourceforge.net/p/docutils/patches/120/ +[2] https://sourceforge.net/p/docutils/bugs/303/ + +Signed-off-by: Dmitry Shachnev +Signed-off-by: Jonathan Corbet +Signed-off-by: Greg Kroah-Hartman + +--- + Documentation/sphinx/rstFlatTable.py | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/Documentation/sphinx/rstFlatTable.py ++++ b/Documentation/sphinx/rstFlatTable.py +@@ -151,6 +151,11 @@ class ListTableBuilder(object): + def buildTableNode(self): + + colwidths = self.directive.get_column_widths(self.max_cols) ++ if isinstance(colwidths, tuple): ++ # Since docutils 0.13, get_column_widths returns a (widths, ++ # colwidths) tuple, where widths is a string (i.e. 'auto'). ++ # See https://sourceforge.net/p/docutils/patches/120/. ++ colwidths = colwidths[1] + stub_columns = self.directive.options.get('stub-columns', 0) + header_rows = self.directive.options.get('header-rows', 0) + diff --git a/queue-4.8/drivers-gpu-drm-ast-fix-infinite-loop-if-read-fails.patch b/queue-4.8/drivers-gpu-drm-ast-fix-infinite-loop-if-read-fails.patch new file mode 100644 index 00000000000..4d57de9f9a3 --- /dev/null +++ b/queue-4.8/drivers-gpu-drm-ast-fix-infinite-loop-if-read-fails.patch @@ -0,0 +1,50 @@ +From 298360af3dab45659810fdc51aba0c9f4097e4f6 Mon Sep 17 00:00:00 2001 +From: Russell Currey +Date: Thu, 15 Dec 2016 16:12:41 +1100 +Subject: drivers/gpu/drm/ast: Fix infinite loop if read fails + +From: Russell Currey + +commit 298360af3dab45659810fdc51aba0c9f4097e4f6 upstream. + +ast_get_dram_info() configures a window in order to access BMC memory. +A BMC register can be configured to disallow this, and if so, causes +an infinite loop in the ast driver which renders the system unusable. + +Fix this by erroring out if an error is detected. On powerpc systems with +EEH, this leads to the device being fenced and the system continuing to +operate. + +Signed-off-by: Russell Currey +Reviewed-by: Joel Stanley +Signed-off-by: Daniel Vetter +Link: http://patchwork.freedesktop.org/patch/msgid/20161215051241.20815-1-ruscur@russell.cc +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/ast/ast_main.c | 7 +++++-- + 1 file changed, 5 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/ast/ast_main.c ++++ b/drivers/gpu/drm/ast/ast_main.c +@@ -223,7 +223,8 @@ static int ast_get_dram_info(struct drm_ + ast_write32(ast, 0x10000, 0xfc600309); + + do { +- ; ++ if (pci_channel_offline(dev->pdev)) ++ return -EIO; + } while (ast_read32(ast, 0x10000) != 0x01); + data = ast_read32(ast, 0x10004); + +@@ -428,7 +429,9 @@ int ast_driver_load(struct drm_device *d + ast_detect_chip(dev, &need_post); + + if (ast->chip != AST1180) { +- ast_get_dram_info(dev); ++ ret = ast_get_dram_info(dev); ++ if (ret) ++ goto out_free; + ast->vram_size = ast_get_vram_info(dev); + DRM_INFO("dram %d %d %d %08x\n", ast->mclk, ast->dram_type, ast->dram_bus_width, ast->vram_size); + } diff --git a/queue-4.8/drm-amd-amdgpu-enable-gui-idle-int-after-enabling-cgcg.patch b/queue-4.8/drm-amd-amdgpu-enable-gui-idle-int-after-enabling-cgcg.patch new file mode 100644 index 00000000000..32316f54f2b --- /dev/null +++ b/queue-4.8/drm-amd-amdgpu-enable-gui-idle-int-after-enabling-cgcg.patch @@ -0,0 +1,78 @@ +From dd31ae9ac933636c3712b7dd0f6152c1d71f81fe Mon Sep 17 00:00:00 2001 +From: Arindam Nath +Date: Fri, 25 Nov 2016 16:55:16 +0530 +Subject: drm/amd/amdgpu: enable GUI idle INT after enabling CGCG + +From: Arindam Nath + +commit dd31ae9ac933636c3712b7dd0f6152c1d71f81fe upstream. + +GUI idle interrupts should be enabled only after we +have enabled coarse grain clock gating (CGCG). This +prevents GFX engine generating idle interrupt even +though CGCG is not completely enabled. + +Most of the time this goes un-noticed, but on some +Stoney ASICs this results in GFX engine hang after +system resumes from suspend. The issue is not +particular to Stoney though and could have occured +on any ASIC. The patch fixes this issue. + +Reviewed-by: Alex Deucher +Reported-by: Sunil Uttarwar +Signed-off-by: Arindam Nath +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 18 +++++++++--------- + 1 file changed, 9 insertions(+), 9 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +@@ -5735,29 +5735,24 @@ static void gfx_v8_0_update_coarse_grain + adev->gfx.rlc.funcs->enter_safe_mode(adev); + + if (enable && (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGCG)) { +- /* 1 enable cntx_empty_int_enable/cntx_busy_int_enable/ +- * Cmp_busy/GFX_Idle interrupts +- */ +- gfx_v8_0_enable_gui_idle_interrupt(adev, true); +- + temp1 = data1 = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); + data1 &= ~RLC_CGTT_MGCG_OVERRIDE__CGCG_MASK; + if (temp1 != data1) + WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data1); + +- /* 2 wait for RLC_SERDES_CU_MASTER & RLC_SERDES_NONCU_MASTER idle */ ++ /* : wait for RLC_SERDES_CU_MASTER & RLC_SERDES_NONCU_MASTER idle */ + gfx_v8_0_wait_for_rlc_serdes(adev); + +- /* 3 - clear cgcg override */ ++ /* 2 - clear cgcg override */ + gfx_v8_0_send_serdes_cmd(adev, BPM_REG_CGCG_OVERRIDE, CLE_BPM_SERDES_CMD); + + /* wait for RLC_SERDES_CU_MASTER & RLC_SERDES_NONCU_MASTER idle */ + gfx_v8_0_wait_for_rlc_serdes(adev); + +- /* 4 - write cmd to set CGLS */ ++ /* 3 - write cmd to set CGLS */ + gfx_v8_0_send_serdes_cmd(adev, BPM_REG_CGLS_EN, SET_BPM_SERDES_CMD); + +- /* 5 - enable cgcg */ ++ /* 4 - enable cgcg */ + data |= RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK; + + if (adev->cg_flags & AMD_CG_SUPPORT_GFX_CGLS) { +@@ -5775,6 +5770,11 @@ static void gfx_v8_0_update_coarse_grain + + if (temp != data) + WREG32(mmRLC_CGCG_CGLS_CTRL, data); ++ ++ /* 5 enable cntx_empty_int_enable/cntx_busy_int_enable/ ++ * Cmp_busy/GFX_Idle interrupts ++ */ ++ gfx_v8_0_enable_gui_idle_interrupt(adev, true); + } else { + /* disable cntx_empty_int_enable & GFX Idle interrupt */ + gfx_v8_0_enable_gui_idle_interrupt(adev, false); diff --git a/queue-4.8/drm-amdgpu-fix-init-save-restore-list-in-gfx_v8.0.patch b/queue-4.8/drm-amdgpu-fix-init-save-restore-list-in-gfx_v8.0.patch new file mode 100644 index 00000000000..839461e92d5 --- /dev/null +++ b/queue-4.8/drm-amdgpu-fix-init-save-restore-list-in-gfx_v8.0.patch @@ -0,0 +1,37 @@ +From 202e0b227b906cb80a2791f21216a55d9468d61b Mon Sep 17 00:00:00 2001 +From: Rex Zhu +Date: Wed, 7 Dec 2016 17:44:20 +0800 +Subject: drm/amdgpu: fix init save/restore list in gfx_v8.0 + +From: Rex Zhu + +commit 202e0b227b906cb80a2791f21216a55d9468d61b upstream. + +set valid data to mmRLC_SRM_INDEX_CNTL_ADDRx/DATAx. + +Signed-off-by: Rex Zhu +Reviewed-by: Alex Deucher +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +@@ -3798,8 +3798,12 @@ static int gfx_v8_0_init_save_restore_li + temp = mmRLC_SRM_INDEX_CNTL_ADDR_0; + data = mmRLC_SRM_INDEX_CNTL_DATA_0; + for (i = 0; i < sizeof(unique_indices) / sizeof(int); i++) { +- amdgpu_mm_wreg(adev, temp + i, unique_indices[i] & 0x3FFFF, false); +- amdgpu_mm_wreg(adev, data + i, unique_indices[i] >> 20, false); ++ if (unique_indices[i] != 0) { ++ amdgpu_mm_wreg(adev, temp + i, ++ unique_indices[i] & 0x3FFFF, false); ++ amdgpu_mm_wreg(adev, data + i, ++ unique_indices[i] >> 20, false); ++ } + } + kfree(register_list_format); + diff --git a/queue-4.8/drm-gma500-add-compat-ioctl.patch b/queue-4.8/drm-gma500-add-compat-ioctl.patch new file mode 100644 index 00000000000..adc78497879 --- /dev/null +++ b/queue-4.8/drm-gma500-add-compat-ioctl.patch @@ -0,0 +1,34 @@ +From 0a97c81a9717431e6c57ea845b59c3c345edce67 Mon Sep 17 00:00:00 2001 +From: Patrik Jakobsson +Date: Tue, 1 Nov 2016 15:43:15 +0100 +Subject: drm/gma500: Add compat ioctl + +From: Patrik Jakobsson + +commit 0a97c81a9717431e6c57ea845b59c3c345edce67 upstream. + +Hook up drm_compat_ioctl to support 32-bit userspace on 64-bit kernels. +It turns out that N2600 and N2800 comes with 64-bit enabled. We +previously assumed there where no such systems out there. + +Signed-off-by: Patrik Jakobsson +Signed-off-by: Sean Paul +Link: http://patchwork.freedesktop.org/patch/msgid/20161101144315.2955-1-patrik.r.jakobsson@gmail.com +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/gma500/psb_drv.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/gpu/drm/gma500/psb_drv.c ++++ b/drivers/gpu/drm/gma500/psb_drv.c +@@ -473,6 +473,9 @@ static const struct file_operations psb_ + .open = drm_open, + .release = drm_release, + .unlocked_ioctl = psb_unlocked_ioctl, ++#ifdef CONFIG_COMPAT ++ .compat_ioctl = drm_compat_ioctl, ++#endif + .mmap = drm_gem_mmap, + .poll = drm_poll, + .read = drm_read, diff --git a/queue-4.8/drm-nouveau-bios-require-checksum-to-match-for-fast-acpi-shadow-method.patch b/queue-4.8/drm-nouveau-bios-require-checksum-to-match-for-fast-acpi-shadow-method.patch new file mode 100644 index 00000000000..56fe4c1f786 --- /dev/null +++ b/queue-4.8/drm-nouveau-bios-require-checksum-to-match-for-fast-acpi-shadow-method.patch @@ -0,0 +1,55 @@ +From 5dc7f4aa9d84ea94b54a9bfcef095f0289f1ebda Mon Sep 17 00:00:00 2001 +From: Ben Skeggs +Date: Fri, 14 Oct 2016 13:16:36 +1000 +Subject: drm/nouveau/bios: require checksum to match for fast acpi shadow method + +From: Ben Skeggs + +commit 5dc7f4aa9d84ea94b54a9bfcef095f0289f1ebda upstream. + +Signed-off-by: Ben Skeggs +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/nouveau/nvkm/subdev/bios/priv.h | 1 + + drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadow.c | 7 +++++-- + drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowacpi.c | 1 + + 3 files changed, 7 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/priv.h ++++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/priv.h +@@ -12,6 +12,7 @@ struct nvbios_source { + bool rw; + bool ignore_checksum; + bool no_pcir; ++ bool require_checksum; + }; + + int nvbios_extend(struct nvkm_bios *, u32 length); +--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadow.c ++++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadow.c +@@ -86,9 +86,12 @@ shadow_image(struct nvkm_bios *bios, int + nvbios_checksum(&bios->data[image.base], image.size)) { + nvkm_debug(subdev, "%08x: checksum failed\n", + image.base); +- if (mthd->func->rw) ++ if (!mthd->func->require_checksum) { ++ if (mthd->func->rw) ++ score += 1; + score += 1; +- score += 1; ++ } else ++ return 0; + } else { + score += 3; + } +--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowacpi.c ++++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowacpi.c +@@ -99,6 +99,7 @@ nvbios_acpi_fast = { + .init = acpi_init, + .read = acpi_read_fast, + .rw = false, ++ .require_checksum = true, + }; + + const struct nvbios_source diff --git a/queue-4.8/drm-nouveau-fifo-gf100-protect-channel-preempt-with-subdev-mutex.patch b/queue-4.8/drm-nouveau-fifo-gf100-protect-channel-preempt-with-subdev-mutex.patch new file mode 100644 index 00000000000..dd89c89e775 --- /dev/null +++ b/queue-4.8/drm-nouveau-fifo-gf100-protect-channel-preempt-with-subdev-mutex.patch @@ -0,0 +1,76 @@ +From b27add13f500469127afdf011dbcc9c649e16e54 Mon Sep 17 00:00:00 2001 +From: Ben Skeggs +Date: Sat, 5 Nov 2016 14:33:14 +1000 +Subject: drm/nouveau/fifo/gf100-: protect channel preempt with subdev mutex + +From: Ben Skeggs + +commit b27add13f500469127afdf011dbcc9c649e16e54 upstream. + +This avoids an issue that occurs when we're attempting to preempt multiple +channels simultaneously. HW seems to ignore preempt requests while it's +still processing a previous one, which, well, makes sense. + +Fixes random "fifo: SCHED_ERROR 0d []" + GPCCS page faults during parallel +piglit runs on (at least) GM107. + +Signed-off-by: Ben Skeggs +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c | 9 ++++++--- + drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c | 8 +++++--- + 2 files changed, 11 insertions(+), 6 deletions(-) + +--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c ++++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c +@@ -60,6 +60,7 @@ gf100_fifo_gpfifo_engine_fini(struct nvk + struct nvkm_gpuobj *inst = chan->base.inst; + int ret = 0; + ++ mutex_lock(&subdev->mutex); + nvkm_wr32(device, 0x002634, chan->base.chid); + if (nvkm_msec(device, 2000, + if (nvkm_rd32(device, 0x002634) == chan->base.chid) +@@ -67,10 +68,12 @@ gf100_fifo_gpfifo_engine_fini(struct nvk + ) < 0) { + nvkm_error(subdev, "channel %d [%s] kick timeout\n", + chan->base.chid, chan->base.object.client->name); +- ret = -EBUSY; +- if (suspend) +- return ret; ++ ret = -ETIMEDOUT; + } ++ mutex_unlock(&subdev->mutex); ++ ++ if (ret && suspend) ++ return ret; + + if (offset) { + nvkm_kmap(inst); +--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c ++++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c +@@ -40,7 +40,9 @@ gk104_fifo_gpfifo_kick(struct gk104_fifo + struct nvkm_subdev *subdev = &fifo->base.engine.subdev; + struct nvkm_device *device = subdev->device; + struct nvkm_client *client = chan->base.object.client; ++ int ret = 0; + ++ mutex_lock(&subdev->mutex); + nvkm_wr32(device, 0x002634, chan->base.chid); + if (nvkm_msec(device, 2000, + if (!(nvkm_rd32(device, 0x002634) & 0x00100000)) +@@ -48,10 +50,10 @@ gk104_fifo_gpfifo_kick(struct gk104_fifo + ) < 0) { + nvkm_error(subdev, "channel %d [%s] kick timeout\n", + chan->base.chid, client->name); +- return -EBUSY; ++ ret = -ETIMEDOUT; + } +- +- return 0; ++ mutex_unlock(&subdev->mutex); ++ return ret; + } + + static u32 diff --git a/queue-4.8/drm-nouveau-gr-fallback-to-legacy-paths-during-firmware-lookup.patch b/queue-4.8/drm-nouveau-gr-fallback-to-legacy-paths-during-firmware-lookup.patch new file mode 100644 index 00000000000..d10daff15be --- /dev/null +++ b/queue-4.8/drm-nouveau-gr-fallback-to-legacy-paths-during-firmware-lookup.patch @@ -0,0 +1,92 @@ +From e137040e0d0376b404fc5155eba44ea07126e3bd Mon Sep 17 00:00:00 2001 +From: Alexandre Courbot +Date: Fri, 4 Nov 2016 18:36:17 +0900 +Subject: drm/nouveau/gr: fallback to legacy paths during firmware lookup + +From: Alexandre Courbot + +commit e137040e0d0376b404fc5155eba44ea07126e3bd upstream. + +Look for firmware files using the legacy ("nouveau/nvxx_fucxxxx") path +if they cannot be found in the new, "official" path. User setups were +broken by the switch, which is bad. + +There are only 4 firmware files we may want to look up that way, so +hardcode them into the lookup function. All new firmware files should +use the standard "nvidia//gr/" path. + +Fixes: 8539b37acef7 ("drm/nouveau/gr: use NVIDIA-provided external firmwares") +Signed-off-by: Alexandre Courbot +Signed-off-by: Ben Skeggs +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c | 50 +++++++++++++++++++++++-- + 1 file changed, 46 insertions(+), 4 deletions(-) + +--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c ++++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c +@@ -1756,6 +1756,50 @@ gf100_gr_ = { + }; + + int ++gf100_gr_ctor_fw_legacy(struct gf100_gr *gr, const char *fwname, ++ struct gf100_gr_fuc *fuc, int ret) ++{ ++ struct nvkm_subdev *subdev = &gr->base.engine.subdev; ++ struct nvkm_device *device = subdev->device; ++ const struct firmware *fw; ++ char f[32]; ++ ++ /* see if this firmware has a legacy path */ ++ if (!strcmp(fwname, "fecs_inst")) ++ fwname = "fuc409c"; ++ else if (!strcmp(fwname, "fecs_data")) ++ fwname = "fuc409d"; ++ else if (!strcmp(fwname, "gpccs_inst")) ++ fwname = "fuc41ac"; ++ else if (!strcmp(fwname, "gpccs_data")) ++ fwname = "fuc41ad"; ++ else { ++ /* nope, let's just return the error we got */ ++ nvkm_error(subdev, "failed to load %s\n", fwname); ++ return ret; ++ } ++ ++ /* yes, try to load from the legacy path */ ++ nvkm_debug(subdev, "%s: falling back to legacy path\n", fwname); ++ ++ snprintf(f, sizeof(f), "nouveau/nv%02x_%s", device->chipset, fwname); ++ ret = request_firmware(&fw, f, device->dev); ++ if (ret) { ++ snprintf(f, sizeof(f), "nouveau/%s", fwname); ++ ret = request_firmware(&fw, f, device->dev); ++ if (ret) { ++ nvkm_error(subdev, "failed to load %s\n", fwname); ++ return ret; ++ } ++ } ++ ++ fuc->size = fw->size; ++ fuc->data = kmemdup(fw->data, fuc->size, GFP_KERNEL); ++ release_firmware(fw); ++ return (fuc->data != NULL) ? 0 : -ENOMEM; ++} ++ ++int + gf100_gr_ctor_fw(struct gf100_gr *gr, const char *fwname, + struct gf100_gr_fuc *fuc) + { +@@ -1765,10 +1809,8 @@ gf100_gr_ctor_fw(struct gf100_gr *gr, co + int ret; + + ret = nvkm_firmware_get(device, fwname, &fw); +- if (ret) { +- nvkm_error(subdev, "failed to load %s\n", fwname); +- return ret; +- } ++ if (ret) ++ return gf100_gr_ctor_fw_legacy(gr, fwname, fuc, ret); + + fuc->size = fw->size; + fuc->data = kmemdup(fw->data, fuc->size, GFP_KERNEL); diff --git a/queue-4.8/drm-nouveau-i2c-gk110b-gm10x-use-the-correct-implementation.patch b/queue-4.8/drm-nouveau-i2c-gk110b-gm10x-use-the-correct-implementation.patch new file mode 100644 index 00000000000..351dca25827 --- /dev/null +++ b/queue-4.8/drm-nouveau-i2c-gk110b-gm10x-use-the-correct-implementation.patch @@ -0,0 +1,50 @@ +From 5b3800a6b763874e4a23702fb9628d3bd3315ce9 Mon Sep 17 00:00:00 2001 +From: Ben Skeggs +Date: Thu, 3 Nov 2016 16:37:33 +1000 +Subject: drm/nouveau/i2c/gk110b,gm10x: use the correct implementation + +From: Ben Skeggs + +commit 5b3800a6b763874e4a23702fb9628d3bd3315ce9 upstream. + +DPAUX registers moved on Kepler, these chipsets were still using the +Fermi implementation for some reason. + +This fixes detection of hotplug/sink IRQs on DP connectors. + +Signed-off-by: Ben Skeggs +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/nouveau/nvkm/engine/device/base.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c ++++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +@@ -1851,7 +1851,7 @@ nvf1_chipset = { + .fb = gk104_fb_new, + .fuse = gf100_fuse_new, + .gpio = gk104_gpio_new, +- .i2c = gf119_i2c_new, ++ .i2c = gk104_i2c_new, + .ibus = gk104_ibus_new, + .iccsense = gf100_iccsense_new, + .imem = nv50_instmem_new, +@@ -1965,7 +1965,7 @@ nv117_chipset = { + .fb = gm107_fb_new, + .fuse = gm107_fuse_new, + .gpio = gk104_gpio_new, +- .i2c = gf119_i2c_new, ++ .i2c = gk104_i2c_new, + .ibus = gk104_ibus_new, + .iccsense = gf100_iccsense_new, + .imem = nv50_instmem_new, +@@ -1999,7 +1999,7 @@ nv118_chipset = { + .fb = gm107_fb_new, + .fuse = gm107_fuse_new, + .gpio = gk104_gpio_new, +- .i2c = gf119_i2c_new, ++ .i2c = gk104_i2c_new, + .ibus = gk104_ibus_new, + .iccsense = gf100_iccsense_new, + .imem = nv50_instmem_new, diff --git a/queue-4.8/drm-nouveau-kms-lvds-panel-strap-moved-again-on-maxwell.patch b/queue-4.8/drm-nouveau-kms-lvds-panel-strap-moved-again-on-maxwell.patch new file mode 100644 index 00000000000..05db0758581 --- /dev/null +++ b/queue-4.8/drm-nouveau-kms-lvds-panel-strap-moved-again-on-maxwell.patch @@ -0,0 +1,28 @@ +From 768e847759d551c96e129e194588dbfb11a1d576 Mon Sep 17 00:00:00 2001 +From: Ben Skeggs +Date: Wed, 19 Oct 2016 12:15:52 +1000 +Subject: drm/nouveau/kms: lvds panel strap moved again on maxwell + +From: Ben Skeggs + +commit 768e847759d551c96e129e194588dbfb11a1d576 upstream. + +Signed-off-by: Ben Skeggs +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/nouveau/nouveau_bios.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/gpu/drm/nouveau/nouveau_bios.c ++++ b/drivers/gpu/drm/nouveau/nouveau_bios.c +@@ -333,6 +333,9 @@ get_fp_strap(struct drm_device *dev, str + if (bios->major_version < 5 && bios->data[0x48] & 0x4) + return NVReadVgaCrtc5758(dev, 0, 0xf) & 0xf; + ++ if (drm->device.info.family >= NV_DEVICE_INFO_V0_MAXWELL) ++ return nvif_rd32(device, 0x001800) & 0x0000000f; ++ else + if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) + return (nvif_rd32(device, NV_PEXTDEV_BOOT_0) >> 24) & 0xf; + else diff --git a/queue-4.8/drm-nouveau-ltc-protect-clearing-of-comptags-with-mutex.patch b/queue-4.8/drm-nouveau-ltc-protect-clearing-of-comptags-with-mutex.patch new file mode 100644 index 00000000000..42e35a25ad0 --- /dev/null +++ b/queue-4.8/drm-nouveau-ltc-protect-clearing-of-comptags-with-mutex.patch @@ -0,0 +1,29 @@ +From f4e65efc88b64c1dbca275d42a188edccedb56c6 Mon Sep 17 00:00:00 2001 +From: Ben Skeggs +Date: Tue, 13 Dec 2016 09:29:55 +1000 +Subject: drm/nouveau/ltc: protect clearing of comptags with mutex + +From: Ben Skeggs + +commit f4e65efc88b64c1dbca275d42a188edccedb56c6 upstream. + +Signed-off-by: Ben Skeggs +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/nouveau/nvkm/subdev/ltc/base.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/base.c ++++ b/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/base.c +@@ -47,8 +47,10 @@ nvkm_ltc_tags_clear(struct nvkm_ltc *ltc + + BUG_ON((first > limit) || (limit >= ltc->num_tags)); + ++ mutex_lock(<c->subdev.mutex); + ltc->func->cbc_clear(ltc, first, limit); + ltc->func->cbc_wait(ltc); ++ mutex_unlock(<c->subdev.mutex); + } + + int diff --git a/queue-4.8/drm-nouveau-ttm-wait-for-bo-fence-to-signal-before-unmapping-vmas.patch b/queue-4.8/drm-nouveau-ttm-wait-for-bo-fence-to-signal-before-unmapping-vmas.patch new file mode 100644 index 00000000000..7297b1711ca --- /dev/null +++ b/queue-4.8/drm-nouveau-ttm-wait-for-bo-fence-to-signal-before-unmapping-vmas.patch @@ -0,0 +1,36 @@ +From 10dcab3e7f477bffee88d518aad57d06777cfdf4 Mon Sep 17 00:00:00 2001 +From: Ben Skeggs +Date: Mon, 12 Dec 2016 17:52:45 +1000 +Subject: drm/nouveau/ttm: wait for bo fence to signal before unmapping vmas + +From: Ben Skeggs + +commit 10dcab3e7f477bffee88d518aad57d06777cfdf4 upstream. + +TTM was changed a while back to allow for pipelining of buffer moves, and +part of this was the removal of waiting for a BO to idle before calling +move(), placing the responsibility on the driver to do this if required. + +That's all well and good, except, we make use of move_notify() to handle +mapping/unmapping from the GPU VMM as move() isn't called on all paths. + +This commit adds a wait before unmapping from a VMM in move_notify(), to +prevent GPU page faults where a buffer is still being accessed. + +Signed-off-by: Ben Skeggs +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/nouveau/nouveau_bo.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/gpu/drm/nouveau/nouveau_bo.c ++++ b/drivers/gpu/drm/nouveau/nouveau_bo.c +@@ -1209,6 +1209,7 @@ nouveau_bo_move_ntfy(struct ttm_buffer_o + nvbo->page_shift != vma->vm->mmu->lpg_shift)) { + nvkm_vm_map(vma, new_mem->mm_node); + } else { ++ WARN_ON(ttm_bo_wait(bo, false, false)); + nvkm_vm_unmap(vma); + } + } diff --git a/queue-4.8/drm-radeon-add-additional-pci-revision-to-dpm-workaround.patch b/queue-4.8/drm-radeon-add-additional-pci-revision-to-dpm-workaround.patch new file mode 100644 index 00000000000..c065204bbf9 --- /dev/null +++ b/queue-4.8/drm-radeon-add-additional-pci-revision-to-dpm-workaround.patch @@ -0,0 +1,28 @@ +From 8729675c00a8d13cb2094d617d70a4a4da7d83c5 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Fri, 2 Dec 2016 00:21:48 -0500 +Subject: drm/radeon: add additional pci revision to dpm workaround + +From: Alex Deucher + +commit 8729675c00a8d13cb2094d617d70a4a4da7d83c5 upstream. + +New variant. + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/si_dpm.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/gpu/drm/radeon/si_dpm.c ++++ b/drivers/gpu/drm/radeon/si_dpm.c +@@ -3026,6 +3026,7 @@ static void si_apply_state_adjust_rules( + (rdev->pdev->revision == 0x80) || + (rdev->pdev->revision == 0x81) || + (rdev->pdev->revision == 0x83) || ++ (rdev->pdev->revision == 0x87) || + (rdev->pdev->device == 0x6604) || + (rdev->pdev->device == 0x6605)) { + max_sclk = 75000; diff --git a/queue-4.8/drm-radeon-also-call-cursor_move_locked-when-the-cursor-size-changes.patch b/queue-4.8/drm-radeon-also-call-cursor_move_locked-when-the-cursor-size-changes.patch new file mode 100644 index 00000000000..2d456920176 --- /dev/null +++ b/queue-4.8/drm-radeon-also-call-cursor_move_locked-when-the-cursor-size-changes.patch @@ -0,0 +1,50 @@ +From dcab0fa64e300afa18f39cd98d05e0950f652adf Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Michel=20D=C3=A4nzer?= +Date: Thu, 27 Oct 2016 13:03:23 +0900 +Subject: drm/radeon: Also call cursor_move_locked when the cursor size changes +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Michel Dänzer + +commit dcab0fa64e300afa18f39cd98d05e0950f652adf upstream. + +The cursor size also affects the register programming. + +Signed-off-by: Michel Dänzer +Reviewed-by: Alex Deucher +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/radeon_cursor.c | 9 +++++---- + 1 file changed, 5 insertions(+), 4 deletions(-) + +--- a/drivers/gpu/drm/radeon/radeon_cursor.c ++++ b/drivers/gpu/drm/radeon/radeon_cursor.c +@@ -297,12 +297,11 @@ int radeon_crtc_cursor_set2(struct drm_c + return ret; + } + +- radeon_crtc->cursor_width = width; +- radeon_crtc->cursor_height = height; +- + radeon_lock_cursor(crtc, true); + +- if (hot_x != radeon_crtc->cursor_hot_x || ++ if (width != radeon_crtc->cursor_width || ++ height != radeon_crtc->cursor_height || ++ hot_x != radeon_crtc->cursor_hot_x || + hot_y != radeon_crtc->cursor_hot_y) { + int x, y; + +@@ -311,6 +310,8 @@ int radeon_crtc_cursor_set2(struct drm_c + + radeon_cursor_move_locked(crtc, x, y); + ++ radeon_crtc->cursor_width = width; ++ radeon_crtc->cursor_height = height; + radeon_crtc->cursor_hot_x = hot_x; + radeon_crtc->cursor_hot_y = hot_y; + } diff --git a/queue-4.8/drm-radeon-hide-the-hw-cursor-while-it-s-out-of-bounds.patch b/queue-4.8/drm-radeon-hide-the-hw-cursor-while-it-s-out-of-bounds.patch new file mode 100644 index 00000000000..8c46ae36cf2 --- /dev/null +++ b/queue-4.8/drm-radeon-hide-the-hw-cursor-while-it-s-out-of-bounds.patch @@ -0,0 +1,162 @@ +From 6b16cf7785a4200b1bddf4f70c9dda2efc49e278 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Michel=20D=C3=A4nzer?= +Date: Thu, 27 Oct 2016 14:54:31 +0900 +Subject: drm/radeon: Hide the HW cursor while it's out of bounds +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Michel Dänzer + +commit 6b16cf7785a4200b1bddf4f70c9dda2efc49e278 upstream. + +Fixes hangs in that case under some circumstances. + +v2: +* Only use non-0 x/yorigin if the cursor is (partially) outside of the + top/left edge of the total surface with AVIVO/DCE + +Bugzilla: https://bugzilla.suse.com/show_bug.cgi?id=1000433 +Signed-off-by: Michel Dänzer +Reviewed-by: Alex Deucher (v1) +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/radeon_cursor.c | 60 +++++++++++++++++++++++---------- + drivers/gpu/drm/radeon/radeon_mode.h | 1 + 2 files changed, 43 insertions(+), 18 deletions(-) + +--- a/drivers/gpu/drm/radeon/radeon_cursor.c ++++ b/drivers/gpu/drm/radeon/radeon_cursor.c +@@ -90,6 +90,9 @@ static void radeon_show_cursor(struct dr + struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); + struct radeon_device *rdev = crtc->dev->dev_private; + ++ if (radeon_crtc->cursor_out_of_bounds) ++ return; ++ + if (ASIC_IS_DCE4(rdev)) { + WREG32(EVERGREEN_CUR_SURFACE_ADDRESS_HIGH + radeon_crtc->crtc_offset, + upper_32_bits(radeon_crtc->cursor_addr)); +@@ -148,16 +151,17 @@ static int radeon_cursor_move_locked(str + x += crtc->x; + y += crtc->y; + } +- DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y); + +- if (x < 0) { ++ if (x < 0) + xorigin = min(-x, radeon_crtc->max_cursor_width - 1); +- x = 0; +- } +- if (y < 0) { ++ if (y < 0) + yorigin = min(-y, radeon_crtc->max_cursor_height - 1); +- y = 0; ++ ++ if (!ASIC_IS_AVIVO(rdev)) { ++ x += crtc->x; ++ y += crtc->y; + } ++ DRM_DEBUG("x %d y %d c->x %d c->y %d\n", x, y, crtc->x, crtc->y); + + /* fixed on DCE6 and newer */ + if (ASIC_IS_AVIVO(rdev) && !ASIC_IS_DCE6(rdev)) { +@@ -180,27 +184,31 @@ static int radeon_cursor_move_locked(str + if (i > 1) { + int cursor_end, frame_end; + +- cursor_end = x - xorigin + w; ++ cursor_end = x + w; + frame_end = crtc->x + crtc->mode.crtc_hdisplay; + if (cursor_end >= frame_end) { + w = w - (cursor_end - frame_end); + if (!(frame_end & 0x7f)) + w--; +- } else { +- if (!(cursor_end & 0x7f)) +- w--; ++ } else if (cursor_end <= 0) { ++ goto out_of_bounds; ++ } else if (!(cursor_end & 0x7f)) { ++ w--; + } + if (w <= 0) { +- w = 1; +- cursor_end = x - xorigin + w; +- if (!(cursor_end & 0x7f)) { +- x--; +- WARN_ON_ONCE(x < 0); +- } ++ goto out_of_bounds; + } + } + } + ++ if (x <= (crtc->x - w) || y <= (crtc->y - radeon_crtc->cursor_height) || ++ x >= (crtc->x + crtc->mode.crtc_hdisplay) || ++ y >= (crtc->y + crtc->mode.crtc_vdisplay)) ++ goto out_of_bounds; ++ ++ x += xorigin; ++ y += yorigin; ++ + if (ASIC_IS_DCE4(rdev)) { + WREG32(EVERGREEN_CUR_POSITION + radeon_crtc->crtc_offset, (x << 16) | y); + WREG32(EVERGREEN_CUR_HOT_SPOT + radeon_crtc->crtc_offset, (xorigin << 16) | yorigin); +@@ -212,6 +220,9 @@ static int radeon_cursor_move_locked(str + WREG32(AVIVO_D1CUR_SIZE + radeon_crtc->crtc_offset, + ((w - 1) << 16) | (radeon_crtc->cursor_height - 1)); + } else { ++ x -= crtc->x; ++ y -= crtc->y; ++ + if (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN) + y *= 2; + +@@ -232,6 +243,19 @@ static int radeon_cursor_move_locked(str + radeon_crtc->cursor_x = x; + radeon_crtc->cursor_y = y; + ++ if (radeon_crtc->cursor_out_of_bounds) { ++ radeon_crtc->cursor_out_of_bounds = false; ++ if (radeon_crtc->cursor_bo) ++ radeon_show_cursor(crtc); ++ } ++ ++ return 0; ++ ++ out_of_bounds: ++ if (!radeon_crtc->cursor_out_of_bounds) { ++ radeon_hide_cursor(crtc); ++ radeon_crtc->cursor_out_of_bounds = true; ++ } + return 0; + } + +@@ -308,12 +332,12 @@ int radeon_crtc_cursor_set2(struct drm_c + x = radeon_crtc->cursor_x + radeon_crtc->cursor_hot_x - hot_x; + y = radeon_crtc->cursor_y + radeon_crtc->cursor_hot_y - hot_y; + +- radeon_cursor_move_locked(crtc, x, y); +- + radeon_crtc->cursor_width = width; + radeon_crtc->cursor_height = height; + radeon_crtc->cursor_hot_x = hot_x; + radeon_crtc->cursor_hot_y = hot_y; ++ ++ radeon_cursor_move_locked(crtc, x, y); + } + + radeon_show_cursor(crtc); +--- a/drivers/gpu/drm/radeon/radeon_mode.h ++++ b/drivers/gpu/drm/radeon/radeon_mode.h +@@ -330,6 +330,7 @@ struct radeon_crtc { + u16 lut_r[256], lut_g[256], lut_b[256]; + bool enabled; + bool can_tile; ++ bool cursor_out_of_bounds; + uint32_t crtc_offset; + struct drm_gem_object *cursor_bo; + uint64_t cursor_addr; diff --git a/queue-4.8/drm-radeon-si-load-the-proper-firmware-on-0x87-oland-boards.patch b/queue-4.8/drm-radeon-si-load-the-proper-firmware-on-0x87-oland-boards.patch new file mode 100644 index 00000000000..431fcc541d4 --- /dev/null +++ b/queue-4.8/drm-radeon-si-load-the-proper-firmware-on-0x87-oland-boards.patch @@ -0,0 +1,28 @@ +From abb2e3c1ce64c8bba678973800c34ea1dc97c42c Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Fri, 2 Dec 2016 00:23:35 -0500 +Subject: drm/radeon/si: load the proper firmware on 0x87 oland boards + +From: Alex Deucher + +commit abb2e3c1ce64c8bba678973800c34ea1dc97c42c upstream. + +New variant. + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/si.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/gpu/drm/radeon/si.c ++++ b/drivers/gpu/drm/radeon/si.c +@@ -1722,6 +1722,7 @@ static int si_init_microcode(struct rade + (rdev->pdev->revision == 0x80) || + (rdev->pdev->revision == 0x81) || + (rdev->pdev->revision == 0x83) || ++ (rdev->pdev->revision == 0x87) || + (rdev->pdev->device == 0x6604) || + (rdev->pdev->device == 0x6605)) + new_smc = true; diff --git a/queue-4.8/hv-acquire-vmbus_connection.channel_mutex-in-vmbus_free_channels.patch b/queue-4.8/hv-acquire-vmbus_connection.channel_mutex-in-vmbus_free_channels.patch new file mode 100644 index 00000000000..41a0d4edf02 --- /dev/null +++ b/queue-4.8/hv-acquire-vmbus_connection.channel_mutex-in-vmbus_free_channels.patch @@ -0,0 +1,42 @@ +From abd1026da4a7700a8db370947f75cd17b6ae6f76 Mon Sep 17 00:00:00 2001 +From: Vitaly Kuznetsov +Date: Sat, 3 Dec 2016 12:34:32 -0800 +Subject: hv: acquire vmbus_connection.channel_mutex in vmbus_free_channels() + +From: Vitaly Kuznetsov + +commit abd1026da4a7700a8db370947f75cd17b6ae6f76 upstream. + +"kernel BUG at drivers/hv/channel_mgmt.c:350!" is observed when hv_vmbus +module is unloaded. BUG_ON() was introduced in commit 85d9aa705184 +("Drivers: hv: vmbus: add an API vmbus_hvsock_device_unregister()") as +vmbus_free_channels() codepath was apparently forgotten. + +Fixes: 85d9aa705184 ("Drivers: hv: vmbus: add an API vmbus_hvsock_device_unregister()") + +Signed-off-by: Vitaly Kuznetsov +Signed-off-by: K. Y. Srinivasan +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/hv/channel_mgmt.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/hv/channel_mgmt.c ++++ b/drivers/hv/channel_mgmt.c +@@ -348,6 +348,7 @@ void vmbus_free_channels(void) + { + struct vmbus_channel *channel, *tmp; + ++ mutex_lock(&vmbus_connection.channel_mutex); + list_for_each_entry_safe(channel, tmp, &vmbus_connection.chn_list, + listentry) { + /* hv_process_channel_removal() needs this */ +@@ -355,6 +356,7 @@ void vmbus_free_channels(void) + + vmbus_device_unregister(channel->device_obj); + } ++ mutex_unlock(&vmbus_connection.channel_mutex); + } + + /* diff --git a/queue-4.8/series b/queue-4.8/series index 15ec6138330..7f5cae722b8 100644 --- a/queue-4.8/series +++ b/queue-4.8/series @@ -13,3 +13,24 @@ gpio-chardev-return-error-for-seek-operations.patch arm64-tegra-add-vdd_gpu-regulator-to-jetson-tx1.patch clk-bcm2835-avoid-overwriting-the-div-info-when-disabling-a-pll_div-clk.patch thermal-hwmon-properly-report-critical-temperature-in-sysfs.patch +docs-sphinx-extensions-make-rstflattable-work-with-docutils-0.13.patch +hv-acquire-vmbus_connection.channel_mutex-in-vmbus_free_channels.patch +staging-comedi-ni_mio_common-fix-m-series-ni_ai_insn_read-data-mask.patch +staging-comedi-ni_mio_common-fix-e-series-ni_ai_insn_read-data.patch +acpi-video-add-force_native-quirk-for-dell-xps-17-l702x.patch +acpi-video-add-force_native-quirk-for-hp-pavilion-dv6.patch +drm-amd-amdgpu-enable-gui-idle-int-after-enabling-cgcg.patch +drm-nouveau-gr-fallback-to-legacy-paths-during-firmware-lookup.patch +drm-nouveau-kms-lvds-panel-strap-moved-again-on-maxwell.patch +drm-nouveau-bios-require-checksum-to-match-for-fast-acpi-shadow-method.patch +drm-nouveau-ltc-protect-clearing-of-comptags-with-mutex.patch +drm-nouveau-ttm-wait-for-bo-fence-to-signal-before-unmapping-vmas.patch +drm-nouveau-i2c-gk110b-gm10x-use-the-correct-implementation.patch +drm-nouveau-fifo-gf100-protect-channel-preempt-with-subdev-mutex.patch +drm-radeon-also-call-cursor_move_locked-when-the-cursor-size-changes.patch +drm-radeon-hide-the-hw-cursor-while-it-s-out-of-bounds.patch +drm-radeon-add-additional-pci-revision-to-dpm-workaround.patch +drm-radeon-si-load-the-proper-firmware-on-0x87-oland-boards.patch +drm-gma500-add-compat-ioctl.patch +drm-amdgpu-fix-init-save-restore-list-in-gfx_v8.0.patch +drivers-gpu-drm-ast-fix-infinite-loop-if-read-fails.patch diff --git a/queue-4.8/staging-comedi-ni_mio_common-fix-e-series-ni_ai_insn_read-data.patch b/queue-4.8/staging-comedi-ni_mio_common-fix-e-series-ni_ai_insn_read-data.patch new file mode 100644 index 00000000000..adc5e041678 --- /dev/null +++ b/queue-4.8/staging-comedi-ni_mio_common-fix-e-series-ni_ai_insn_read-data.patch @@ -0,0 +1,61 @@ +From 857a661020a2de3a0304edf33ad656abee100891 Mon Sep 17 00:00:00 2001 +From: Ian Abbott +Date: Mon, 14 Nov 2016 20:16:22 +0000 +Subject: staging: comedi: ni_mio_common: fix E series ni_ai_insn_read() data + +From: Ian Abbott + +commit 857a661020a2de3a0304edf33ad656abee100891 upstream. + +Commit 0557344e2149 ("staging: comedi: ni_mio_common: fix local var for +32-bit read") changed the type of local variable `d` from `unsigned +short` to `unsigned int` to fix a bug introduced in +commit 9c340ac934db ("staging: comedi: ni_stc.h: add read/write +callbacks to struct ni_private") when reading AI data for NI PCI-6110 +and PCI-6111 cards. Unfortunately, other parts of the function rely on +the variable being `unsigned short` when an offset value in local +variable `signbits` is added to `d` before writing the value to the +`data` array: + + d += signbits; + data[n] = d; + +The `signbits` variable will be non-zero in bipolar mode, and is used to +convert the hardware's 2's complement, 16-bit numbers to Comedi's +straight binary sample format (with 0 representing the most negative +voltage). This breaks because `d` is now 32 bits wide instead of 16 +bits wide, so after the addition of `signbits`, `data[n]` ends up being +set to values above 65536 for negative voltages. This affects all +supported "E series" cards except PCI-6143 (and PXI-6143). Fix it by +ANDing the value written to the `data[n]` with the mask 0xffff. + +Fixes: 0557344e2149 ("staging: comedi: ni_mio_common: fix local var for 32-bit read") +Signed-off-by: Ian Abbott +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/staging/comedi/drivers/ni_mio_common.c | 5 ++--- + 1 file changed, 2 insertions(+), 3 deletions(-) + +--- a/drivers/staging/comedi/drivers/ni_mio_common.c ++++ b/drivers/staging/comedi/drivers/ni_mio_common.c +@@ -1875,7 +1875,7 @@ static int ni_ai_insn_read(struct comedi + return -ETIME; + } + d += signbits; +- data[n] = d; ++ data[n] = d & 0xffff; + } + } else if (devpriv->is_6143) { + for (n = 0; n < insn->n; n++) { +@@ -1924,9 +1924,8 @@ static int ni_ai_insn_read(struct comedi + data[n] = dl; + } else { + d = ni_readw(dev, NI_E_AI_FIFO_DATA_REG); +- /* subtle: needs to be short addition */ + d += signbits; +- data[n] = d; ++ data[n] = d & 0xffff; + } + } + } diff --git a/queue-4.8/staging-comedi-ni_mio_common-fix-m-series-ni_ai_insn_read-data-mask.patch b/queue-4.8/staging-comedi-ni_mio_common-fix-m-series-ni_ai_insn_read-data-mask.patch new file mode 100644 index 00000000000..856fc085a29 --- /dev/null +++ b/queue-4.8/staging-comedi-ni_mio_common-fix-m-series-ni_ai_insn_read-data-mask.patch @@ -0,0 +1,34 @@ +From 655c4d442d1213b617926cc6d54e2a9a793fb46b Mon Sep 17 00:00:00 2001 +From: Ian Abbott +Date: Mon, 14 Nov 2016 20:16:21 +0000 +Subject: staging: comedi: ni_mio_common: fix M Series ni_ai_insn_read() data mask + +From: Ian Abbott + +commit 655c4d442d1213b617926cc6d54e2a9a793fb46b upstream. + +For NI M Series cards, the Comedi `insn_read` handler for the AI +subdevice is broken due to ANDing the value read from the AI FIFO data +register with an incorrect mask. The incorrect mask clears all but the +most significant bit of the sample data. It should preserve all the +sample data bits. Correct it. + +Fixes: 817144ae7fda ("staging: comedi: ni_mio_common: remove unnecessary use of 'board->adbits'") +Signed-off-by: Ian Abbott +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/staging/comedi/drivers/ni_mio_common.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/staging/comedi/drivers/ni_mio_common.c ++++ b/drivers/staging/comedi/drivers/ni_mio_common.c +@@ -1832,7 +1832,7 @@ static int ni_ai_insn_read(struct comedi + unsigned int *data) + { + struct ni_private *devpriv = dev->private; +- unsigned int mask = (s->maxdata + 1) >> 1; ++ unsigned int mask = s->maxdata; + int i, n; + unsigned int signbits; + unsigned int d; -- 2.47.3