From bb8ff5d474f68ff804b0b0227c9691720286c2b5 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Mon, 14 Nov 2022 11:15:09 +0100 Subject: [PATCH] 5.10-stable patches added patches: mmc-cqhci-provide-helper-for-resetting-both-sdhci-and-cqhci.patch mmc-sdhci-of-arasan-fix-sdhci_reset_all-for-cqhci.patch mmc-sdhci-tegra-fix-sdhci_reset_all-for-cqhci.patch mmc-sdhci_am654-fix-sdhci_reset_all-for-cqhci.patch --- ...r-for-resetting-both-sdhci-and-cqhci.patch | 69 +++++++++++++++++ ...arasan-fix-sdhci_reset_all-for-cqhci.patch | 68 ++++++++++++++++ ...-tegra-fix-sdhci_reset_all-for-cqhci.patch | 59 ++++++++++++++ ..._am654-fix-sdhci_reset_all-for-cqhci.patch | 77 +++++++++++++++++++ queue-5.10/series | 4 + 5 files changed, 277 insertions(+) create mode 100644 queue-5.10/mmc-cqhci-provide-helper-for-resetting-both-sdhci-and-cqhci.patch create mode 100644 queue-5.10/mmc-sdhci-of-arasan-fix-sdhci_reset_all-for-cqhci.patch create mode 100644 queue-5.10/mmc-sdhci-tegra-fix-sdhci_reset_all-for-cqhci.patch create mode 100644 queue-5.10/mmc-sdhci_am654-fix-sdhci_reset_all-for-cqhci.patch diff --git a/queue-5.10/mmc-cqhci-provide-helper-for-resetting-both-sdhci-and-cqhci.patch b/queue-5.10/mmc-cqhci-provide-helper-for-resetting-both-sdhci-and-cqhci.patch new file mode 100644 index 00000000000..5ab8c310870 --- /dev/null +++ b/queue-5.10/mmc-cqhci-provide-helper-for-resetting-both-sdhci-and-cqhci.patch @@ -0,0 +1,69 @@ +From ebb5fd38f41132e6924cb33b647337f4a5d5360c Mon Sep 17 00:00:00 2001 +From: Brian Norris +Date: Wed, 26 Oct 2022 12:42:03 -0700 +Subject: mmc: cqhci: Provide helper for resetting both SDHCI and CQHCI + +From: Brian Norris + +commit ebb5fd38f41132e6924cb33b647337f4a5d5360c upstream. + +Several SDHCI drivers need to deactivate command queueing in their reset +hook (see sdhci_cqhci_reset() / sdhci-pci-core.c, for example), and +several more are coming. + +Those reset implementations have some small subtleties (e.g., ordering +of initialization of SDHCI vs. CQHCI might leave us resetting with a +NULL ->cqe_private), and are often identical across different host +drivers. + +We also don't want to force a dependency between SDHCI and CQHCI, or +vice versa; non-SDHCI drivers use CQHCI, and SDHCI drivers might support +command queueing through some other means. + +So, implement a small helper, to avoid repeating the same mistakes in +different drivers. Simply stick it in a header, because it's so small it +doesn't deserve its own module right now, and inlining to each driver is +pretty reasonable. + +This is marked for -stable, as it is an important prerequisite patch for +several SDHCI controller bugfixes that follow. + +Cc: +Signed-off-by: Brian Norris +Acked-by: Adrian Hunter +Reviewed-by: Florian Fainelli +Link: https://lore.kernel.org/r/20221026124150.v4.1.Ie85faa09432bfe1b0890d8c24ff95e17f3097317@changeid +Signed-off-by: Ulf Hansson +Signed-off-by: Greg Kroah-Hartman +--- + drivers/mmc/host/sdhci-cqhci.h | 24 ++++++++++++++++++++++++ + 1 file changed, 24 insertions(+) + create mode 100644 drivers/mmc/host/sdhci-cqhci.h + +--- /dev/null ++++ b/drivers/mmc/host/sdhci-cqhci.h +@@ -0,0 +1,24 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++/* ++ * Copyright 2022 The Chromium OS Authors ++ * ++ * Support that applies to the combination of SDHCI and CQHCI, while not ++ * expressing a dependency between the two modules. ++ */ ++ ++#ifndef __MMC_HOST_SDHCI_CQHCI_H__ ++#define __MMC_HOST_SDHCI_CQHCI_H__ ++ ++#include "cqhci.h" ++#include "sdhci.h" ++ ++static inline void sdhci_and_cqhci_reset(struct sdhci_host *host, u8 mask) ++{ ++ if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL) && ++ host->mmc->cqe_private) ++ cqhci_deactivate(host->mmc); ++ ++ sdhci_reset(host, mask); ++} ++ ++#endif /* __MMC_HOST_SDHCI_CQHCI_H__ */ diff --git a/queue-5.10/mmc-sdhci-of-arasan-fix-sdhci_reset_all-for-cqhci.patch b/queue-5.10/mmc-sdhci-of-arasan-fix-sdhci_reset_all-for-cqhci.patch new file mode 100644 index 00000000000..13118e8258a --- /dev/null +++ b/queue-5.10/mmc-sdhci-of-arasan-fix-sdhci_reset_all-for-cqhci.patch @@ -0,0 +1,68 @@ +From 5d249ac37fc2396e8acc1adb0650cdacae5a990d Mon Sep 17 00:00:00 2001 +From: Brian Norris +Date: Wed, 26 Oct 2022 12:42:04 -0700 +Subject: mmc: sdhci-of-arasan: Fix SDHCI_RESET_ALL for CQHCI + +From: Brian Norris + +commit 5d249ac37fc2396e8acc1adb0650cdacae5a990d upstream. + +SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't +tracking that properly in software. When out of sync, we may trigger +various timeouts. + +It's not typical to perform resets while CQE is enabled, but one +particular case I hit commonly enough: mmc_suspend() -> mmc_power_off(). +Typically we will eventually deactivate CQE (cqhci_suspend() -> +cqhci_deactivate()), but that's not guaranteed -- in particular, if +we perform a partial (e.g., interrupted) system suspend. + +The same bug was already found and fixed for two other drivers, in v5.7 +and v5.9: + + 5cf583f1fb9c ("mmc: sdhci-msm: Deactivate CQE during SDHC reset") + df57d73276b8 ("mmc: sdhci-pci: Fix SDHCI_RESET_ALL for CQHCI for Intel + GLK-based controllers") + +The latter is especially prescient, saying "other drivers using CQHCI +might benefit from a similar change, if they also have CQHCI reset by +SDHCI_RESET_ALL." + +So like these other patches, deactivate CQHCI when resetting the +controller. Do this via the new sdhci_and_cqhci_reset() helper. + +This patch depends on (and should not compile without) the patch +entitled "mmc: cqhci: Provide helper for resetting both SDHCI and +CQHCI". + +Fixes: 84362d79f436 ("mmc: sdhci-of-arasan: Add CQHCI support for arasan,sdhci-5.1") +Cc: +Signed-off-by: Brian Norris +Reviewed-by: Guenter Roeck +Acked-by: Adrian Hunter +Link: https://lore.kernel.org/r/20221026124150.v4.2.I29f6a2189e84e35ad89c1833793dca9e36c64297@changeid +Signed-off-by: Ulf Hansson +Signed-off-by: Greg Kroah-Hartman +--- + drivers/mmc/host/sdhci-of-arasan.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/mmc/host/sdhci-of-arasan.c ++++ b/drivers/mmc/host/sdhci-of-arasan.c +@@ -25,6 +25,7 @@ + #include + + #include "cqhci.h" ++#include "sdhci-cqhci.h" + #include "sdhci-pltfm.h" + + #define SDHCI_ARASAN_VENDOR_REGISTER 0x78 +@@ -359,7 +360,7 @@ static void sdhci_arasan_reset(struct sd + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host); + +- sdhci_reset(host, mask); ++ sdhci_and_cqhci_reset(host, mask); + + if (sdhci_arasan->quirks & SDHCI_ARASAN_QUIRK_FORCE_CDTEST) { + ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); diff --git a/queue-5.10/mmc-sdhci-tegra-fix-sdhci_reset_all-for-cqhci.patch b/queue-5.10/mmc-sdhci-tegra-fix-sdhci_reset_all-for-cqhci.patch new file mode 100644 index 00000000000..39a004fdd46 --- /dev/null +++ b/queue-5.10/mmc-sdhci-tegra-fix-sdhci_reset_all-for-cqhci.patch @@ -0,0 +1,59 @@ +From 836078449464e6af3b66ae6652dae79af176f21e Mon Sep 17 00:00:00 2001 +From: Brian Norris +Date: Wed, 26 Oct 2022 12:42:07 -0700 +Subject: mmc: sdhci-tegra: Fix SDHCI_RESET_ALL for CQHCI + +From: Brian Norris + +commit 836078449464e6af3b66ae6652dae79af176f21e upstream. + +[[ NOTE: this is completely untested by the author, but included solely + because, as noted in commit df57d73276b8 ("mmc: sdhci-pci: Fix + SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers"), "other + drivers using CQHCI might benefit from a similar change, if they + also have CQHCI reset by SDHCI_RESET_ALL." We've now seen the same + bug on at least MSM, Arasan, and Intel hardware. ]] + +SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't +tracking that properly in software. When out of sync, we may trigger +various timeouts. + +It's not typical to perform resets while CQE is enabled, but this may +occur in some suspend or error recovery scenarios. + +Include this fix by way of the new sdhci_and_cqhci_reset() helper. + +This patch depends on (and should not compile without) the patch +entitled "mmc: cqhci: Provide helper for resetting both SDHCI and +CQHCI". + +Fixes: 3c4019f97978 ("mmc: tegra: HW Command Queue Support for Tegra SDMMC") +Signed-off-by: Brian Norris +Acked-by: Adrian Hunter +Cc: stable@vger.kernel.org +Link: https://lore.kernel.org/r/20221026124150.v4.5.I418c9eaaf754880fcd2698113e8c3ef821a944d7@changeid +Signed-off-by: Ulf Hansson +Signed-off-by: Greg Kroah-Hartman +--- + drivers/mmc/host/sdhci-tegra.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/mmc/host/sdhci-tegra.c ++++ b/drivers/mmc/host/sdhci-tegra.c +@@ -24,6 +24,7 @@ + #include + #include + ++#include "sdhci-cqhci.h" + #include "sdhci-pltfm.h" + #include "cqhci.h" + +@@ -361,7 +362,7 @@ static void tegra_sdhci_reset(struct sdh + const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; + u32 misc_ctrl, clk_ctrl, pad_ctrl; + +- sdhci_reset(host, mask); ++ sdhci_and_cqhci_reset(host, mask); + + if (!(mask & SDHCI_RESET_ALL)) + return; diff --git a/queue-5.10/mmc-sdhci_am654-fix-sdhci_reset_all-for-cqhci.patch b/queue-5.10/mmc-sdhci_am654-fix-sdhci_reset_all-for-cqhci.patch new file mode 100644 index 00000000000..2054688133c --- /dev/null +++ b/queue-5.10/mmc-sdhci_am654-fix-sdhci_reset_all-for-cqhci.patch @@ -0,0 +1,77 @@ +From 162503fd1c3a1d4e14dbe7f399c1d1bec1c8abbc Mon Sep 17 00:00:00 2001 +From: Brian Norris +Date: Wed, 26 Oct 2022 12:42:08 -0700 +Subject: mmc: sdhci_am654: Fix SDHCI_RESET_ALL for CQHCI + +From: Brian Norris + +commit 162503fd1c3a1d4e14dbe7f399c1d1bec1c8abbc upstream. + +[[ NOTE: this is completely untested by the author, but included solely + because, as noted in commit df57d73276b8 ("mmc: sdhci-pci: Fix + SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers"), "other + drivers using CQHCI might benefit from a similar change, if they + also have CQHCI reset by SDHCI_RESET_ALL." We've now seen the same + bug on at least MSM, Arasan, and Intel hardware. ]] + +SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't +tracking that properly in software. When out of sync, we may trigger +various timeouts. + +It's not typical to perform resets while CQE is enabled, but this may +occur in some suspend or error recovery scenarios. + +Include this fix by way of the new sdhci_and_cqhci_reset() helper. + +This patch depends on (and should not compile without) the patch +entitled "mmc: cqhci: Provide helper for resetting both SDHCI and +CQHCI". + +Fixes: f545702b74f9 ("mmc: sdhci_am654: Add Support for Command Queuing Engine to J721E") +Signed-off-by: Brian Norris +Acked-by: Adrian Hunter +Cc: stable@vger.kernel.org +Link: https://lore.kernel.org/r/20221026124150.v4.6.I35ca9d6220ba48304438b992a76647ca8e5b126f@changeid +Signed-off-by: Ulf Hansson +Signed-off-by: Greg Kroah-Hartman +--- + drivers/mmc/host/sdhci_am654.c | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +--- a/drivers/mmc/host/sdhci_am654.c ++++ b/drivers/mmc/host/sdhci_am654.c +@@ -15,6 +15,7 @@ + #include + + #include "cqhci.h" ++#include "sdhci-cqhci.h" + #include "sdhci-pltfm.h" + + /* CTL_CFG Registers */ +@@ -378,7 +379,7 @@ static void sdhci_am654_reset(struct sdh + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct sdhci_am654_data *sdhci_am654 = sdhci_pltfm_priv(pltfm_host); + +- sdhci_reset(host, mask); ++ sdhci_and_cqhci_reset(host, mask); + + if (sdhci_am654->quirks & SDHCI_AM654_QUIRK_FORCE_CDTEST) { + ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); +@@ -464,7 +465,7 @@ static struct sdhci_ops sdhci_am654_ops + .set_clock = sdhci_am654_set_clock, + .write_b = sdhci_am654_write_b, + .irq = sdhci_am654_cqhci_irq, +- .reset = sdhci_reset, ++ .reset = sdhci_and_cqhci_reset, + }; + + static const struct sdhci_pltfm_data sdhci_am654_pdata = { +@@ -494,7 +495,7 @@ static struct sdhci_ops sdhci_j721e_8bit + .set_clock = sdhci_am654_set_clock, + .write_b = sdhci_am654_write_b, + .irq = sdhci_am654_cqhci_irq, +- .reset = sdhci_reset, ++ .reset = sdhci_and_cqhci_reset, + }; + + static const struct sdhci_pltfm_data sdhci_j721e_8bit_pdata = { diff --git a/queue-5.10/series b/queue-5.10/series index 2e0f740334d..3fc204ce1f3 100644 --- a/queue-5.10/series +++ b/queue-5.10/series @@ -54,3 +54,7 @@ riscv-separate-memory-init-from-paging-init.patch riscv-fix-reserved-memory-setup.patch arm64-efi-fix-handling-of-misaligned-runtime-regions-and-drop-warning.patch mips-jump_label-fix-compat-branch-range-check.patch +mmc-cqhci-provide-helper-for-resetting-both-sdhci-and-cqhci.patch +mmc-sdhci-of-arasan-fix-sdhci_reset_all-for-cqhci.patch +mmc-sdhci_am654-fix-sdhci_reset_all-for-cqhci.patch +mmc-sdhci-tegra-fix-sdhci_reset_all-for-cqhci.patch -- 2.47.3