From c021d9fe410adadf35a835098073e4528f2db728 Mon Sep 17 00:00:00 2001 From: Potin Lai Date: Mon, 26 Dec 2022 13:45:35 +0800 Subject: [PATCH] ARM: dts: aspeed: bletchley: Enable wdtrst1 Enable WDTRST1 external signal to send a reset pulse to peripherals while BMC reset. Signed-off-by: Potin Lai Reviewed-by: Patrick Williams Link: https://lore.kernel.org/r/20221226054535.2836110-3-potin.lai.pt@gmail.com Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts b/arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts index 791f83aaac506..e899de681f475 100644 --- a/arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts +++ b/arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts @@ -1064,3 +1064,14 @@ bias-disable; }; }; + +&wdt1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdtrst1_default>; + aspeed,reset-type = "soc"; + aspeed,external-signal; + aspeed,ext-push-pull; + aspeed,ext-active-high; + aspeed,ext-pulse-duration = <256>; +}; -- 2.39.5