From c236203867ae6792ed7ca8437ff81a034888453e Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Fri, 26 Jun 2015 17:56:42 -0700 Subject: [PATCH] 3.14-stable patches added patches: lpfc-add-iotag-memory-barrier.patch --- .../lpfc-add-iotag-memory-barrier.patch | 67 +++++++++++++++++++ queue-3.14/series | 1 + 2 files changed, 68 insertions(+) create mode 100644 queue-3.14/lpfc-add-iotag-memory-barrier.patch diff --git a/queue-3.14/lpfc-add-iotag-memory-barrier.patch b/queue-3.14/lpfc-add-iotag-memory-barrier.patch new file mode 100644 index 00000000000..ae21bb02813 --- /dev/null +++ b/queue-3.14/lpfc-add-iotag-memory-barrier.patch @@ -0,0 +1,67 @@ +From 27f344eb15dd0da80ebec80c7245e8c85043f841 Mon Sep 17 00:00:00 2001 +From: James Smart +Date: Wed, 7 May 2014 17:16:46 -0400 +Subject: lpfc: Add iotag memory barrier + +From: James Smart + +commit 27f344eb15dd0da80ebec80c7245e8c85043f841 upstream. + +Add a memory barrier to ensure the valid bit is read before +any of the cqe payload is read. This fixes an issue seen +on Power where the cqe payload was getting loaded before +the valid bit. When this occurred, we saw an iotag out of +range error when a command completed, but since the iotag +looked invalid the command didn't get completed to scsi core. +Later we hit the command timeout, attempted to abort the command, +then waited for the aborted command to get returned. Since the +adapter already returned the command, we timeout waiting, +and end up escalating EEH all the way to host reset. This +patch fixes this issue. + +Signed-off-by: Brian King +Signed-off-by: James Smart +Signed-off-by: Christoph Hellwig +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/scsi/lpfc/lpfc_sli.c | 21 +++++++++++++++++++++ + 1 file changed, 21 insertions(+) + +--- a/drivers/scsi/lpfc/lpfc_sli.c ++++ b/drivers/scsi/lpfc/lpfc_sli.c +@@ -265,6 +265,16 @@ lpfc_sli4_eq_get(struct lpfc_queue *q) + return NULL; + + q->hba_index = idx; ++ ++ /* ++ * insert barrier for instruction interlock : data from the hardware ++ * must have the valid bit checked before it can be copied and acted ++ * upon. Given what was seen in lpfc_sli4_cq_get() of speculative ++ * instructions allowing action on content before valid bit checked, ++ * add barrier here as well. May not be needed as "content" is a ++ * single 32-bit entity here (vs multi word structure for cq's). ++ */ ++ mb(); + return eqe; + } + +@@ -370,6 +380,17 @@ lpfc_sli4_cq_get(struct lpfc_queue *q) + + cqe = q->qe[q->hba_index].cqe; + q->hba_index = idx; ++ ++ /* ++ * insert barrier for instruction interlock : data from the hardware ++ * must have the valid bit checked before it can be copied and acted ++ * upon. Speculative instructions were allowing a bcopy at the start ++ * of lpfc_sli4_fp_handle_wcqe(), which is called immediately ++ * after our return, to copy data before the valid bit check above ++ * was done. As such, some of the copied data was stale. The barrier ++ * ensures the check is before any data is copied. ++ */ ++ mb(); + return cqe; + } + diff --git a/queue-3.14/series b/queue-3.14/series index 6b5974403c5..977c000e993 100644 --- a/queue-3.14/series +++ b/queue-3.14/series @@ -4,3 +4,4 @@ drm-mgag200-reject-non-character-cell-aligned-mode-widths.patch ath3k-add-support-of-0489-e076-ar3012-device.patch ath3k-add-support-of-13d3-3474-ar3012-device.patch pipe-iovec-fix-memory-corruption-when-retrying-atomi-3.14.patch +lpfc-add-iotag-memory-barrier.patch -- 2.47.3