From c28dc3ea854364f285fcc981396783f91d2bb954 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Mon, 5 Aug 2019 12:55:57 +0200 Subject: [PATCH] drop 4.19 patch that broke the build --- ...5-perf-fix-icl-perf-register-offsets.patch | 45 ------------------- queue-4.19/series | 1 - 2 files changed, 46 deletions(-) delete mode 100644 queue-4.19/drm-i915-perf-fix-icl-perf-register-offsets.patch diff --git a/queue-4.19/drm-i915-perf-fix-icl-perf-register-offsets.patch b/queue-4.19/drm-i915-perf-fix-icl-perf-register-offsets.patch deleted file mode 100644 index aac97e0bbd3..00000000000 --- a/queue-4.19/drm-i915-perf-fix-icl-perf-register-offsets.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 95eef14cdad150fed43147bcd4f29eea3d0a3f03 Mon Sep 17 00:00:00 2001 -From: Lionel Landwerlin -Date: Mon, 10 Jun 2019 11:19:14 +0300 -Subject: drm/i915/perf: fix ICL perf register offsets - -From: Lionel Landwerlin - -commit 95eef14cdad150fed43147bcd4f29eea3d0a3f03 upstream. - -We got the wrong offsets (could they have changed?). New values were -computed off an error state by looking up the register offset in the -context image as written by the HW. - -Signed-off-by: Lionel Landwerlin -Fixes: 1de401c08fa805 ("drm/i915/perf: enable perf support on ICL") -Cc: # v4.18+ -Acked-by: Kenneth Graunke -Link: https://patchwork.freedesktop.org/patch/msgid/20190610081914.25428-1-lionel.g.landwerlin@intel.com -(cherry picked from commit 8dcfdfb4501012a8d36d2157dc73925715f2befb) -Signed-off-by: Jani Nikula -Signed-off-by: Greg Kroah-Hartman - ---- - drivers/gpu/drm/i915/i915_perf.c | 10 +++++++--- - 1 file changed, 7 insertions(+), 3 deletions(-) - ---- a/drivers/gpu/drm/i915/i915_perf.c -+++ b/drivers/gpu/drm/i915/i915_perf.c -@@ -3552,9 +3552,13 @@ void i915_perf_init(struct drm_i915_priv - dev_priv->perf.oa.ops.enable_metric_set = gen8_enable_metric_set; - dev_priv->perf.oa.ops.disable_metric_set = gen10_disable_metric_set; - -- dev_priv->perf.oa.ctx_oactxctrl_offset = 0x128; -- dev_priv->perf.oa.ctx_flexeu0_offset = 0x3de; -- -+ if (IS_GEN(dev_priv, 10)) { -+ dev_priv->perf.oa.ctx_oactxctrl_offset = 0x128; -+ dev_priv->perf.oa.ctx_flexeu0_offset = 0x3de; -+ } else { -+ dev_priv->perf.oa.ctx_oactxctrl_offset = 0x124; -+ dev_priv->perf.oa.ctx_flexeu0_offset = 0x78e; -+ } - dev_priv->perf.oa.gen8_valid_ctx_bit = (1<<16); - } - } diff --git a/queue-4.19/series b/queue-4.19/series index bba6add7bbd..79465cf93f8 100644 --- a/queue-4.19/series +++ b/queue-4.19/series @@ -65,5 +65,4 @@ ib-mlx5-move-mrs-to-a-kernel-pd-when-freeing-them-to-the-mr-cache.patch ib-mlx5-fix-clean_mr-to-work-in-the-expected-order.patch ib-mlx5-fix-rss-toeplitz-setup-to-be-aligned-with-the-hw-specification.patch ib-hfi1-check-for-error-on-call-to-alloc_rsm_map_table.patch -drm-i915-perf-fix-icl-perf-register-offsets.patch drm-i915-gvt-fix-incorrect-cache-entry-for-guest-page-mapping.patch -- 2.47.3