From c66b8f6f6e2adb1bf30f6df348c11e717b3123f7 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Mon, 14 Aug 2017 18:16:38 -0700 Subject: [PATCH] 4.12-stable patches added patches: powerpc-fix-proc-cpuinfo-revision-for-power9-dd2.patch --- ...proc-cpuinfo-revision-for-power9-dd2.patch | 47 +++++++++++++++++++ queue-4.12/series | 1 + 2 files changed, 48 insertions(+) create mode 100644 queue-4.12/powerpc-fix-proc-cpuinfo-revision-for-power9-dd2.patch diff --git a/queue-4.12/powerpc-fix-proc-cpuinfo-revision-for-power9-dd2.patch b/queue-4.12/powerpc-fix-proc-cpuinfo-revision-for-power9-dd2.patch new file mode 100644 index 00000000000..92ededaa410 --- /dev/null +++ b/queue-4.12/powerpc-fix-proc-cpuinfo-revision-for-power9-dd2.patch @@ -0,0 +1,47 @@ +rom 64ebb9a208c6e66316329a6d9101815d1ee06fa9 Mon Sep 17 00:00:00 2001 +From: Michael Neuling +Date: Thu, 15 Jun 2017 11:53:16 +1000 +Subject: powerpc: Fix /proc/cpuinfo revision for POWER9 DD2 + +From: Michael Neuling + +commit 64ebb9a208c6e66316329a6d9101815d1ee06fa9 upstream. + +The P9 PVR bits 12-15 don't indicate a revision but instead different +chip configurations. From BookIV we have: + Bits Configuration + 0 : Scale out 12 cores + 1 : Scale out 24 cores + 2 : Scale up 12 cores + 3 : Scale up 24 cores + +DD1 doesn't use this but DD2 does. Linux will mostly use the "Scale +out 24 core" configuration (ie. SMT4 not SMT8) which results in a PVR +of 0x004e1200. The reported revision in /proc/cpuinfo is hence +reported incorrectly as "18.0". + +This patch fixes this to mask off only the relevant bits for the major +revision (ie. bits 8-11) for POWER9. + +Signed-off-by: Michael Neuling +Signed-off-by: Michael Ellerman +Signed-off-by: Stewart Smith +Signed-off-by: Greg Kroah-Hartman + +--- + arch/powerpc/kernel/setup-common.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/arch/powerpc/kernel/setup-common.c ++++ b/arch/powerpc/kernel/setup-common.c +@@ -335,6 +335,10 @@ static int show_cpuinfo(struct seq_file + maj = ((pvr >> 8) & 0xFF) - 1; + min = pvr & 0xFF; + break; ++ case 0x004e: /* POWER9 bits 12-15 give chip type */ ++ maj = (pvr >> 8) & 0x0F; ++ min = pvr & 0xFF; ++ break; + default: + maj = (pvr >> 8) & 0xFF; + min = pvr & 0xFF; diff --git a/queue-4.12/series b/queue-4.12/series index 406cb86f92e..92286f576f2 100644 --- a/queue-4.12/series +++ b/queue-4.12/series @@ -62,3 +62,4 @@ pinctrl-meson-gxl-add-missing-gpiodv_18-pin-entry.patch mips-dec-fix-an-int-handler.s-cpu_daddi_workarounds-regression.patch revert-mips-don-t-unnecessarily-include-kmalloc.h-into-asm-cache.h.patch mips-octeon-fix-broken-edac-driver.patch +powerpc-fix-proc-cpuinfo-revision-for-power9-dd2.patch -- 2.47.3