From c6e9d9d9cb069c7b7b22ccd8bda120943c909dba Mon Sep 17 00:00:00 2001 From: Arne Fitzenreiter Date: Sat, 28 Dec 2024 08:55:38 +0000 Subject: [PATCH] u-boot: update to 2024.10 removed also some leftover arm32 patches. Signed-off-by: Arne Fitzenreiter --- lfs/u-boot | 32 +- ...-nanopi-r2c-and-orangepi-r1-plus-lts.patch | 313 ------------------ .../u-boot/sunxi/nanopi-r1-add-mac.diff | 15 - .../u-boot/sunxi/orangepi-zero-add-macs.diff | 12 - 4 files changed, 15 insertions(+), 357 deletions(-) delete mode 100644 src/patches/u-boot/rockchip/add-nanopi-r2c-and-orangepi-r1-plus-lts.patch delete mode 100644 src/patches/u-boot/sunxi/nanopi-r1-add-mac.diff delete mode 100644 src/patches/u-boot/sunxi/orangepi-zero-add-macs.diff diff --git a/lfs/u-boot b/lfs/u-boot index af4d6acd7d..d19a5fb82d 100644 --- a/lfs/u-boot +++ b/lfs/u-boot @@ -1,7 +1,7 @@ ############################################################################### # # # IPFire.org - A linux based firewall # -# Copyright (C) 2007-2023 IPFire Team # +# Copyright (C) 2007-2024 IPFire Team # # # # This program is free software: you can redistribute it and/or modify # # it under the terms of the GNU General Public License as published by # @@ -24,7 +24,7 @@ include Config -VER = 2022.10 +VER = 2024.10 THISAPP = u-boot-$(VER) DL_FILE = $(THISAPP).tar.bz2 @@ -34,9 +34,8 @@ TARGET = $(DIR_INFO)/$(THISAPP)-$(MKIMAGE) SUP_ARCH = aarch64 CFLAGS := $(patsubst -fstack-protector-strong,,$(CFLAGS)) -LDFLAGS += --no-warn-rwx-segments -ATF_VER = 2.7 +ATF_VER = 2.12 ############################################################################### # Top-level Rules @@ -48,9 +47,9 @@ $(DL_FILE) = $(DL_FROM)/$(DL_FILE) arm-trusted-firmware-$(ATF_VER).tar.gz = $(DL_FROM)/arm-trusted-firmware-$(ATF_VER).tar.gz arm-trusted-firmware-$(ATF_VER)-rk3399-binary.tar.xz = $(DL_FROM)/arm-trusted-firmware-$(ATF_VER)-rk3399-binary.tar.xz -$(DL_FILE)_BLAKE2 = 42aa7a6f131735888939982e579de4342e3909e064ab896b0df6f1ff56c20ed6cb11d25286da7c052a5f67dcef6fa7a746944d8df6dd504586f5a71502d157e1 -arm-trusted-firmware-$(ATF_VER).tar.gz_BLAKE2 = 4fc4d5646e272200d40081902e17f0be32956f451622f011a0d568c8cf26e15ab165fe16a69cf222241f7ba1d443add562d6d382277eb4fb2b49c3918cabdbad -arm-trusted-firmware-$(ATF_VER)-rk3399-binary.tar.xz_BLAKE2 = 04424a7dcda0771f469c8e918a24aed75017c1a28c1b8c2c794e3ce31afbc01e7906ccab6faf1459d69a5ec1ef4fdde2bab1011b883980efeae7372013f2570e +$(DL_FILE)_BLAKE2 = e7673cb86e7911dcbb2432e6eaea803acef814aa42e3ef322a221b9f89a0d52fb1acd6de92d17486f383d01ea7b1b82c570385a53e3c877d13773cf9e7084f8a +arm-trusted-firmware-$(ATF_VER).tar.gz_BLAKE2 = 87bb5bd76993e32a9cc25e405e57f619f2311937af024979d5c20ef022d570435b6e38a23e70079c267e093a45b5a60af671d3eebac0449a908db8ad32aa6592 +arm-trusted-firmware-$(ATF_VER)-rk3399-binary.tar.xz_BLAKE2 = 1b5e80bd260f9869637666a97adc99a0deb87e9b9b6982ba9811e2413477ad178423699ab83267d5e09971abcd5652686e33645b22a6cefba7be7df9b83a02b3 install : $(TARGET) @@ -108,7 +107,7 @@ $(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) # OrangePi Zero Plus cd $(DIR_APP) && rm -rf arm-trusted-firmware-$(ATF_VER) cd $(DIR_APP) && tar axf $(DIR_DL)/arm-trusted-firmware-$(ATF_VER).tar.gz - cd $(DIR_APP)/arm-trusted-firmware-$(ATF_VER) && make PLAT=sun50i_a64 DEBUG=0 bl31 LDFLAGS="$(LDFLAGS)" + cd $(DIR_APP)/arm-trusted-firmware-$(ATF_VER) && make PLAT=sun50i_a64 ARCH=aarch64 CROSS_COMPILE="aarch64-pc-linux-gnu-" DEBUG=0 bl31 cd $(DIR_APP) && cp arm-trusted-firmware-$(ATF_VER)/build/sun50i_a64/release/bl31.bin bl31.bin cd $(DIR_APP) && rm -rf arm-trusted-firmware-$(ATF_VER) -mkdir -pv /usr/share/u-boot/orangepi_zero_plus @@ -123,7 +122,7 @@ $(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) # Nanopi R2S cd $(DIR_APP) && rm -rf arm-trusted-firmware-$(ATF_VER) cd $(DIR_APP) && tar axf $(DIR_DL)/arm-trusted-firmware-$(ATF_VER).tar.gz - cd $(DIR_APP)/arm-trusted-firmware-$(ATF_VER) && make PLAT=rk3328 ARCH=aarch64 DEBUG=0 bl31 LDFLAGS="$(LDFLAGS)" + cd $(DIR_APP)/arm-trusted-firmware-$(ATF_VER) && make PLAT=rk3328 ARCH=aarch64 CROSS_COMPILE="aarch64-pc-linux-gnu-" DEBUG=0 bl31 cd $(DIR_APP) && cp arm-trusted-firmware-$(ATF_VER)/build/rk3328/release/bl31/bl31.elf bl31.elf cd $(DIR_APP) && rm -rf arm-trusted-firmware-$(ATF_VER) -mkdir -pv /usr/share/u-boot/nanopi_r2s @@ -132,16 +131,15 @@ $(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) cd $(DIR_APP) && sed -i -e 's!^CONFIG_BOOTCOMMAND=.*!CONFIG_BOOTCOMMAND="console=ttyS2,115200n8;run distro_bootcmd"!' .config cd $(DIR_APP) && sed -i -e 's!^CONFIG_BAUDRATE=.*!CONFIG_BAUDRATE=115200!' .config cd $(DIR_APP) && sed -i -e 's!.*CONFIG_ENV_OVERWRITE.*!CONFIG_ENV_OVERWRITE=y!' .config - cd $(DIR_APP) && make CROSS_COMPILE="" HOSTCC="gcc $(CFLAGS)" + cd $(DIR_APP) && make BL31=$(DIR_APP)/bl31.elf CROSS_COMPILE="" HOSTCC="gcc $(CFLAGS)" cd $(DIR_APP) && install -v -m 644 u-boot-rockchip.bin \ /usr/share/u-boot/nanopi_r2s/u-boot-rockchip.bin cd $(DIR_APP) && make distclean # Nanopi R2C - cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/u-boot/rockchip/add-nanopi-r2c-and-orangepi-r1-plus-lts.patch cd $(DIR_APP) && rm -rf arm-trusted-firmware-$(ATF_VER) cd $(DIR_APP) && tar axf $(DIR_DL)/arm-trusted-firmware-$(ATF_VER).tar.gz - cd $(DIR_APP)/arm-trusted-firmware-$(ATF_VER) && make PLAT=rk3328 ARCH=aarch64 DEBUG=0 bl31 LDFLAGS="$(LDFLAGS)" + cd $(DIR_APP)/arm-trusted-firmware-$(ATF_VER) && make PLAT=rk3328 ARCH=aarch64 CROSS_COMPILE="aarch64-pc-linux-gnu-" DEBUG=0 bl31 cd $(DIR_APP) && cp arm-trusted-firmware-$(ATF_VER)/build/rk3328/release/bl31/bl31.elf bl31.elf cd $(DIR_APP) && rm -rf arm-trusted-firmware-$(ATF_VER) -mkdir -pv /usr/share/u-boot/nanopi_r2c @@ -151,7 +149,7 @@ $(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) cd $(DIR_APP) && sed -i -e 's!^CONFIG_BOOTCOMMAND=.*!CONFIG_BOOTCOMMAND="console=ttyS2,115200n8;run distro_bootcmd"!' .config cd $(DIR_APP) && sed -i -e 's!^CONFIG_BAUDRATE=.*!CONFIG_BAUDRATE=115200!' .config cd $(DIR_APP) && sed -i -e 's!.*CONFIG_ENV_OVERWRITE.*!CONFIG_ENV_OVERWRITE=y!' .config - cd $(DIR_APP) && make CROSS_COMPILE="" HOSTCC="gcc $(CFLAGS)" + cd $(DIR_APP) && make BL31=$(DIR_APP)/bl31.elf CROSS_COMPILE="" HOSTCC="gcc $(CFLAGS)" cd $(DIR_APP) && install -v -m 644 u-boot-rockchip.bin \ /usr/share/u-boot/nanopi_r2c/u-boot-rockchip.bin cd $(DIR_APP) && make distclean @@ -159,7 +157,7 @@ $(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) # Orangepi R1 plus lts cd $(DIR_APP) && rm -rf arm-trusted-firmware-$(ATF_VER) cd $(DIR_APP) && tar axf $(DIR_DL)/arm-trusted-firmware-$(ATF_VER).tar.gz - cd $(DIR_APP)/arm-trusted-firmware-$(ATF_VER) && make PLAT=rk3328 ARCH=aarch64 DEBUG=0 bl31 LDFLAGS="$(LDFLAGS)" + cd $(DIR_APP)/arm-trusted-firmware-$(ATF_VER) && make PLAT=rk3328 ARCH=aarch64 CROSS_COMPILE="aarch64-pc-linux-gnu-" DEBUG=0 bl31 cd $(DIR_APP) && cp arm-trusted-firmware-$(ATF_VER)/build/rk3328/release/bl31/bl31.elf bl31.elf cd $(DIR_APP) && rm -rf arm-trusted-firmware-$(ATF_VER) -mkdir -pv /usr/share/u-boot/orangepi_r1_plus_lts @@ -169,7 +167,7 @@ $(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) cd $(DIR_APP) && sed -i -e 's!^CONFIG_BOOTCOMMAND=.*!CONFIG_BOOTCOMMAND="console=ttyS2,115200n8;run distro_bootcmd"!' .config cd $(DIR_APP) && sed -i -e 's!^CONFIG_BAUDRATE=.*!CONFIG_BAUDRATE=115200!' .config cd $(DIR_APP) && sed -i -e 's!.*CONFIG_ENV_OVERWRITE.*!CONFIG_ENV_OVERWRITE=y!' .config - cd $(DIR_APP) && make CROSS_COMPILE="" HOSTCC="gcc $(CFLAGS)" + cd $(DIR_APP) && make BL31=$(DIR_APP)/bl31.elf CROSS_COMPILE="" HOSTCC="gcc $(CFLAGS)" cd $(DIR_APP) && install -v -m 644 u-boot-rockchip.bin \ /usr/share/u-boot/orangepi_r1_plus_lts/u-boot-rockchip.bin cd $(DIR_APP) && make distclean @@ -179,12 +177,12 @@ $(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) # it is build on ubuntu with make PLAT=rk3399 ARCH=aarch64 DEBUG=0 bl31 cd $(DIR_APP) && tar axf $(DIR_DL)/arm-trusted-firmware-$(ATF_VER)-rk3399-binary.tar.xz -mkdir -pv /usr/share/u-boot/nanopi_r4s - cd $(DIR_APP) && make CROSS_COMPILE="" nanopi-r4s-rk3399_config + cd $(DIR_APP) && make BL31=$(DIR_APP)/bl31.elf CROSS_COMPILE="" nanopi-r4s-rk3399_config cd $(DIR_APP) && sed -i -e 's!^CONFIG_IDENT_STRING=.*!CONFIG_IDENT_STRING=" Nanopi R4S - IPFire.org"!' .config cd $(DIR_APP) && sed -i -e 's!^CONFIG_BOOTCOMMAND=.*!CONFIG_BOOTCOMMAND="console=ttyS2,115200n8;run distro_bootcmd"!' .config cd $(DIR_APP) && sed -i -e 's!^CONFIG_BAUDRATE=.*!CONFIG_BAUDRATE=115200!' .config cd $(DIR_APP) && sed -i -e 's!.*CONFIG_ENV_OVERWRITE.*!CONFIG_ENV_OVERWRITE=y!' .config - cd $(DIR_APP) && make CROSS_COMPILE="" HOSTCC="gcc $(CFLAGS)" + cd $(DIR_APP) && make BL31=$(DIR_APP)/bl31.elf CROSS_COMPILE="" HOSTCC="gcc $(CFLAGS)" cd $(DIR_APP) && install -v -m 644 u-boot-rockchip.bin \ /usr/share/u-boot/nanopi_r4s/u-boot-rockchip.bin cd $(DIR_APP) && make distclean diff --git a/src/patches/u-boot/rockchip/add-nanopi-r2c-and-orangepi-r1-plus-lts.patch b/src/patches/u-boot/rockchip/add-nanopi-r2c-and-orangepi-r1-plus-lts.patch deleted file mode 100644 index 99712be038..0000000000 --- a/src/patches/u-boot/rockchip/add-nanopi-r2c-and-orangepi-r1-plus-lts.patch +++ /dev/null @@ -1,313 +0,0 @@ -diff -Naur u-boot-2022.10.org/arch/arm/dts/Makefile u-boot-2022.10/arch/arm/dts/Makefile ---- u-boot-2022.10.org/arch/arm/dts/Makefile 2022-10-03 19:25:32.000000000 +0000 -+++ u-boot-2022.10/arch/arm/dts/Makefile 2023-04-27 16:16:35.697116372 +0000 -@@ -124,7 +124,9 @@ - - dtb-$(CONFIG_ROCKCHIP_RK3328) += \ - rk3328-evb.dtb \ -+ rk3328-nanopi-r2c.dtb \ - rk3328-nanopi-r2s.dtb \ -+ rk3328-orangepi-r1-plus-lts.dtb \ - rk3328-roc-cc.dtb \ - rk3328-rock64.dtb \ - rk3328-rock-pi-e.dtb -diff -Naur u-boot-2022.10.org/arch/arm/dts/rk3328-nanopi-r2c-u-boot.dtsi u-boot-2022.10/arch/arm/dts/rk3328-nanopi-r2c-u-boot.dtsi ---- u-boot-2022.10.org/arch/arm/dts/rk3328-nanopi-r2c-u-boot.dtsi 1970-01-01 00:00:00.000000000 +0000 -+++ u-boot-2022.10/arch/arm/dts/rk3328-nanopi-r2c-u-boot.dtsi 2023-04-22 15:07:54.544953841 +0000 -@@ -0,0 +1,7 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd. -+ * (http://www.friendlyarm.com) -+ */ -+ -+#include "rk3328-nanopi-r2s-u-boot.dtsi" -diff -Naur u-boot-2022.10.org/arch/arm/dts/rk3328-nanopi-r2c.dts u-boot-2022.10/arch/arm/dts/rk3328-nanopi-r2c.dts ---- u-boot-2022.10.org/arch/arm/dts/rk3328-nanopi-r2c.dts 1970-01-01 00:00:00.000000000 +0000 -+++ u-boot-2022.10/arch/arm/dts/rk3328-nanopi-r2c.dts 2023-04-22 15:07:07.861614679 +0000 -@@ -0,0 +1,27 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd. -+ * (http://www.friendlyarm.com) -+ */ -+ -+/dts-v1/; -+#include "rk3328-nanopi-r2s.dts" -+ -+/ { -+ model = "FriendlyElec NanoPi R2C"; -+ compatible = "friendlyarm,nanopi-r2c", "rockchip,rk3328"; -+}; -+ -+&emmc { -+ bus-width = <8>; -+ cap-mmc-highspeed; -+ max-frequency = <150000000>; -+ mmc-ddr-1_8v; -+ mmc-hs200-1_8v; -+ non-removable; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; -+ vmmc-supply = <&vcc_io_33>; -+ vqmmc-supply = <&vcc18_emmc>; -+ status = "okay"; -+}; -diff -Naur u-boot-2022.10.org/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi u-boot-2022.10/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi ---- u-boot-2022.10.org/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi 1970-01-01 00:00:00.000000000 +0000 -+++ u-boot-2022.10/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi 2023-04-27 16:12:50.320850145 +0000 -@@ -0,0 +1,6 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ */ -+ -+#include "rk3328-nanopi-r2s-u-boot.dtsi" -+#include "rk3328-sdram-lpddr3-666.dtsi" -diff -Naur u-boot-2022.10.org/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts u-boot-2022.10/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts ---- u-boot-2022.10.org/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts 1970-01-01 00:00:00.000000000 +0000 -+++ u-boot-2022.10/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts 2023-04-27 16:14:56.582755127 +0000 -@@ -0,0 +1,12 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ */ -+ -+/dts-v1/; -+#include "rk3328-nanopi-r2s.dts" -+ -+/ { -+ model = "Xunlong Orange Pi R1 Plus"; -+ compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; -+}; -+ -diff -Naur u-boot-2022.10.org/configs/nanopi-r2c-rk3328_defconfig u-boot-2022.10/configs/nanopi-r2c-rk3328_defconfig ---- u-boot-2022.10.org/configs/nanopi-r2c-rk3328_defconfig 1970-01-01 00:00:00.000000000 +0000 -+++ u-boot-2022.10/configs/nanopi-r2c-rk3328_defconfig 2023-04-22 15:09:20.843584447 +0000 -@@ -0,0 +1,112 @@ -+CONFIG_ARM=y -+CONFIG_SKIP_LOWLEVEL_INIT=y -+CONFIG_COUNTER_FREQUENCY=24000000 -+CONFIG_ARCH_ROCKCHIP=y -+CONFIG_SYS_TEXT_BASE=0x00200000 -+CONFIG_SPL_GPIO=y -+CONFIG_NR_DRAM_BANKS=1 -+CONFIG_ENV_OFFSET=0x3F8000 -+CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2c" -+CONFIG_ROCKCHIP_RK3328=y -+CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y -+CONFIG_TPL_LIBCOMMON_SUPPORT=y -+CONFIG_TPL_LIBGENERIC_SUPPORT=y -+CONFIG_SPL_DRIVERS_MISC=y -+CONFIG_SPL_STACK_R_ADDR=0x600000 -+CONFIG_DEBUG_UART_BASE=0xFF130000 -+CONFIG_DEBUG_UART_CLOCK=24000000 -+CONFIG_SYS_LOAD_ADDR=0x800800 -+CONFIG_DEBUG_UART=y -+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 -+CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 -+# CONFIG_ANDROID_BOOT_IMAGE is not set -+CONFIG_FIT=y -+CONFIG_FIT_VERBOSE=y -+CONFIG_SPL_LOAD_FIT=y -+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2c.dtb" -+# CONFIG_DISPLAY_CPUINFO is not set -+CONFIG_DISPLAY_BOARDINFO_LATE=y -+CONFIG_MISC_INIT_R=y -+CONFIG_SPL_MAX_SIZE=0x40000 -+CONFIG_SPL_PAD_TO=0x7f8000 -+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -+CONFIG_SPL_BSS_START_ADDR=0x2000000 -+CONFIG_SPL_BSS_MAX_SIZE=0x2000 -+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -+CONFIG_SPL_STACK=0x400000 -+CONFIG_SPL_STACK_R=y -+CONFIG_SPL_I2C=y -+CONFIG_SPL_POWER=y -+CONFIG_SPL_ATF=y -+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y -+CONFIG_TPL_SYS_MALLOC_SIMPLE=y -+CONFIG_CMD_BOOTZ=y -+CONFIG_CMD_GPT=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_USB=y -+# CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_TIME=y -+CONFIG_SPL_OF_CONTROL=y -+CONFIG_TPL_OF_CONTROL=y -+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" -+CONFIG_TPL_OF_PLATDATA=y -+CONFIG_ENV_IS_IN_MMC=y -+CONFIG_SYS_RELOC_GD_ENV_ADDR=y -+CONFIG_SYS_MMC_ENV_DEV=1 -+CONFIG_NET_RANDOM_ETHADDR=y -+CONFIG_TPL_DM=y -+CONFIG_REGMAP=y -+CONFIG_SPL_REGMAP=y -+CONFIG_TPL_REGMAP=y -+CONFIG_SYSCON=y -+CONFIG_SPL_SYSCON=y -+CONFIG_TPL_SYSCON=y -+CONFIG_CLK=y -+CONFIG_SPL_CLK=y -+CONFIG_FASTBOOT_BUF_ADDR=0x800800 -+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y -+CONFIG_ROCKCHIP_GPIO=y -+CONFIG_SYS_I2C_ROCKCHIP=y -+CONFIG_MMC_DW=y -+CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_SF_DEFAULT_SPEED=20000000 -+CONFIG_ETH_DESIGNWARE=y -+CONFIG_GMAC_ROCKCHIP=y -+CONFIG_PINCTRL=y -+CONFIG_SPL_PINCTRL=y -+CONFIG_DM_PMIC=y -+CONFIG_PMIC_RK8XX=y -+CONFIG_SPL_PMIC_RK8XX=y -+CONFIG_SPL_DM_REGULATOR=y -+CONFIG_REGULATOR_PWM=y -+CONFIG_DM_REGULATOR_FIXED=y -+CONFIG_SPL_DM_REGULATOR_FIXED=y -+CONFIG_REGULATOR_RK8XX=y -+CONFIG_PWM_ROCKCHIP=y -+CONFIG_RAM=y -+CONFIG_SPL_RAM=y -+CONFIG_TPL_RAM=y -+CONFIG_DM_RESET=y -+CONFIG_BAUDRATE=1500000 -+CONFIG_DEBUG_UART_SHIFT=2 -+CONFIG_SYSINFO=y -+CONFIG_SYSRESET=y -+# CONFIG_TPL_SYSRESET is not set -+CONFIG_USB=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_XHCI_DWC3=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_EHCI_GENERIC=y -+CONFIG_USB_OHCI_HCD=y -+CONFIG_USB_OHCI_GENERIC=y -+CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 -+CONFIG_USB_DWC2=y -+CONFIG_USB_DWC3=y -+# CONFIG_USB_DWC3_GADGET is not set -+CONFIG_USB_GADGET=y -+CONFIG_USB_GADGET_DWC2_OTG=y -+CONFIG_SPL_TINY_MEMSET=y -+CONFIG_TPL_TINY_MEMSET=y -+CONFIG_ERRNO_STR=y -diff -Naur u-boot-2022.10.org/configs/orangepi-r1-plus-lts-rk3328_defconfig u-boot-2022.10/configs/orangepi-r1-plus-lts-rk3328_defconfig ---- u-boot-2022.10.org/configs/orangepi-r1-plus-lts-rk3328_defconfig 1970-01-01 00:00:00.000000000 +0000 -+++ u-boot-2022.10/configs/orangepi-r1-plus-lts-rk3328_defconfig 2023-04-27 16:19:41.122065498 +0000 -@@ -0,0 +1,112 @@ -+CONFIG_ARM=y -+CONFIG_SKIP_LOWLEVEL_INIT=y -+CONFIG_COUNTER_FREQUENCY=24000000 -+CONFIG_ARCH_ROCKCHIP=y -+CONFIG_SYS_TEXT_BASE=0x00200000 -+CONFIG_SPL_GPIO=y -+CONFIG_NR_DRAM_BANKS=1 -+CONFIG_ENV_OFFSET=0x3F8000 -+CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus-lts" -+CONFIG_ROCKCHIP_RK3328=y -+CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y -+CONFIG_TPL_LIBCOMMON_SUPPORT=y -+CONFIG_TPL_LIBGENERIC_SUPPORT=y -+CONFIG_SPL_DRIVERS_MISC=y -+CONFIG_SPL_STACK_R_ADDR=0x600000 -+CONFIG_DEBUG_UART_BASE=0xFF130000 -+CONFIG_DEBUG_UART_CLOCK=24000000 -+CONFIG_SYS_LOAD_ADDR=0x800800 -+CONFIG_DEBUG_UART=y -+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 -+CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 -+# CONFIG_ANDROID_BOOT_IMAGE is not set -+CONFIG_FIT=y -+CONFIG_FIT_VERBOSE=y -+CONFIG_SPL_LOAD_FIT=y -+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus-lts.dtb" -+# CONFIG_DISPLAY_CPUINFO is not set -+CONFIG_DISPLAY_BOARDINFO_LATE=y -+CONFIG_MISC_INIT_R=y -+CONFIG_SPL_MAX_SIZE=0x40000 -+CONFIG_SPL_PAD_TO=0x7f8000 -+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -+CONFIG_SPL_BSS_START_ADDR=0x2000000 -+CONFIG_SPL_BSS_MAX_SIZE=0x2000 -+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -+CONFIG_SPL_STACK=0x400000 -+CONFIG_SPL_STACK_R=y -+CONFIG_SPL_I2C=y -+CONFIG_SPL_POWER=y -+CONFIG_SPL_ATF=y -+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y -+CONFIG_TPL_SYS_MALLOC_SIMPLE=y -+CONFIG_CMD_BOOTZ=y -+CONFIG_CMD_GPT=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_USB=y -+# CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_TIME=y -+CONFIG_SPL_OF_CONTROL=y -+CONFIG_TPL_OF_CONTROL=y -+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" -+CONFIG_TPL_OF_PLATDATA=y -+CONFIG_ENV_IS_IN_MMC=y -+CONFIG_SYS_RELOC_GD_ENV_ADDR=y -+CONFIG_SYS_MMC_ENV_DEV=1 -+CONFIG_NET_RANDOM_ETHADDR=y -+CONFIG_TPL_DM=y -+CONFIG_REGMAP=y -+CONFIG_SPL_REGMAP=y -+CONFIG_TPL_REGMAP=y -+CONFIG_SYSCON=y -+CONFIG_SPL_SYSCON=y -+CONFIG_TPL_SYSCON=y -+CONFIG_CLK=y -+CONFIG_SPL_CLK=y -+CONFIG_FASTBOOT_BUF_ADDR=0x800800 -+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y -+CONFIG_ROCKCHIP_GPIO=y -+CONFIG_SYS_I2C_ROCKCHIP=y -+CONFIG_MMC_DW=y -+CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_SF_DEFAULT_SPEED=20000000 -+CONFIG_ETH_DESIGNWARE=y -+CONFIG_GMAC_ROCKCHIP=y -+CONFIG_PINCTRL=y -+CONFIG_SPL_PINCTRL=y -+CONFIG_DM_PMIC=y -+CONFIG_PMIC_RK8XX=y -+CONFIG_SPL_PMIC_RK8XX=y -+CONFIG_SPL_DM_REGULATOR=y -+CONFIG_REGULATOR_PWM=y -+CONFIG_DM_REGULATOR_FIXED=y -+CONFIG_SPL_DM_REGULATOR_FIXED=y -+CONFIG_REGULATOR_RK8XX=y -+CONFIG_PWM_ROCKCHIP=y -+CONFIG_RAM=y -+CONFIG_SPL_RAM=y -+CONFIG_TPL_RAM=y -+CONFIG_DM_RESET=y -+CONFIG_BAUDRATE=1500000 -+CONFIG_DEBUG_UART_SHIFT=2 -+CONFIG_SYSINFO=y -+CONFIG_SYSRESET=y -+# CONFIG_TPL_SYSRESET is not set -+CONFIG_USB=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_XHCI_DWC3=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_EHCI_GENERIC=y -+CONFIG_USB_OHCI_HCD=y -+CONFIG_USB_OHCI_GENERIC=y -+CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 -+CONFIG_USB_DWC2=y -+CONFIG_USB_DWC3=y -+# CONFIG_USB_DWC3_GADGET is not set -+CONFIG_USB_GADGET=y -+CONFIG_USB_GADGET_DWC2_OTG=y -+CONFIG_SPL_TINY_MEMSET=y -+CONFIG_TPL_TINY_MEMSET=y -+CONFIG_ERRNO_STR=y diff --git a/src/patches/u-boot/sunxi/nanopi-r1-add-mac.diff b/src/patches/u-boot/sunxi/nanopi-r1-add-mac.diff deleted file mode 100644 index 70cf4a6e4a..0000000000 --- a/src/patches/u-boot/sunxi/nanopi-r1-add-mac.diff +++ /dev/null @@ -1,15 +0,0 @@ -diff -Naur u-boot-1ee53f5cff60d4daf9e5b49873932c454d53383a.org/arch/arm/dts/sun8i-h3-nanopi-r1.dts u-boot-1ee53f5cff60d4daf9e5b49873932c454d53383a/arch/arm/dts/sun8i-h3-nanopi-r1.dts ---- u-boot-1ee53f5cff60d4daf9e5b49873932c454d53383a.org/arch/arm/dts/sun8i-h3-nanopi-r1.dts 2019-08-05 09:02:22.211159367 +0000 -+++ u-boot-1ee53f5cff60d4daf9e5b49873932c454d53383a/arch/arm/dts/sun8i-h3-nanopi-r1.dts 2019-08-05 09:05:25.745207373 +0000 -@@ -46,6 +46,11 @@ - model = "FriendlyElec NanoPi H3"; - compatible = "friendlyarm,nanopi-m1-plus", "allwinner,sun8i-h3"; - -+ aliases { -+ /* entry to generate a second mac address for the realtek -+ u-boot ignore that it point to wrong device */ -+ ethernet1 = &emac; -+ }; - - reg_gmac_3v3: gmac-3v3 { - compatible = "regulator-fixed"; diff --git a/src/patches/u-boot/sunxi/orangepi-zero-add-macs.diff b/src/patches/u-boot/sunxi/orangepi-zero-add-macs.diff deleted file mode 100644 index d0995f2938..0000000000 --- a/src/patches/u-boot/sunxi/orangepi-zero-add-macs.diff +++ /dev/null @@ -1,12 +0,0 @@ -diff -Naur org/sun8i-h2-plus-orangepi-zero.dts new/sun8i-h2-plus-orangepi-zero.dts ---- org/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts 2018-01-09 01:25:29.000000000 +0000 -+++ new/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts 2018-03-09 16:32:32.233836000 +0000 -@@ -59,6 +59,8 @@ - serial0 = &uart0; - /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ - ethernet1 = &xr819; -+ ethernet2 = &xr819; -+ //ethernet3 = &xr819; - }; - - chosen { -- 2.39.5