From cacd8fb08d3f992ef9cdf4c26a2d28ced409cfd4 Mon Sep 17 00:00:00 2001 From: Nabih Estefan Date: Tue, 4 Nov 2025 23:37:42 +0000 Subject: [PATCH] hw/arm/ast27x0: Fix typo in LTPI address MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit The address for LTPI has one more 0 that it should, bug introduced in commit 91064bea6b2d747a981cb3bd2904e56f443e6c67. Signed-off-by: Nabih Estefan Fixes: 91064bea6b2d ("aspeed: ast27x0: Map unimplemented devices in SoC memory") Reviewed-by: Cédric Le Goater Link: https://lore.kernel.org/qemu-devel/20251104233742.2147367-1-nabihestefan@google.com Signed-off-by: Cédric Le Goater --- hw/arm/aspeed_ast27x0.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c index c484bcd4e2..1e6f469538 100644 --- a/hw/arm/aspeed_ast27x0.c +++ b/hw/arm/aspeed_ast27x0.c @@ -87,11 +87,11 @@ static const hwaddr aspeed_soc_ast2700_memmap[] = { [ASPEED_DEV_UART11] = 0x14C33A00, [ASPEED_DEV_UART12] = 0x14C33B00, [ASPEED_DEV_WDT] = 0x14C37000, + [ASPEED_DEV_LTPI] = 0x30000000, [ASPEED_DEV_PCIE_MMIO0] = 0x60000000, [ASPEED_DEV_PCIE_MMIO1] = 0x80000000, [ASPEED_DEV_PCIE_MMIO2] = 0xA0000000, [ASPEED_DEV_SPI_BOOT] = 0x100000000, - [ASPEED_DEV_LTPI] = 0x300000000, [ASPEED_DEV_SDRAM] = 0x400000000, }; -- 2.47.3