From cc1f4b34d011e908dcaf24721f1d5808e02ab0bd Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Thu, 8 May 2025 10:29:42 +0200 Subject: [PATCH] rust: pl011: Rename RX FIFO methods MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit In preparation of having a TX FIFO, rename the RX FIFO methods. This is the Rust version of commit 40871ca758cf ("hw/char/pl011: Rename RX FIFO methods"). Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Signed-off-by: Paolo Bonzini --- rust/hw/char/pl011/src/device.rs | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/rust/hw/char/pl011/src/device.rs b/rust/hw/char/pl011/src/device.rs index 7c563ade9c..94b3165984 100644 --- a/rust/hw/char/pl011/src/device.rs +++ b/rust/hw/char/pl011/src/device.rs @@ -329,7 +329,7 @@ impl PL011Registers { // hardware flow-control is enabled. // // For simplicity, the above described is not emulated. - self.loopback_enabled() && self.put_fifo(value) + self.loopback_enabled() && self.fifo_rx_put(value) } #[must_use] @@ -439,7 +439,7 @@ impl PL011Registers { } #[must_use] - pub fn put_fifo(&mut self, value: registers::Data) -> bool { + pub fn fifo_rx_put(&mut self, value: registers::Data) -> bool { let depth = self.fifo_depth(); assert!(depth > 0); let slot = (self.read_pos + self.read_count) & (depth - 1); @@ -589,7 +589,7 @@ impl PL011State { } let mut regs = self.regs.borrow_mut(); let c: u32 = buf[0].into(); - let update_irq = !regs.loopback_enabled() && regs.put_fifo(c.into()); + let update_irq = !regs.loopback_enabled() && regs.fifo_rx_put(c.into()); // Release the BqlRefCell before calling self.update() drop(regs); @@ -602,7 +602,7 @@ impl PL011State { let mut update_irq = false; let mut regs = self.regs.borrow_mut(); if event == Event::CHR_EVENT_BREAK && !regs.loopback_enabled() { - update_irq = regs.put_fifo(registers::Data::BREAK); + update_irq = regs.fifo_rx_put(registers::Data::BREAK); } // Release the BqlRefCell before calling self.update() drop(regs); -- 2.39.5