From cc7df0b9e8bcc63f06db83e7e44e6b214cc30e1d Mon Sep 17 00:00:00 2001 From: Ye Li Date: Tue, 25 Jul 2023 10:08:55 +0200 Subject: [PATCH] serial: lpuart: Enable IPG clock MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Current codes only ennable the PER clock. However on iMX8 the LPUART also needs IPG clock which is an LPCG. Should not depend on the default LPCG setting. Signed-off-by: Ye Li Reviewed-by: Peng Fan Signed-off-by: Sébastien Szymanski --- drivers/serial/serial_lpuart.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c index 51e66abdbc1..ce08a6b4486 100644 --- a/drivers/serial/serial_lpuart.c +++ b/drivers/serial/serial_lpuart.c @@ -480,18 +480,30 @@ static int lpuart_serial_probe(struct udevice *dev) { #if CONFIG_IS_ENABLED(CLK) struct clk per_clk; + struct clk ipg_clk; int ret; ret = clk_get_by_name(dev, "per", &per_clk); if (!ret) { ret = clk_enable(&per_clk); if (ret) { - dev_err(dev, "Failed to get per clk: %d\n", ret); + dev_err(dev, "Failed to enable per clk: %d\n", ret); return ret; } } else { debug("%s: Failed to get per clk: %d\n", __func__, ret); } + + ret = clk_get_by_name(dev, "ipg", &ipg_clk); + if (!ret) { + ret = clk_enable(&ipg_clk); + if (ret) { + dev_err(dev, "Failed to enable ipg clk: %d\n", ret); + return ret; + } + } else { + debug("%s: Failed to get ipg clk: %d\n", __func__, ret); + } #endif if (is_lpuart32(dev)) -- 2.39.2