From d35146a6606cf6ebb4e24bb97dfc0330f074f6e3 Mon Sep 17 00:00:00 2001 From: Shameer Kolothum Date: Fri, 29 Aug 2025 09:25:33 +0100 Subject: [PATCH] qtest/bios-tables-test: Update tables for smmuv3 tests For the legacy smmuv3 test case, generated IORT has a single SMMUv3 node, a Root Complex(RC) node and 1 ITS node. RC node features 4 ID mappings, of which 2 points to SMMU node and the remaining ones points to ITS. pcie.0 -> {SMMU0} -> {ITS} {RC} pcie.1 -> {SMMU0} -> {ITS} pcie.2 -> {ITS} [all other ids] -> {ITS} ... [030h 0048 1] Type : 00 [031h 0049 2] Length : 0018 [033h 0051 1] Revision : 01 [034h 0052 4] Identifier : 00000000 [038h 0056 4] Mapping Count : 00000000 [03Ch 0060 4] Mapping Offset : 00000000 [040h 0064 4] ItsCount : 00000001 [044h 0068 4] Identifiers : 00000000 [048h 0072 1] Type : 04 [049h 0073 2] Length : 0058 [04Bh 0075 1] Revision : 04 [04Ch 0076 4] Identifier : 00000001 [050h 0080 4] Mapping Count : 00000001 [054h 0084 4] Mapping Offset : 00000044 [058h 0088 8] Base Address : 0000000009050000 [060h 0096 4] Flags (decoded below) : 00000001 COHACC Override : 1 HTTU Override : 0 Proximity Domain Valid : 0 [064h 0100 4] Reserved : 00000000 [068h 0104 8] VATOS Address : 0000000000000000 [070h 0112 4] Model : 00000000 [074h 0116 4] Event GSIV : 0000006A [078h 0120 4] PRI GSIV : 0000006B [07Ch 0124 4] GERR GSIV : 0000006D [080h 0128 4] Sync GSIV : 0000006C [084h 0132 4] Proximity Domain : 00000000 [088h 0136 4] Device ID Mapping Index : 00000000 [08Ch 0140 4] Input base : 00000000 [090h 0144 4] ID Count : 0000FFFF [094h 0148 4] Output Base : 00000000 [098h 0152 4] Output Reference : 00000030 [09Ch 0156 4] Flags (decoded below) : 00000000 Single Mapping : 0 [0A0h 0160 1] Type : 02 [0A1h 0161 2] Length : 0074 [0A3h 0163 1] Revision : 03 [0A4h 0164 4] Identifier : 00000002 [0A8h 0168 4] Mapping Count : 00000004 [0ACh 0172 4] Mapping Offset : 00000024 [0B0h 0176 8] Memory Properties : [IORT Memory Access Properties] [0B0h 0176 4] Cache Coherency : 00000001 [0B4h 0180 1] Hints (decoded below) : 00 Transient : 0 Write Allocate : 0 Read Allocate : 0 Override : 0 [0B5h 0181 2] Reserved : 0000 [0B7h 0183 1] Memory Flags (decoded below) : 03 Coherency : 1 Device Attribute : 1 [0B8h 0184 4] ATS Attribute : 00000000 [0BCh 0188 4] PCI Segment Number : 00000000 [0C0h 0192 1] Memory Size Limit : 40 [0C1h 0193 2] PASID Capabilities : 0000 [0C3h 0195 1] Reserved : 00 [0C4h 0196 4] Input base : 00000000 [0C8h 0200 4] ID Count : 000001FF [0CCh 0204 4] Output Base : 00000000 [0D0h 0208 4] Output Reference : 00000048 [0D4h 0212 4] Flags (decoded below) : 00000000 Single Mapping : 0 [0D8h 0216 4] Input base : 00001000 [0DCh 0220 4] ID Count : 000000FF [0E0h 0224 4] Output Base : 00001000 [0E4h 0228 4] Output Reference : 00000048 [0E8h 0232 4] Flags (decoded below) : 00000000 Single Mapping : 0 [0ECh 0236 4] Input base : 00000200 [0F0h 0240 4] ID Count : 00000DFF [0F4h 0244 4] Output Base : 00000200 [0F8h 0248 4] Output Reference : 00000030 [0FCh 0252 4] Flags (decoded below) : 00000000 Single Mapping : 0 [100h 0256 4] Input base : 00001100 [104h 0260 4] ID Count : 0000EEFF [108h 0264 4] Output Base : 00001100 [10Ch 0268 4] Output Reference : 00000030 [110h 0272 4] Flags (decoded below) : 00000000 Single Mapping : 0 For the smmuv3-dev test case, IORT has 2 SMMUV3 nodes, 1 RC node and 1 ITS node. RC node features 4 ID mappings. 2 of them target the 2 SMMU nodes while the others targets the ITS. pcie.0 -> {SMMU0} -> {ITS} {RC} pcie.1 -> {SMMU1} -> {ITS} pcie.2 -> {ITS} [all other ids] -> {ITS} ... [030h 0048 1] Type : 00 [031h 0049 2] Length : 0018 [033h 0051 1] Revision : 01 [034h 0052 4] Identifier : 00000000 [038h 0056 4] Mapping Count : 00000000 [03Ch 0060 4] Mapping Offset : 00000000 [040h 0064 4] ItsCount : 00000001 [044h 0068 4] Identifiers : 00000000 [048h 0072 1] Type : 04 [049h 0073 2] Length : 0058 [04Bh 0075 1] Revision : 04 [04Ch 0076 4] Identifier : 00000001 [050h 0080 4] Mapping Count : 00000001 [054h 0084 4] Mapping Offset : 00000044 [058h 0088 8] Base Address : 000000000C000000 [060h 0096 4] Flags (decoded below) : 00000001 COHACC Override : 1 HTTU Override : 0 Proximity Domain Valid : 0 [064h 0100 4] Reserved : 00000000 [068h 0104 8] VATOS Address : 0000000000000000 [070h 0112 4] Model : 00000000 [074h 0116 4] Event GSIV : 00000090 [078h 0120 4] PRI GSIV : 00000091 [07Ch 0124 4] GERR GSIV : 00000093 [080h 0128 4] Sync GSIV : 00000092 [084h 0132 4] Proximity Domain : 00000000 [088h 0136 4] Device ID Mapping Index : 00000000 [08Ch 0140 4] Input base : 00000000 [090h 0144 4] ID Count : 0000FFFF [094h 0148 4] Output Base : 00000000 [098h 0152 4] Output Reference : 00000030 [09Ch 0156 4] Flags (decoded below) : 00000000 Single Mapping : 0 [0A0h 0160 1] Type : 04 [0A1h 0161 2] Length : 0058 [0A3h 0163 1] Revision : 04 [0A4h 0164 4] Identifier : 00000002 [0A8h 0168 4] Mapping Count : 00000001 [0ACh 0172 4] Mapping Offset : 00000044 [0B0h 0176 8] Base Address : 000000000C020000 [0B8h 0184 4] Flags (decoded below) : 00000001 COHACC Override : 1 HTTU Override : 0 Proximity Domain Valid : 0 [0BCh 0188 4] Reserved : 00000000 [0C0h 0192 8] VATOS Address : 0000000000000000 [0C8h 0200 4] Model : 00000000 [0CCh 0204 4] Event GSIV : 00000094 [0D0h 0208 4] PRI GSIV : 00000095 [0D4h 0212 4] GERR GSIV : 00000097 [0D8h 0216 4] Sync GSIV : 00000096 [0DCh 0220 4] Proximity Domain : 00000000 [0E0h 0224 4] Device ID Mapping Index : 00000000 [0E4h 0228 4] Input base : 00000000 [0E8h 0232 4] ID Count : 0000FFFF [0ECh 0236 4] Output Base : 00000000 [0F0h 0240 4] Output Reference : 00000030 [0F4h 0244 4] Flags (decoded below) : 00000000 Single Mapping : 0 [0F8h 0248 1] Type : 02 [0F9h 0249 2] Length : 0074 [0FBh 0251 1] Revision : 03 [0FCh 0252 4] Identifier : 00000003 [100h 0256 4] Mapping Count : 00000004 [104h 0260 4] Mapping Offset : 00000024 [108h 0264 8] Memory Properties : [IORT Memory Access Properties] [108h 0264 4] Cache Coherency : 00000001 [10Ch 0268 1] Hints (decoded below) : 00 Transient : 0 Write Allocate : 0 Read Allocate : 0 Override : 0 [10Dh 0269 2] Reserved : 0000 [10Fh 0271 1] Memory Flags (decoded below) : 03 Coherency : 1 Device Attribute : 1 [110h 0272 4] ATS Attribute : 00000000 [114h 0276 4] PCI Segment Number : 00000000 [118h 0280 1] Memory Size Limit : 40 [119h 0281 2] PASID Capabilities : 0000 [11Bh 0283 1] Reserved : 00 [11Ch 0284 4] Input base : 00000000 [120h 0288 4] ID Count : 000001FF [124h 0292 4] Output Base : 00000000 [128h 0296 4] Output Reference : 00000048 [12Ch 0300 4] Flags (decoded below) : 00000000 Single Mapping : 0 [130h 0304 4] Input base : 00001000 [134h 0308 4] ID Count : 000000FF [138h 0312 4] Output Base : 00001000 [13Ch 0316 4] Output Reference : 000000A0 [140h 0320 4] Flags (decoded below) : 00000000 Single Mapping : 0 [144h 0324 4] Input base : 00000200 [148h 0328 4] ID Count : 00000DFF [14Ch 0332 4] Output Base : 00000200 [150h 0336 4] Output Reference : 00000030 [154h 0340 4] Flags (decoded below) : 00000000 Single Mapping : 0 [158h 0344 4] Input base : 00001100 [15Ch 0348 4] ID Count : 0000EEFF [160h 0352 4] Output Base : 00001100 [164h 0356 4] Output Reference : 00000030 [168h 0360 4] Flags (decoded below) : 00000000 Single Mapping : 0 Note: DSDT changes are not described here as it is not impacted by the way the SMMUv3 is instantiated. Reviewed-by: Jonathan Cameron Reviewed-by: Eric Auger Tested-by: Eric Auger Tested-by: Nicolin Chen Signed-off-by: Shameer Kolothum Signed-off-by: Shameer Kolothum Reviewed-by: Donald Dutile Reviewed-by: Nicolin Chen Message-id: 20250829082543.7680-12-skolothumtho@nvidia.com Signed-off-by: Peter Maydell --- tests/data/acpi/aarch64/virt/DSDT.smmuv3-dev | Bin 0 -> 10230 bytes tests/data/acpi/aarch64/virt/DSDT.smmuv3-legacy | Bin 0 -> 10230 bytes tests/data/acpi/aarch64/virt/IORT.smmuv3-dev | Bin 0 -> 364 bytes tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy | Bin 0 -> 276 bytes tests/qtest/bios-tables-test-allowed-diff.h | 4 ---- 5 files changed, 4 deletions(-) diff --git a/tests/data/acpi/aarch64/virt/DSDT.smmuv3-dev b/tests/data/acpi/aarch64/virt/DSDT.smmuv3-dev index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..53d4c07f423886d8c4b57f1da6498eef5a08b556 100644 GIT binary patch literal 10230 zc-qz4%Wqq08OQP0m&Eq*CAQ<-oy$O{+^grYd&!iU(!_R~bmGL=ohedAas~vVQx-vt z5EmhJiWo{+(FoQ-${&KniXFRI%!Umc{s7n!&hd$p=R3R-Bb3c}Vf#JjeSasvleh7w zO4@_=!+(Ckx#ZtA_gY(nwast!T5I7W;hc-!N3Z4I{xJE@aIiVtf40~Xk?e45yItI9 z^|r&oEteg>wcU36&u+K&y5n>G?v{w^*}3en)gM$AgSiiLE(*-KvU9(gbcw_(;pnH~ z+Vy*nTKD3$-|TeX3UeFbs=>pJARjJnZ6xA|N>GX;lDYY_l^f}|`{OTZXScr>F1>Ma z+4Geb7Y|(W?BZf0)EANPMI=pxo<(d%5e;8Nko0AwO-93JG`$%qU&f@#XxfbH-i)*_ zBWp6Q+l(9Dj0s;xU@~sljGNw!Nnb|6WZbkFx4an{Uq;Df+_D+#-i)j-qiizPZN_Wf zjGQl{YBF9k8S34oLEy`%nT*>u!@EuSk7S%NYcjrWGyMCs;LDgd8L!(6|2{4HG8Rq7 z8#cqgPfNaxy2-d>GyMB>%9pWXGQMFm{QI=*%UClRcWs7$pH_SspEDU7Hp9P9tGM+Q$dBfKel$PMDs@H0myR{+f(Sq|)GaPMh?gne|1=b<~_A3j)?4kRK`*!%lx9z^` ze(WB*?}V@J+;_eH!|9zL1y8H_bpG_zMc)w@zfVNB)Kv@7`yd(Jl<^=HwQ|*Bx)9EC zE}nNbO2iXO@o2QJc`;1I`J=hX(aOg8C}E~1Jtxs~5;vy7f)^enSynLR7$SwYVVdsf)9ik?;Utg>g7J*Uxg8a=1k zbDBMC=vhP08hh5*a|S(U&~t`8XV`NVJ!jE#mOW?La}GV{&~uJG=h$-|J?GJLo;~N; za{)aU&~t%37ua(VJr~h)kv$jLa|u0{&~u4Bm)Nt8o^|xBvuB+>m(g<>J(t;YnLSs~ za|JzD*mH$FSJ877Jy+Rtb=))l%$^CV&x|8P z9w&YgEgzlJB*DY*M{vuH+}p{e9gb!`pe%3H-6Ur z-P}LA3x95Pk8?-wxsysNk%*pRjOpcJOfL^(dWjg*%fy&|3XGM{|2zDDVN4Ci)M896 z#uOM+U`&ZICB_sOQ(#PqF(t+n7*k+Oi7_R{6c|%rOo=fi#uOM+U`&ZICB_sOQ(#Pq zF(t+n7*k+Oi7_R{6c|%rOo=fi#uOM+U`&ZICB_sOQ(#PqF(t+n7*k+Oi7_R{6c|%r zOo=fi#uOM+U`&ZICB_sOQ(#PqF(t+n7*k+Oi7_R{6c|%rOo=fi#uOM+U`&ZICB_sO zQ(#PqF(t+n7*k+Oi7_R{6c|%rOo=fi#uOM+U`&ZICB_sOQ(#PqF(t+n7*k+Oi7_R{ z6c|%rOo=fi#uOM+U`&ZICB_sOQ(#PqF(t+n7*k+Oi7_R{6c|%rOo=fi#uOM+U`&ZI zCB_sOQ(#PqF(t+n7*k+Oi7_R{)Q7Qh^vkl(B*x_OFeaCWF}XyH$z@^e!OLE2`+s0; z(77Lz?EF4PAX^RUJ=b#EA;Q+2d}@}7VVPK#iDj99WdfE7StewefMo)f30Wp&nSf;i zmI+xVWSM|v0+tC`CS;j_WdfE7StewefMo)f30Wp&nSf;imI+xVWSM|v0+tC`CS;j_ zWdfE7StewefMo)f30Wp&nSf;imI+xVWSM|v0+tC`CS;j_WdfE7StewefMo)f30Wp& znSf;imI+xVWSM|v0+tC`CS;j_WdfE7StewefMo)f30Wp&nSf;imI+xVWSM|v0+tC` zCS;j_WdfE7StewefMo)f30Wp&nSf;imI+xVWSM|v0+tC`CS;j_WdfE7StewefMo)f z30Wp&nSf;imI+xVWSM|v0+tC`CS;j_WdfE7StewefMo)f30Wp&nSf;imI+xVWLb2T zT6x&o+;AtQNMv{857zMGd@B>YKZcrfQzNeZI@~XXgo_{L)6;+7iQk@H3(q79sk1XK z{1}d&??kwJ@fEXX^msa&aT-th#PQD<1-t2fX8;P0ncEEHznYKkZrFSEE{jJBj(=~P zdFNX6*J$@U?VHQD#(XiDSbavKi%frsw z4|9jnAiOh2;T?)>@?q~$e=~Tx|7;<8V;i*25LWKwPIzaE$2Y?}a2S<8 zI9`0|ze^_v$C=+h4w5GahrtKW51b1R)Q{c^GKbZPq$|3E!(TrCfphO3z8jz1f0iGJ igoQWS{qQE#2eKXy3eo=g#M!BV%K6!3eBfew%KZoUnLv2} literal 0 Hc-jL100001 diff --git a/tests/data/acpi/aarch64/virt/DSDT.smmuv3-legacy b/tests/data/acpi/aarch64/virt/DSDT.smmuv3-legacy index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..53d4c07f423886d8c4b57f1da6498eef5a08b556 100644 GIT binary patch literal 10230 zc-qz4%Wqq08OQP0m&Eq*CAQ<-oy$O{+^grYd&!iU(!_R~bmGL=ohedAas~vVQx-vt z5EmhJiWo{+(FoQ-${&KniXFRI%!Umc{s7n!&hd$p=R3R-Bb3c}Vf#JjeSasvleh7w zO4@_=!+(Ckx#ZtA_gY(nwast!T5I7W;hc-!N3Z4I{xJE@aIiVtf40~Xk?e45yItI9 z^|r&oEteg>wcU36&u+K&y5n>G?v{w^*}3en)gM$AgSiiLE(*-KvU9(gbcw_(;pnH~ z+Vy*nTKD3$-|TeX3UeFbs=>pJARjJnZ6xA|N>GX;lDYY_l^f}|`{OTZXScr>F1>Ma z+4Geb7Y|(W?BZf0)EANPMI=pxo<(d%5e;8Nko0AwO-93JG`$%qU&f@#XxfbH-i)*_ zBWp6Q+l(9Dj0s;xU@~sljGNw!Nnb|6WZbkFx4an{Uq;Df+_D+#-i)j-qiizPZN_Wf zjGQl{YBF9k8S34oLEy`%nT*>u!@EuSk7S%NYcjrWGyMCs;LDgd8L!(6|2{4HG8Rq7 z8#cqgPfNaxy2-d>GyMB>%9pWXGQMFm{QI=*%UClRcWs7$pH_SspEDU7Hp9P9tGM+Q$dBfKel$PMDs@H0myR{+f(Sq|)GaPMh?gne|1=b<~_A3j)?4kRK`*!%lx9z^` ze(WB*?}V@J+;_eH!|9zL1y8H_bpG_zMc)w@zfVNB)Kv@7`yd(Jl<^=HwQ|*Bx)9EC zE}nNbO2iXO@o2QJc`;1I`J=hX(aOg8C}E~1Jtxs~5;vy7f)^enSynLR7$SwYVVdsf)9ik?;Utg>g7J*Uxg8a=1k zbDBMC=vhP08hh5*a|S(U&~t`8XV`NVJ!jE#mOW?La}GV{&~uJG=h$-|J?GJLo;~N; za{)aU&~t%37ua(VJr~h)kv$jLa|u0{&~u4Bm)Nt8o^|xBvuB+>m(g<>J(t;YnLSs~ za|JzD*mH$FSJ877Jy+Rtb=))l%$^CV&x|8P z9w&YgEgzlJB*DY*M{vuH+}p{e9gb!`pe%3H-6Ur z-P}LA3x95Pk8?-wxsysNk%*pRjOpcJOfL^(dWjg*%fy&|3XGM{|2zDDVN4Ci)M896 z#uOM+U`&ZICB_sOQ(#PqF(t+n7*k+Oi7_R{6c|%rOo=fi#uOM+U`&ZICB_sOQ(#Pq zF(t+n7*k+Oi7_R{6c|%rOo=fi#uOM+U`&ZICB_sOQ(#PqF(t+n7*k+Oi7_R{6c|%r zOo=fi#uOM+U`&ZICB_sOQ(#PqF(t+n7*k+Oi7_R{6c|%rOo=fi#uOM+U`&ZICB_sO zQ(#PqF(t+n7*k+Oi7_R{6c|%rOo=fi#uOM+U`&ZICB_sOQ(#PqF(t+n7*k+Oi7_R{ z6c|%rOo=fi#uOM+U`&ZICB_sOQ(#PqF(t+n7*k+Oi7_R{6c|%rOo=fi#uOM+U`&ZI zCB_sOQ(#PqF(t+n7*k+Oi7_R{)Q7Qh^vkl(B*x_OFeaCWF}XyH$z@^e!OLE2`+s0; z(77Lz?EF4PAX^RUJ=b#EA;Q+2d}@}7VVPK#iDj99WdfE7StewefMo)f30Wp&nSf;i zmI+xVWSM|v0+tC`CS;j_WdfE7StewefMo)f30Wp&nSf;imI+xVWSM|v0+tC`CS;j_ zWdfE7StewefMo)f30Wp&nSf;imI+xVWSM|v0+tC`CS;j_WdfE7StewefMo)f30Wp& znSf;imI+xVWSM|v0+tC`CS;j_WdfE7StewefMo)f30Wp&nSf;imI+xVWSM|v0+tC` zCS;j_WdfE7StewefMo)f30Wp&nSf;imI+xVWSM|v0+tC`CS;j_WdfE7StewefMo)f z30Wp&nSf;imI+xVWSM|v0+tC`CS;j_WdfE7StewefMo)f30Wp&nSf;imI+xVWLb2T zT6x&o+;AtQNMv{857zMGd@B>YKZcrfQzNeZI@~XXgo_{L)6;+7iQk@H3(q79sk1XK z{1}d&??kwJ@fEXX^msa&aT-th#PQD<1-t2fX8;P0ncEEHznYKkZrFSEE{jJBj(=~P zdFNX6*J$@U?VHQD#(XiDSbavKi%frsw z4|9jnAiOh2;T?)>@?q~$e=~Tx|7;<8V;i*25LWKwPIzaE$2Y?}a2S<8 zI9`0|ze^_v$C=+h4w5GahrtKW51b1R)Q{c^GKbZPq$|3E!(TrCfphO3z8jz1f0iGJ igoQWS{qQE#2eKXy3eo=g#M!BV%K6!3eBfew%KZoUnLv2} literal 0 Hc-jL100001 diff --git a/tests/data/acpi/aarch64/virt/IORT.smmuv3-dev b/tests/data/acpi/aarch64/virt/IORT.smmuv3-dev index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..67be268f62afbf2d9459540984da5e9340afdaaa 100644 GIT binary patch literal 364 zc-r&y4+_a)WME)E<>c?|5v<@85#X!<1VAAM5F13Z0I>lB6i6^IG9UpMhb4l6g%Qek zfe7&+%OiscKs*tMCj;>$G`au(A+!OKxlAbLGT}6L3J^~P;^{yp%f>101?F*0RR91 literal 0 Hc-jL100001 diff --git a/tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy b/tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..41981a449fc306b80cccd87ddec3c593a8d72c07 100644 GIT binary patch literal 276 zc-r&y4+;@sWME+Saq@Te2v%^42yj*a0-z8Bhz+8df!Kfn3M3d98IS;s!xF*3!U*NN zfJIn2k>!y=77%9xaV`+&pvnFJ520c9F_kbdGl9$pVikmW%rNy1Fnv%75151iPz*}L V#efF==Y`O4{|Exb-a%-X7yxv-5&-}J literal 0 Hc-jL100001 diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index 2e3e3ccdcec..dfb8523c8bf 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,5 +1 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/aarch64/virt/DSDT.smmuv3-legacy", -"tests/data/acpi/aarch64/virt/DSDT.smmuv3-dev", -"tests/data/acpi/aarch64/virt/IORT.smmuv3-legacy", -"tests/data/acpi/aarch64/virt/IORT.smmuv3-dev", -- 2.47.3