From d5f9a8baded10024f39a0f9bc7abbaef5e12c04e Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Tue, 1 Mar 2016 12:29:55 -0800 Subject: [PATCH] 3.14-stable patches added patches: drm-i915-dp-fall-back-to-18-bpp-when-sink-capability-is-unknown.patch --- ...-bpp-when-sink-capability-is-unknown.patch | 66 +++++++++++++++++++ queue-3.14/series | 1 + 2 files changed, 67 insertions(+) create mode 100644 queue-3.14/drm-i915-dp-fall-back-to-18-bpp-when-sink-capability-is-unknown.patch diff --git a/queue-3.14/drm-i915-dp-fall-back-to-18-bpp-when-sink-capability-is-unknown.patch b/queue-3.14/drm-i915-dp-fall-back-to-18-bpp-when-sink-capability-is-unknown.patch new file mode 100644 index 00000000000..b8db308d534 --- /dev/null +++ b/queue-3.14/drm-i915-dp-fall-back-to-18-bpp-when-sink-capability-is-unknown.patch @@ -0,0 +1,66 @@ +From 5efd407674068dede403551bea3b0b134c32513a Mon Sep 17 00:00:00 2001 +From: Jani Nikula +Date: Wed, 13 Jan 2016 16:35:20 +0200 +Subject: drm/i915/dp: fall back to 18 bpp when sink capability is unknown +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Jani Nikula + +commit 5efd407674068dede403551bea3b0b134c32513a upstream. + +Per DP spec, the source device should fall back to 18 bpp, VESA range +RGB when the sink capability is unknown. Fix the color depth +clamping. 18 bpp color depth should ensure full color range in automatic +mode. + +The clamping has been HDMI specific since its introduction in + +commit 996a2239f93b03c5972923f04b097f65565c5bed +Author: Daniel Vetter +Date: Fri Apr 19 11:24:34 2013 +0200 + + drm/i915: Disable high-bpc on pre-1.4 EDID screens + +Reported-and-tested-by: Dihan Wickremasuriya +Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=105331 +Reviewed-by: Ville Syrjälä +Signed-off-by: Jani Nikula +Link: http://patchwork.freedesktop.org/patch/msgid/1452695720-7076-1-git-send-email-jani.nikula@intel.com +(cherry picked from commit 013dd9e038723bbd2aa67be51847384b75be8253) +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_display.c | 20 +++++++++++++++----- + 1 file changed, 15 insertions(+), 5 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -8821,11 +8821,21 @@ connected_sink_compute_bpp(struct intel_ + pipe_config->pipe_bpp = connector->base.display_info.bpc*3; + } + +- /* Clamp bpp to 8 on screens without EDID 1.4 */ +- if (connector->base.display_info.bpc == 0 && bpp > 24) { +- DRM_DEBUG_KMS("clamping display bpp (was %d) to default limit of 24\n", +- bpp); +- pipe_config->pipe_bpp = 24; ++ /* Clamp bpp to default limit on screens without EDID 1.4 */ ++ if (connector->base.display_info.bpc == 0) { ++ int type = connector->base.connector_type; ++ int clamp_bpp = 24; ++ ++ /* Fall back to 18 bpp when DP sink capability is unknown. */ ++ if (type == DRM_MODE_CONNECTOR_DisplayPort || ++ type == DRM_MODE_CONNECTOR_eDP) ++ clamp_bpp = 18; ++ ++ if (bpp > clamp_bpp) { ++ DRM_DEBUG_KMS("clamping display bpp (was %d) to default limit of %d\n", ++ bpp, clamp_bpp); ++ pipe_config->pipe_bpp = clamp_bpp; ++ } + } + } + diff --git a/queue-3.14/series b/queue-3.14/series index 71dcf44ee3a..3164c7886ff 100644 --- a/queue-3.14/series +++ b/queue-3.14/series @@ -106,3 +106,4 @@ sparc64-fix-incorrect-sign-extension-in-sys_sparc64_personality.patch drm-vmwgfx-respect-nomodeset.patch drm-radeon-clean-up-fujitsu-quirks.patch drm-radeon-hold-reference-to-fences-in-radeon_sa_bo_new.patch +drm-i915-dp-fall-back-to-18-bpp-when-sink-capability-is-unknown.patch -- 2.47.3