From d62f45b5e95fa9e557af071915a3fbfa0d766c8f Mon Sep 17 00:00:00 2001 From: Tomer Maimon Date: Thu, 12 Sep 2024 22:10:36 +0300 Subject: [PATCH] dt-bindings: reset: npcm: add clock properties This commit adds a 25MHz reference clock and clock-cell properties to the NPCM reset document. The addition is necessitated by the integration of the NPCM8xx clock auxiliary bus device into the NPCM reset driver. The inclusion of the NPCM8xx clock properties in the reset document is crucial as the reset block also serves as a clock provider for the NPCM8xx clock. This enhancement is intended to facilitate the use of the NPCM8xx clock driver. Signed-off-by: Tomer Maimon Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20240912191038.981105-2-tmaimon77@gmail.com Signed-off-by: Stephen Boyd --- .../bindings/reset/nuvoton,npcm750-reset.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/reset/nuvoton,npcm750-reset.yaml b/Documentation/devicetree/bindings/reset/nuvoton,npcm750-reset.yaml index d82e65e37cc0c..72523f1bbc18a 100644 --- a/Documentation/devicetree/bindings/reset/nuvoton,npcm750-reset.yaml +++ b/Documentation/devicetree/bindings/reset/nuvoton,npcm750-reset.yaml @@ -21,6 +21,13 @@ properties: '#reset-cells': const: 2 + '#clock-cells': + const: 1 + + clocks: + items: + - description: specify external 25MHz reference clock. + nuvoton,sysgcr: $ref: /schemas/types.yaml#/definitions/phandle description: a phandle to access GCR registers. @@ -39,6 +46,17 @@ required: - '#reset-cells' - nuvoton,sysgcr +if: + properties: + compatible: + contains: + enum: + - nuvoton,npcm845-reset +then: + required: + - '#clock-cells' + - clocks + additionalProperties: false examples: -- 2.39.5