From d7c914104e46f91c22a9ed6d0e5c3fb669e4df2b Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Mon, 3 Jul 2017 13:32:56 +0200 Subject: [PATCH] 4.9-stable patches added patches: arm64-assembler-make-adr_l-work-in-modules-under-kaslr.patch drm-radeon-si-load-special-ucode-for-certain-mc-configs.patch hid-i2c-hid-add-sleep-between-power-on-and-reset.patch mac80211-recalculate-min-channel-width-on-vht-opmode-changes.patch net-phy-marvell-fix-marvell-88e1512-used-in-sgmii-mode.patch net-thunderx-acpi-fix-lmac-initialization.patch perf-x86-intel-use-ull-constant-to-prevent-undefined-shift-behaviour.patch pinctrl-intel-set-pin-direction-properly.patch scsi-lpfc-avoid-double-free-of-resource-identifiers.patch spi-davinci-use-dma_mapping_error.patch --- ...ke-adr_l-work-in-modules-under-kaslr.patch | 103 ++++++++++++++++++ ...special-ucode-for-certain-mc-configs.patch | 62 +++++++++++ ...add-sleep-between-power-on-and-reset.patch | 51 +++++++++ ...-channel-width-on-vht-opmode-changes.patch | 100 +++++++++++++++++ ...x-marvell-88e1512-used-in-sgmii-mode.patch | 42 +++++++ ...hunderx-acpi-fix-lmac-initialization.patch | 58 ++++++++++ ...to-prevent-undefined-shift-behaviour.patch | 41 +++++++ ...trl-intel-set-pin-direction-properly.patch | 87 +++++++++++++++ ...-double-free-of-resource-identifiers.patch | 52 +++++++++ queue-4.9/series | 10 ++ .../spi-davinci-use-dma_mapping_error.patch | 41 +++++++ 11 files changed, 647 insertions(+) create mode 100644 queue-4.9/arm64-assembler-make-adr_l-work-in-modules-under-kaslr.patch create mode 100644 queue-4.9/drm-radeon-si-load-special-ucode-for-certain-mc-configs.patch create mode 100644 queue-4.9/hid-i2c-hid-add-sleep-between-power-on-and-reset.patch create mode 100644 queue-4.9/mac80211-recalculate-min-channel-width-on-vht-opmode-changes.patch create mode 100644 queue-4.9/net-phy-marvell-fix-marvell-88e1512-used-in-sgmii-mode.patch create mode 100644 queue-4.9/net-thunderx-acpi-fix-lmac-initialization.patch create mode 100644 queue-4.9/perf-x86-intel-use-ull-constant-to-prevent-undefined-shift-behaviour.patch create mode 100644 queue-4.9/pinctrl-intel-set-pin-direction-properly.patch create mode 100644 queue-4.9/scsi-lpfc-avoid-double-free-of-resource-identifiers.patch create mode 100644 queue-4.9/spi-davinci-use-dma_mapping_error.patch diff --git a/queue-4.9/arm64-assembler-make-adr_l-work-in-modules-under-kaslr.patch b/queue-4.9/arm64-assembler-make-adr_l-work-in-modules-under-kaslr.patch new file mode 100644 index 00000000000..a3345ee98af --- /dev/null +++ b/queue-4.9/arm64-assembler-make-adr_l-work-in-modules-under-kaslr.patch @@ -0,0 +1,103 @@ +From foo@baz Mon Jul 3 13:29:10 CEST 2017 +From: Ard Biesheuvel +Date: Wed, 11 Jan 2017 14:54:53 +0000 +Subject: arm64: assembler: make adr_l work in modules under KASLR + +From: Ard Biesheuvel + + +[ Upstream commit 41c066f2c4d436c535616fe182331766c57838f0 ] + +When CONFIG_RANDOMIZE_MODULE_REGION_FULL=y, the offset between loaded +modules and the core kernel may exceed 4 GB, putting symbols exported +by the core kernel out of the reach of the ordinary adrp/add instruction +pairs used to generate relative symbol references. So make the adr_l +macro emit a movz/movk sequence instead when executing in module context. + +While at it, remove the pointless special case for the stack pointer. + +Acked-by: Mark Rutland +Acked-by: Will Deacon +Signed-off-by: Ard Biesheuvel +Signed-off-by: Catalin Marinas +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/include/asm/assembler.h | 36 +++++++++++++++++++++++++++--------- + 1 file changed, 27 insertions(+), 9 deletions(-) + +--- a/arch/arm64/include/asm/assembler.h ++++ b/arch/arm64/include/asm/assembler.h +@@ -155,22 +155,25 @@ lr .req x30 // link register + + /* + * Pseudo-ops for PC-relative adr/ldr/str , where +- * is within the range +/- 4 GB of the PC. ++ * is within the range +/- 4 GB of the PC when running ++ * in core kernel context. In module context, a movz/movk sequence ++ * is used, since modules may be loaded far away from the kernel ++ * when KASLR is in effect. + */ + /* + * @dst: destination register (64 bit wide) + * @sym: name of the symbol +- * @tmp: optional scratch register to be used if == sp, which +- * is not allowed in an adrp instruction + */ +- .macro adr_l, dst, sym, tmp= +- .ifb \tmp ++ .macro adr_l, dst, sym ++#ifndef MODULE + adrp \dst, \sym + add \dst, \dst, :lo12:\sym +- .else +- adrp \tmp, \sym +- add \dst, \tmp, :lo12:\sym +- .endif ++#else ++ movz \dst, #:abs_g3:\sym ++ movk \dst, #:abs_g2_nc:\sym ++ movk \dst, #:abs_g1_nc:\sym ++ movk \dst, #:abs_g0_nc:\sym ++#endif + .endm + + /* +@@ -181,6 +184,7 @@ lr .req x30 // link register + * the address + */ + .macro ldr_l, dst, sym, tmp= ++#ifndef MODULE + .ifb \tmp + adrp \dst, \sym + ldr \dst, [\dst, :lo12:\sym] +@@ -188,6 +192,15 @@ lr .req x30 // link register + adrp \tmp, \sym + ldr \dst, [\tmp, :lo12:\sym] + .endif ++#else ++ .ifb \tmp ++ adr_l \dst, \sym ++ ldr \dst, [\dst] ++ .else ++ adr_l \tmp, \sym ++ ldr \dst, [\tmp] ++ .endif ++#endif + .endm + + /* +@@ -197,8 +210,13 @@ lr .req x30 // link register + * while needs to be preserved. + */ + .macro str_l, src, sym, tmp ++#ifndef MODULE + adrp \tmp, \sym + str \src, [\tmp, :lo12:\sym] ++#else ++ adr_l \tmp, \sym ++ str \src, [\tmp] ++#endif + .endm + + /* diff --git a/queue-4.9/drm-radeon-si-load-special-ucode-for-certain-mc-configs.patch b/queue-4.9/drm-radeon-si-load-special-ucode-for-certain-mc-configs.patch new file mode 100644 index 00000000000..38afc73f0cf --- /dev/null +++ b/queue-4.9/drm-radeon-si-load-special-ucode-for-certain-mc-configs.patch @@ -0,0 +1,62 @@ +From foo@baz Mon Jul 3 13:29:10 CEST 2017 +From: Alex Deucher +Date: Tue, 20 Dec 2016 16:35:50 -0500 +Subject: drm/radeon/si: load special ucode for certain MC configs + +From: Alex Deucher + + +[ Upstream commit ef736d394e85b1bf1fd65ba5e5257b85f6c82325 ] + +Special MC ucode is required for these memory configurations. + +Acked-by: Edward O'Callaghan +Signed-off-by: Alex Deucher +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/radeon/si.c | 12 +++++++++++- + 1 file changed, 11 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/radeon/si.c ++++ b/drivers/gpu/drm/radeon/si.c +@@ -115,6 +115,8 @@ MODULE_FIRMWARE("radeon/hainan_rlc.bin") + MODULE_FIRMWARE("radeon/hainan_smc.bin"); + MODULE_FIRMWARE("radeon/hainan_k_smc.bin"); + ++MODULE_FIRMWARE("radeon/si58_mc.bin"); ++ + static u32 si_get_cu_active_bitmap(struct radeon_device *rdev, u32 se, u32 sh); + static void si_pcie_gen3_enable(struct radeon_device *rdev); + static void si_program_aspm(struct radeon_device *rdev); +@@ -1650,6 +1652,7 @@ static int si_init_microcode(struct rade + int err; + int new_fw = 0; + bool new_smc = false; ++ bool si58_fw = false; + + DRM_DEBUG("\n"); + +@@ -1742,6 +1745,10 @@ static int si_init_microcode(struct rade + default: BUG(); + } + ++ /* this memory configuration requires special firmware */ ++ if (((RREG32(MC_SEQ_MISC0) & 0xff000000) >> 24) == 0x58) ++ si58_fw = true; ++ + DRM_INFO("Loading %s Microcode\n", new_chip_name); + + snprintf(fw_name, sizeof(fw_name), "radeon/%s_pfp.bin", new_chip_name); +@@ -1845,7 +1852,10 @@ static int si_init_microcode(struct rade + } + } + +- snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", new_chip_name); ++ if (si58_fw) ++ snprintf(fw_name, sizeof(fw_name), "radeon/si58_mc.bin"); ++ else ++ snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", new_chip_name); + err = request_firmware(&rdev->mc_fw, fw_name, rdev->dev); + if (err) { + snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc2.bin", chip_name); diff --git a/queue-4.9/hid-i2c-hid-add-sleep-between-power-on-and-reset.patch b/queue-4.9/hid-i2c-hid-add-sleep-between-power-on-and-reset.patch new file mode 100644 index 00000000000..4f35c1af2bd --- /dev/null +++ b/queue-4.9/hid-i2c-hid-add-sleep-between-power-on-and-reset.patch @@ -0,0 +1,51 @@ +From foo@baz Mon Jul 3 13:29:10 CEST 2017 +From: Brendan McGrath +Date: Sat, 7 Jan 2017 08:01:38 +1100 +Subject: HID: i2c-hid: Add sleep between POWER ON and RESET + +From: Brendan McGrath + + +[ Upstream commit a89af4abdf9b353cdd6f61afc0eaaac403304873 ] + +Support for the Asus Touchpad was recently added. It turns out this +device can fail initialisation (and become unusable) when the RESET +command is sent too soon after the POWER ON command. + +Unfortunately the i2c-hid specification does not specify the need for +a delay between these two commands. But it was discovered the Windows +driver has a 1ms delay. + +As a result, this patch modifies the i2c-hid module to add a sleep +inbetween the POWER ON and RESET commands which lasts between 1ms and 5ms. + +See https://github.com/vlasenko/hid-asus-dkms/issues/24 for further +details. + +Signed-off-by: Brendan McGrath +Reviewed-by: Benjamin Tissoires +Signed-off-by: Jiri Kosina +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/hid/i2c-hid/i2c-hid.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +--- a/drivers/hid/i2c-hid/i2c-hid.c ++++ b/drivers/hid/i2c-hid/i2c-hid.c +@@ -427,6 +427,15 @@ static int i2c_hid_hwreset(struct i2c_cl + if (ret) + goto out_unlock; + ++ /* ++ * The HID over I2C specification states that if a DEVICE needs time ++ * after the PWR_ON request, it should utilise CLOCK stretching. ++ * However, it has been observered that the Windows driver provides a ++ * 1ms sleep between the PWR_ON and RESET requests and that some devices ++ * rely on this. ++ */ ++ usleep_range(1000, 5000); ++ + i2c_hid_dbg(ihid, "resetting...\n"); + + ret = i2c_hid_command(client, &hid_reset_cmd, NULL, 0); diff --git a/queue-4.9/mac80211-recalculate-min-channel-width-on-vht-opmode-changes.patch b/queue-4.9/mac80211-recalculate-min-channel-width-on-vht-opmode-changes.patch new file mode 100644 index 00000000000..d2e94f34dd9 --- /dev/null +++ b/queue-4.9/mac80211-recalculate-min-channel-width-on-vht-opmode-changes.patch @@ -0,0 +1,100 @@ +From foo@baz Mon Jul 3 13:29:10 CEST 2017 +From: Johannes Berg +Date: Thu, 20 Oct 2016 08:52:50 +0200 +Subject: mac80211: recalculate min channel width on VHT opmode changes + +From: Johannes Berg + + +[ Upstream commit d2941df8fbd9708035d66d889ada4d3d160170ce ] + +When an associated station changes its VHT operating mode this +can/will affect the bandwidth it's using, and consequently we +must recalculate the minimum bandwidth we need to use. Failure +to do so can lead to one of two scenarios: + 1) we use a too high bandwidth, this is benign + 2) we use a too narrow bandwidth, causing rate control and + actual PHY configuration to be out of sync, which can in + turn cause problems/crashes + +Signed-off-by: Johannes Berg +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + net/mac80211/iface.c | 21 +++++++++++++++++++++ + net/mac80211/rx.c | 9 +-------- + net/mac80211/vht.c | 4 +++- + 3 files changed, 25 insertions(+), 9 deletions(-) + +--- a/net/mac80211/iface.c ++++ b/net/mac80211/iface.c +@@ -6,6 +6,7 @@ + * Copyright (c) 2006 Jiri Benc + * Copyright 2008, Johannes Berg + * Copyright 2013-2014 Intel Mobile Communications GmbH ++ * Copyright (c) 2016 Intel Deutschland GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as +@@ -1307,6 +1308,26 @@ static void ieee80211_iface_work(struct + } else if (ieee80211_is_action(mgmt->frame_control) && + mgmt->u.action.category == WLAN_CATEGORY_VHT) { + switch (mgmt->u.action.u.vht_group_notif.action_code) { ++ case WLAN_VHT_ACTION_OPMODE_NOTIF: { ++ struct ieee80211_rx_status *status; ++ enum nl80211_band band; ++ u8 opmode; ++ ++ status = IEEE80211_SKB_RXCB(skb); ++ band = status->band; ++ opmode = mgmt->u.action.u.vht_opmode_notif.operating_mode; ++ ++ mutex_lock(&local->sta_mtx); ++ sta = sta_info_get_bss(sdata, mgmt->sa); ++ ++ if (sta) ++ ieee80211_vht_handle_opmode(sdata, sta, ++ opmode, ++ band); ++ ++ mutex_unlock(&local->sta_mtx); ++ break; ++ } + case WLAN_VHT_ACTION_GROUPID_MGMT: + ieee80211_process_mu_groups(sdata, mgmt); + break; +--- a/net/mac80211/rx.c ++++ b/net/mac80211/rx.c +@@ -2923,17 +2923,10 @@ ieee80211_rx_h_action(struct ieee80211_r + + switch (mgmt->u.action.u.vht_opmode_notif.action_code) { + case WLAN_VHT_ACTION_OPMODE_NOTIF: { +- u8 opmode; +- + /* verify opmode is present */ + if (len < IEEE80211_MIN_ACTION_SIZE + 2) + goto invalid; +- +- opmode = mgmt->u.action.u.vht_opmode_notif.operating_mode; +- +- ieee80211_vht_handle_opmode(rx->sdata, rx->sta, +- opmode, status->band); +- goto handled; ++ goto queue; + } + case WLAN_VHT_ACTION_GROUPID_MGMT: { + if (len < IEEE80211_MIN_ACTION_SIZE + 25) +--- a/net/mac80211/vht.c ++++ b/net/mac80211/vht.c +@@ -527,8 +527,10 @@ void ieee80211_vht_handle_opmode(struct + + u32 changed = __ieee80211_vht_handle_opmode(sdata, sta, opmode, band); + +- if (changed > 0) ++ if (changed > 0) { ++ ieee80211_recalc_min_chandef(sdata); + rate_control_rate_update(local, sband, sta, changed); ++ } + } + + void ieee80211_get_vht_mask_from_cap(__le16 vht_cap, diff --git a/queue-4.9/net-phy-marvell-fix-marvell-88e1512-used-in-sgmii-mode.patch b/queue-4.9/net-phy-marvell-fix-marvell-88e1512-used-in-sgmii-mode.patch new file mode 100644 index 00000000000..d44d6bfe047 --- /dev/null +++ b/queue-4.9/net-phy-marvell-fix-marvell-88e1512-used-in-sgmii-mode.patch @@ -0,0 +1,42 @@ +From foo@baz Mon Jul 3 13:29:10 CEST 2017 +From: Russell King +Date: Tue, 10 Jan 2017 23:13:45 +0000 +Subject: net: phy: marvell: fix Marvell 88E1512 used in SGMII mode + +From: Russell King + + +[ Upstream commit a13c06525ab9ff442924e67df9393a5efa914c56 ] + +When an Marvell 88E1512 PHY is connected to a nic in SGMII mode, the +fiber page is used for the SGMII host-side connection. The PHY driver +notices that SUPPORTED_FIBRE is set, so it tries reading the fiber page +for the link status, and ends up reading the MAC-side status instead of +the outgoing (copper) link. This leads to incorrect results reported +via ethtool. + +If the PHY is connected via SGMII to the host, ignore the fiber page. +However, continue to allow the existing power management code to +suspend and resume the fiber page. + +Fixes: 6cfb3bcc0641 ("Marvell phy: check link status in case of fiber link.") +Signed-off-by: Russell King +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/net/phy/marvell.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/net/phy/marvell.c ++++ b/drivers/net/phy/marvell.c +@@ -1200,7 +1200,8 @@ static int marvell_read_status(struct ph + int err; + + /* Check the fiber mode first */ +- if (phydev->supported & SUPPORTED_FIBRE) { ++ if (phydev->supported & SUPPORTED_FIBRE && ++ phydev->interface != PHY_INTERFACE_MODE_SGMII) { + err = phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_FIBER); + if (err < 0) + goto error; diff --git a/queue-4.9/net-thunderx-acpi-fix-lmac-initialization.patch b/queue-4.9/net-thunderx-acpi-fix-lmac-initialization.patch new file mode 100644 index 00000000000..882a3cd566b --- /dev/null +++ b/queue-4.9/net-thunderx-acpi-fix-lmac-initialization.patch @@ -0,0 +1,58 @@ +From foo@baz Mon Jul 3 13:29:10 CEST 2017 +From: Vadim Lomovtsev +Date: Thu, 12 Jan 2017 07:28:06 -0800 +Subject: net: thunderx: acpi: fix LMAC initialization + +From: Vadim Lomovtsev + + +[ Upstream commit 7aa4865506a26c607e00bd9794a85785b55ebca7 ] + +While probing BGX we requesting appropriate QLM for it's configuration +and get LMAC count by that request. Then, while reading configured +MAC values from SSDT table we need to save them in proper mapping: + BGX[i]->lmac[j].mac = +to later provide for initialization stuff. In order to fill +such mapping properly we need to add lmac index to be used while +acpi initialization since at this moment bgx->lmac_count already contains +actual value. + +Signed-off-by: Vadim Lomovtsev +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/net/ethernet/cavium/thunder/thunder_bgx.c | 11 ++++++----- + 1 file changed, 6 insertions(+), 5 deletions(-) + +--- a/drivers/net/ethernet/cavium/thunder/thunder_bgx.c ++++ b/drivers/net/ethernet/cavium/thunder/thunder_bgx.c +@@ -48,8 +48,9 @@ struct lmac { + struct bgx { + u8 bgx_id; + struct lmac lmac[MAX_LMAC_PER_BGX]; +- int lmac_count; ++ u8 lmac_count; + u8 max_lmac; ++ u8 acpi_lmac_idx; + void __iomem *reg_base; + struct pci_dev *pdev; + bool is_dlm; +@@ -1159,13 +1160,13 @@ static acpi_status bgx_acpi_register_phy + if (acpi_bus_get_device(handle, &adev)) + goto out; + +- acpi_get_mac_address(dev, adev, bgx->lmac[bgx->lmac_count].mac); ++ acpi_get_mac_address(dev, adev, bgx->lmac[bgx->acpi_lmac_idx].mac); + +- SET_NETDEV_DEV(&bgx->lmac[bgx->lmac_count].netdev, dev); ++ SET_NETDEV_DEV(&bgx->lmac[bgx->acpi_lmac_idx].netdev, dev); + +- bgx->lmac[bgx->lmac_count].lmacid = bgx->lmac_count; ++ bgx->lmac[bgx->acpi_lmac_idx].lmacid = bgx->acpi_lmac_idx; ++ bgx->acpi_lmac_idx++; /* move to next LMAC */ + out: +- bgx->lmac_count++; + return AE_OK; + } + diff --git a/queue-4.9/perf-x86-intel-use-ull-constant-to-prevent-undefined-shift-behaviour.patch b/queue-4.9/perf-x86-intel-use-ull-constant-to-prevent-undefined-shift-behaviour.patch new file mode 100644 index 00000000000..8a806c9c14e --- /dev/null +++ b/queue-4.9/perf-x86-intel-use-ull-constant-to-prevent-undefined-shift-behaviour.patch @@ -0,0 +1,41 @@ +From foo@baz Mon Jul 3 13:29:10 CEST 2017 +From: Colin King +Date: Wed, 11 Jan 2017 11:43:10 +0000 +Subject: perf/x86/intel: Use ULL constant to prevent undefined shift behaviour + +From: Colin King + + +[ Upstream commit ad5013d5699d30ded0cdbbc68b93b2aa28222c6e ] + +When x86_pmu.num_counters is 32 the shift of the integer constant 1 is +exceeding 32bit and therefor undefined behaviour. + +Fix this by shifting 1ULL instead of 1. + +Reported-by: CoverityScan CID#1192105 ("Bad bit shift operation") +Signed-off-by: Colin Ian King +Cc: Andi Kleen +Cc: Peter Zijlstra +Cc: Kan Liang +Cc: Stephane Eranian +Cc: Alexander Shishkin +Link: http://lkml.kernel.org/r/20170111114310.17928-1-colin.king@canonical.com +Signed-off-by: Thomas Gleixner +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + arch/x86/events/intel/core.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/x86/events/intel/core.c ++++ b/arch/x86/events/intel/core.c +@@ -3978,7 +3978,7 @@ __init int intel_pmu_init(void) + x86_pmu.num_counters, INTEL_PMC_MAX_GENERIC); + x86_pmu.num_counters = INTEL_PMC_MAX_GENERIC; + } +- x86_pmu.intel_ctrl = (1 << x86_pmu.num_counters) - 1; ++ x86_pmu.intel_ctrl = (1ULL << x86_pmu.num_counters) - 1; + + if (x86_pmu.num_counters_fixed > INTEL_PMC_MAX_FIXED) { + WARN(1, KERN_ERR "hw perf events fixed %d > max(%d), clipping!", diff --git a/queue-4.9/pinctrl-intel-set-pin-direction-properly.patch b/queue-4.9/pinctrl-intel-set-pin-direction-properly.patch new file mode 100644 index 00000000000..43cae64d1bc --- /dev/null +++ b/queue-4.9/pinctrl-intel-set-pin-direction-properly.patch @@ -0,0 +1,87 @@ +From foo@baz Mon Jul 3 13:29:10 CEST 2017 +From: Andy Shevchenko +Date: Mon, 2 Jan 2017 14:07:22 +0200 +Subject: pinctrl: intel: Set pin direction properly + +From: Andy Shevchenko + + +[ Upstream commit 17fab473693e8357a9aa6fee4fbed6c13a34bd81 ] + +There are two bits in the PADCFG0 register to configure direction, one per +TX/RX buffers. + +For now we wrongly assume that the GPIO is always requested before it is being +used, which is not true when the GPIO is used through irqchip. In this case the +GPIO is never requested and we never enable RX buffer for it. + +Fix this by setting both bits accordingly. + +Reported-by: Jarkko Nikula +Signed-off-by: Andy Shevchenko +Signed-off-by: Linus Walleij +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/pinctrl/intel/pinctrl-intel.c | 30 +++++++++++++++++++----------- + 1 file changed, 19 insertions(+), 11 deletions(-) + +--- a/drivers/pinctrl/intel/pinctrl-intel.c ++++ b/drivers/pinctrl/intel/pinctrl-intel.c +@@ -353,6 +353,21 @@ static int intel_pinmux_set_mux(struct p + return 0; + } + ++static void __intel_gpio_set_direction(void __iomem *padcfg0, bool input) ++{ ++ u32 value; ++ ++ value = readl(padcfg0); ++ if (input) { ++ value &= ~PADCFG0_GPIORXDIS; ++ value |= PADCFG0_GPIOTXDIS; ++ } else { ++ value &= ~PADCFG0_GPIOTXDIS; ++ value |= PADCFG0_GPIORXDIS; ++ } ++ writel(value, padcfg0); ++} ++ + static int intel_gpio_request_enable(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned pin) +@@ -375,11 +390,11 @@ static int intel_gpio_request_enable(str + /* Disable SCI/SMI/NMI generation */ + value &= ~(PADCFG0_GPIROUTIOXAPIC | PADCFG0_GPIROUTSCI); + value &= ~(PADCFG0_GPIROUTSMI | PADCFG0_GPIROUTNMI); +- /* Disable TX buffer and enable RX (this will be input) */ +- value &= ~PADCFG0_GPIORXDIS; +- value |= PADCFG0_GPIOTXDIS; + writel(value, padcfg0); + ++ /* Disable TX buffer and enable RX (this will be input) */ ++ __intel_gpio_set_direction(padcfg0, true); ++ + raw_spin_unlock_irqrestore(&pctrl->lock, flags); + + return 0; +@@ -392,18 +407,11 @@ static int intel_gpio_set_direction(stru + struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); + void __iomem *padcfg0; + unsigned long flags; +- u32 value; + + raw_spin_lock_irqsave(&pctrl->lock, flags); + + padcfg0 = intel_get_padcfg(pctrl, pin, PADCFG0); +- +- value = readl(padcfg0); +- if (input) +- value |= PADCFG0_GPIOTXDIS; +- else +- value &= ~PADCFG0_GPIOTXDIS; +- writel(value, padcfg0); ++ __intel_gpio_set_direction(padcfg0, input); + + raw_spin_unlock_irqrestore(&pctrl->lock, flags); + diff --git a/queue-4.9/scsi-lpfc-avoid-double-free-of-resource-identifiers.patch b/queue-4.9/scsi-lpfc-avoid-double-free-of-resource-identifiers.patch new file mode 100644 index 00000000000..98a4e599385 --- /dev/null +++ b/queue-4.9/scsi-lpfc-avoid-double-free-of-resource-identifiers.patch @@ -0,0 +1,52 @@ +From foo@baz Mon Jul 3 13:29:10 CEST 2017 +From: Roberto Sassu +Date: Wed, 11 Jan 2017 11:06:42 +0100 +Subject: scsi: lpfc: avoid double free of resource identifiers + +From: Roberto Sassu + + +[ Upstream commit cd60be4916ae689387d04b86b6fc15931e4c95ae ] + +Set variables initialized in lpfc_sli4_alloc_resource_identifiers() to +NULL if an error occurred. Otherwise, lpfc_sli4_driver_resource_unset() +attempts to free the memory again. + +Signed-off-by: Roberto Sassu +Signed-off-by: Johannes Thumshirn +Acked-by: James Smart +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/scsi/lpfc/lpfc_sli.c | 7 +++++++ + 1 file changed, 7 insertions(+) + +--- a/drivers/scsi/lpfc/lpfc_sli.c ++++ b/drivers/scsi/lpfc/lpfc_sli.c +@@ -5951,18 +5951,25 @@ lpfc_sli4_alloc_resource_identifiers(str + + free_vfi_bmask: + kfree(phba->sli4_hba.vfi_bmask); ++ phba->sli4_hba.vfi_bmask = NULL; + free_xri_ids: + kfree(phba->sli4_hba.xri_ids); ++ phba->sli4_hba.xri_ids = NULL; + free_xri_bmask: + kfree(phba->sli4_hba.xri_bmask); ++ phba->sli4_hba.xri_bmask = NULL; + free_vpi_ids: + kfree(phba->vpi_ids); ++ phba->vpi_ids = NULL; + free_vpi_bmask: + kfree(phba->vpi_bmask); ++ phba->vpi_bmask = NULL; + free_rpi_ids: + kfree(phba->sli4_hba.rpi_ids); ++ phba->sli4_hba.rpi_ids = NULL; + free_rpi_bmask: + kfree(phba->sli4_hba.rpi_bmask); ++ phba->sli4_hba.rpi_bmask = NULL; + err_exit: + return rc; + } diff --git a/queue-4.9/series b/queue-4.9/series index 396c8ffc367..0adb0c631ac 100644 --- a/queue-4.9/series +++ b/queue-4.9/series @@ -99,3 +99,13 @@ kernel-panic.c-add-missing-n.patch documentation-devicetree-change-the-mediatek-ethernet-compatible-string.patch drm-etnaviv-trick-drm_mm-into-giving-out-a-low-iova.patch perf-x86-intel-uncore-fix-hardcoded-socket-0-assumption-in-the-haswell-init-code.patch +pinctrl-intel-set-pin-direction-properly.patch +net-phy-marvell-fix-marvell-88e1512-used-in-sgmii-mode.patch +mac80211-recalculate-min-channel-width-on-vht-opmode-changes.patch +perf-x86-intel-use-ull-constant-to-prevent-undefined-shift-behaviour.patch +hid-i2c-hid-add-sleep-between-power-on-and-reset.patch +scsi-lpfc-avoid-double-free-of-resource-identifiers.patch +spi-davinci-use-dma_mapping_error.patch +arm64-assembler-make-adr_l-work-in-modules-under-kaslr.patch +net-thunderx-acpi-fix-lmac-initialization.patch +drm-radeon-si-load-special-ucode-for-certain-mc-configs.patch diff --git a/queue-4.9/spi-davinci-use-dma_mapping_error.patch b/queue-4.9/spi-davinci-use-dma_mapping_error.patch new file mode 100644 index 00000000000..2cd8eb04142 --- /dev/null +++ b/queue-4.9/spi-davinci-use-dma_mapping_error.patch @@ -0,0 +1,41 @@ +From foo@baz Mon Jul 3 13:29:10 CEST 2017 +From: Kevin Hilman +Date: Wed, 11 Jan 2017 18:18:40 -0800 +Subject: spi: davinci: use dma_mapping_error() + +From: Kevin Hilman + + +[ Upstream commit c5a2a394835f473ae23931eda5066d3771d7b2f8 ] + +The correct error checking for dma_map_single() is to use +dma_mapping_error(). + +Signed-off-by: Kevin Hilman +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/spi/spi-davinci.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/spi/spi-davinci.c ++++ b/drivers/spi/spi-davinci.c +@@ -646,7 +646,7 @@ static int davinci_spi_bufs(struct spi_d + buf = t->rx_buf; + t->rx_dma = dma_map_single(&spi->dev, buf, + t->len, DMA_FROM_DEVICE); +- if (!t->rx_dma) { ++ if (dma_mapping_error(&spi->dev, !t->rx_dma)) { + ret = -EFAULT; + goto err_rx_map; + } +@@ -660,7 +660,7 @@ static int davinci_spi_bufs(struct spi_d + buf = (void *)t->tx_buf; + t->tx_dma = dma_map_single(&spi->dev, buf, + t->len, DMA_TO_DEVICE); +- if (!t->tx_dma) { ++ if (dma_mapping_error(&spi->dev, t->tx_dma)) { + ret = -EFAULT; + goto err_tx_map; + } -- 2.47.3