From d80e20a1c32bd1bd73cb6e435a01687211e3b3da Mon Sep 17 00:00:00 2001 From: Stefan Weil Date: Fri, 9 Apr 2010 17:28:40 +0200 Subject: [PATCH] tcp/mips: Change TCG_AREG0 (fp -> s0) Register fp (frame pointer) is a bad choice for compilations without optimisation, because the compiler makes heavy use of this register (so the resulting code crashes). Register s0 had been used for TCG_AREG1 in earlier releases, but was no longer used and is now free for TCG_AREG0. The resulting code works for compilations without optimisation (tested with qemu mips in qemu mips on x86 host). Signed-off-by: Stefan Weil Signed-off-by: Aurelien Jarno --- dyngen-exec.h | 6 +++--- tcg/mips/tcg-target.c | 5 +++-- tcg/mips/tcg-target.h | 6 +++--- 3 files changed, 9 insertions(+), 8 deletions(-) diff --git a/dyngen-exec.h b/dyngen-exec.h index 0353f36cdd4..3f1c43196d6 100644 --- a/dyngen-exec.h +++ b/dyngen-exec.h @@ -69,9 +69,9 @@ extern int printf(const char *, ...); #define AREG1 "r14" #define AREG2 "r15" #elif defined(__mips__) -#define AREG0 "fp" -#define AREG1 "s0" -#define AREG2 "s1" +#define AREG0 "s0" +#define AREG1 "s1" +#define AREG2 "fp" #elif defined(__sparc__) #ifdef CONFIG_SOLARIS #define AREG0 "g2" diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c index 3ed9217e33c..79ba9a66281 100644 --- a/tcg/mips/tcg-target.c +++ b/tcg/mips/tcg-target.c @@ -1273,7 +1273,9 @@ static const TCGTargetOpDef mips_op_defs[] = { }; static int tcg_target_callee_save_regs[] = { +#if 0 /* used for the global env (TCG_AREG0), so no need to save */ TCG_REG_S0, +#endif TCG_REG_S1, TCG_REG_S2, TCG_REG_S3, @@ -1282,8 +1284,7 @@ static int tcg_target_callee_save_regs[] = { TCG_REG_S6, TCG_REG_S7, TCG_REG_GP, - /* TCG_REG_FP, */ /* currently used for the global env, so np - need to save */ + TCG_REG_FP, TCG_REG_RA, /* should be last for ABI compliance */ }; diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h index 46760a50e16..baae6d85c38 100644 --- a/tcg/mips/tcg-target.h +++ b/tcg/mips/tcg-target.h @@ -92,9 +92,9 @@ enum { #undef TCG_TARGET_HAS_ext16u_i32 /* andi rt, rs, 0xffff */ /* Note: must be synced with dyngen-exec.h */ -#define TCG_AREG0 TCG_REG_FP -#define TCG_AREG1 TCG_REG_S0 -#define TCG_AREG2 TCG_REG_S1 +#define TCG_AREG0 TCG_REG_S0 +#define TCG_AREG1 TCG_REG_S1 +#define TCG_AREG2 TCG_REG_FP #include -- 2.39.5