From d936261844f68a07a3c51db08278eda273457d94 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 2 Oct 2025 05:09:23 +0200 Subject: [PATCH] target/riscv/monitor: Replace legacy cpu_physical_memory_read() call MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Commit b7ecba0f6f6 ("docs/devel/loads-stores.rst: Document our various load and store APIs") mentioned cpu_physical_memory_*() methods are legacy, the replacement being address_space_*(). Propagate the address space to walk_pte(), then replace the cpu_physical_memory_read() by address_space_read(). Since the monitor command are run with a vCPU context, use its default address space. As with the previous implementation, ignore whether the memory read succeeded or failed. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Message-Id: <20251002145742.75624-5-philmd@linaro.org> --- target/riscv/monitor.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/target/riscv/monitor.c b/target/riscv/monitor.c index 100005ea4e..8a77476db9 100644 --- a/target/riscv/monitor.c +++ b/target/riscv/monitor.c @@ -23,6 +23,7 @@ #include "cpu_bits.h" #include "monitor/monitor.h" #include "monitor/hmp-target.h" +#include "system/memory.h" #ifdef TARGET_RISCV64 #define PTE_HEADER_FIELDS "vaddr paddr "\ @@ -77,11 +78,13 @@ static void print_pte(Monitor *mon, int va_bits, target_ulong vaddr, attr & PTE_D ? 'd' : '-'); } -static void walk_pte(Monitor *mon, hwaddr base, target_ulong start, +static void walk_pte(Monitor *mon, AddressSpace *as, + hwaddr base, target_ulong start, int level, int ptidxbits, int ptesize, int va_bits, target_ulong *vbase, hwaddr *pbase, hwaddr *last_paddr, target_ulong *last_size, int *last_attr) { + const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED; hwaddr pte_addr; hwaddr paddr; target_ulong last_start = -1; @@ -100,7 +103,7 @@ static void walk_pte(Monitor *mon, hwaddr base, target_ulong start, for (idx = 0; idx < (1UL << ptidxbits); idx++) { pte_addr = base + idx * ptesize; - cpu_physical_memory_read(pte_addr, &pte, ptesize); + address_space_read(as, pte_addr, attrs, &pte, ptesize); paddr = (hwaddr)(pte >> PTE_PPN_SHIFT) << PGSHIFT; attr = pte & 0xff; @@ -132,7 +135,7 @@ static void walk_pte(Monitor *mon, hwaddr base, target_ulong start, *last_size = pgsize; } else { /* pointer to the next level of the page table */ - walk_pte(mon, paddr, start, level - 1, ptidxbits, ptesize, + walk_pte(mon, as, paddr, start, level - 1, ptidxbits, ptesize, va_bits, vbase, pbase, last_paddr, last_size, last_attr); } @@ -145,6 +148,7 @@ static void walk_pte(Monitor *mon, hwaddr base, target_ulong start, static void mem_info_svxx(Monitor *mon, CPUArchState *env) { + AddressSpace *as = env_cpu(env)->as; int levels, ptidxbits, ptesize, vm, va_bits; hwaddr base; target_ulong vbase; @@ -199,7 +203,7 @@ static void mem_info_svxx(Monitor *mon, CPUArchState *env) last_attr = 0; /* walk page tables, starting from address 0 */ - walk_pte(mon, base, 0, levels - 1, ptidxbits, ptesize, va_bits, + walk_pte(mon, as, base, 0, levels - 1, ptidxbits, ptesize, va_bits, &vbase, &pbase, &last_paddr, &last_size, &last_attr); /* don't forget the last one */ -- 2.47.3