From d96bebebca37f176caa038a05f7b09008ba62fb7 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Fri, 25 Jun 2021 12:25:19 +0200 Subject: [PATCH] 5.10-stable patches added patches: arm64-force-no_block_mappings-if-crashkernel-reservation-is-required.patch arm64-ignore-any-dma-offsets-in-the-max_zone_phys-calculation.patch mips-generic-update-node-names-to-avoid-unit-addresses.patch --- ...-crashkernel-reservation-is-required.patch | 97 ++++++++ ...ets-in-the-max_zone_phys-calculation.patch | 59 +++++ ...e-node-names-to-avoid-unit-addresses.patch | 217 ++++++++++++++++++ queue-5.10/series | 3 + 4 files changed, 376 insertions(+) create mode 100644 queue-5.10/arm64-force-no_block_mappings-if-crashkernel-reservation-is-required.patch create mode 100644 queue-5.10/arm64-ignore-any-dma-offsets-in-the-max_zone_phys-calculation.patch create mode 100644 queue-5.10/mips-generic-update-node-names-to-avoid-unit-addresses.patch diff --git a/queue-5.10/arm64-force-no_block_mappings-if-crashkernel-reservation-is-required.patch b/queue-5.10/arm64-force-no_block_mappings-if-crashkernel-reservation-is-required.patch new file mode 100644 index 00000000000..2cebd57cff0 --- /dev/null +++ b/queue-5.10/arm64-force-no_block_mappings-if-crashkernel-reservation-is-required.patch @@ -0,0 +1,97 @@ +From 2687275a5843d1089687f08fc64eb3f3b026a169 Mon Sep 17 00:00:00 2001 +From: Catalin Marinas +Date: Thu, 19 Nov 2020 17:55:56 +0000 +Subject: arm64: Force NO_BLOCK_MAPPINGS if crashkernel reservation is required + +From: Catalin Marinas + +commit 2687275a5843d1089687f08fc64eb3f3b026a169 upstream. + +mem_init() currently relies on knowing the boundaries of the crashkernel +reservation to map such region with page granularity for later +unmapping via set_memory_valid(..., 0). If the crashkernel reservation +is deferred, such boundaries are not known when the linear mapping is +created. Simply parse the command line for "crashkernel" and, if found, +create the linear map with NO_BLOCK_MAPPINGS. + +Signed-off-by: Catalin Marinas +Tested-by: Nicolas Saenz Julienne +Reviewed-by: Nicolas Saenz Julienne +Acked-by: James Morse +Cc: James Morse +Cc: Nicolas Saenz Julienne +Link: https://lore.kernel.org/r/20201119175556.18681-1-catalin.marinas@arm.com +Signed-off-by: Catalin Marinas +Cc: Kefeng Wang +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/mm/mmu.c | 37 ++++++++++++++++--------------------- + 1 file changed, 16 insertions(+), 21 deletions(-) + +--- a/arch/arm64/mm/mmu.c ++++ b/arch/arm64/mm/mmu.c +@@ -469,6 +469,21 @@ void __init mark_linear_text_alias_ro(vo + PAGE_KERNEL_RO); + } + ++static bool crash_mem_map __initdata; ++ ++static int __init enable_crash_mem_map(char *arg) ++{ ++ /* ++ * Proper parameter parsing is done by reserve_crashkernel(). We only ++ * need to know if the linear map has to avoid block mappings so that ++ * the crashkernel reservations can be unmapped later. ++ */ ++ crash_mem_map = true; ++ ++ return 0; ++} ++early_param("crashkernel", enable_crash_mem_map); ++ + static void __init map_mem(pgd_t *pgdp) + { + phys_addr_t kernel_start = __pa_symbol(_text); +@@ -477,7 +492,7 @@ static void __init map_mem(pgd_t *pgdp) + int flags = 0; + u64 i; + +- if (rodata_full || debug_pagealloc_enabled()) ++ if (rodata_full || crash_mem_map || debug_pagealloc_enabled()) + flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS; + + /* +@@ -487,11 +502,6 @@ static void __init map_mem(pgd_t *pgdp) + * the following for-loop + */ + memblock_mark_nomap(kernel_start, kernel_end - kernel_start); +-#ifdef CONFIG_KEXEC_CORE +- if (crashk_res.end) +- memblock_mark_nomap(crashk_res.start, +- resource_size(&crashk_res)); +-#endif + + /* map all the memory banks */ + for_each_mem_range(i, &start, &end) { +@@ -519,21 +529,6 @@ static void __init map_mem(pgd_t *pgdp) + __map_memblock(pgdp, kernel_start, kernel_end, + PAGE_KERNEL, NO_CONT_MAPPINGS); + memblock_clear_nomap(kernel_start, kernel_end - kernel_start); +- +-#ifdef CONFIG_KEXEC_CORE +- /* +- * Use page-level mappings here so that we can shrink the region +- * in page granularity and put back unused memory to buddy system +- * through /sys/kernel/kexec_crash_size interface. +- */ +- if (crashk_res.end) { +- __map_memblock(pgdp, crashk_res.start, crashk_res.end + 1, +- PAGE_KERNEL, +- NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS); +- memblock_clear_nomap(crashk_res.start, +- resource_size(&crashk_res)); +- } +-#endif + } + + void mark_rodata_ro(void) diff --git a/queue-5.10/arm64-ignore-any-dma-offsets-in-the-max_zone_phys-calculation.patch b/queue-5.10/arm64-ignore-any-dma-offsets-in-the-max_zone_phys-calculation.patch new file mode 100644 index 00000000000..5c43b0eb0be --- /dev/null +++ b/queue-5.10/arm64-ignore-any-dma-offsets-in-the-max_zone_phys-calculation.patch @@ -0,0 +1,59 @@ +From 791ab8b2e3db0c6e4295467d10398800ec29144c Mon Sep 17 00:00:00 2001 +From: Catalin Marinas +Date: Wed, 18 Nov 2020 18:58:09 +0000 +Subject: arm64: Ignore any DMA offsets in the max_zone_phys() calculation + +From: Catalin Marinas + +commit 791ab8b2e3db0c6e4295467d10398800ec29144c upstream. + +Currently, the kernel assumes that if RAM starts above 32-bit (or +zone_bits), there is still a ZONE_DMA/DMA32 at the bottom of the RAM and +such constrained devices have a hardwired DMA offset. In practice, we +haven't noticed any such hardware so let's assume that we can expand +ZONE_DMA32 to the available memory if no RAM below 4GB. Similarly, +ZONE_DMA is expanded to the 4GB limit if no RAM addressable by +zone_bits. + +Signed-off-by: Catalin Marinas +Tested-by: Nicolas Saenz Julienne +Reviewed-by: Nicolas Saenz Julienne +Cc: Nicolas Saenz Julienne +Cc: Robin Murphy +Link: https://lore.kernel.org/r/20201118185809.1078362-1-catalin.marinas@arm.com +Signed-off-by: Catalin Marinas +Cc: Kefeng Wang +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/mm/init.c | 17 ++++++++++++----- + 1 file changed, 12 insertions(+), 5 deletions(-) + +--- a/arch/arm64/mm/init.c ++++ b/arch/arm64/mm/init.c +@@ -174,14 +174,21 @@ static void __init reserve_elfcorehdr(vo + #endif /* CONFIG_CRASH_DUMP */ + + /* +- * Return the maximum physical address for a zone with a given address size +- * limit. It currently assumes that for memory starting above 4G, 32-bit +- * devices will use a DMA offset. ++ * Return the maximum physical address for a zone accessible by the given bits ++ * limit. If DRAM starts above 32-bit, expand the zone to the maximum ++ * available memory, otherwise cap it at 32-bit. + */ + static phys_addr_t __init max_zone_phys(unsigned int zone_bits) + { +- phys_addr_t offset = memblock_start_of_DRAM() & GENMASK_ULL(63, zone_bits); +- return min(offset + (1ULL << zone_bits), memblock_end_of_DRAM()); ++ phys_addr_t zone_mask = DMA_BIT_MASK(zone_bits); ++ phys_addr_t phys_start = memblock_start_of_DRAM(); ++ ++ if (phys_start > U32_MAX) ++ zone_mask = PHYS_ADDR_MAX; ++ else if (phys_start > zone_mask) ++ zone_mask = U32_MAX; ++ ++ return min(zone_mask, memblock_end_of_DRAM() - 1) + 1; + } + + static void __init zone_sizes_init(unsigned long min, unsigned long max) diff --git a/queue-5.10/mips-generic-update-node-names-to-avoid-unit-addresses.patch b/queue-5.10/mips-generic-update-node-names-to-avoid-unit-addresses.patch new file mode 100644 index 00000000000..5631fc3a0fc --- /dev/null +++ b/queue-5.10/mips-generic-update-node-names-to-avoid-unit-addresses.patch @@ -0,0 +1,217 @@ +From foo@baz Fri Jun 25 12:18:00 PM CEST 2021 +From: Nathan Chancellor +Date: Fri, 9 Apr 2021 12:21:28 -0700 +Subject: MIPS: generic: Update node names to avoid unit addresses + +From: Nathan Chancellor + +commit e607ff630c6053ecc67502677c0e50053d7892d4 upstream. + +With the latest mkimage from U-Boot 2021.04, the generic defconfigs no +longer build, failing with: + +/usr/bin/mkimage: verify_header failed for FIT Image support with exit code 1 + +This is expected after the linked U-Boot commits because '@' is +forbidden in the node names due to the way that libfdt treats nodes with +the same prefix but different unit addresses. + +Switch the '@' in the node name to '-'. Drop the unit addresses from the +hash and kernel child nodes because there is only one node so they do +not need to have a number to differentiate them. + +Cc: stable@vger.kernel.org +Link: https://source.denx.de/u-boot/u-boot/-/commit/79af75f7776fc20b0d7eb6afe1e27c00fdb4b9b4 +Link: https://source.denx.de/u-boot/u-boot/-/commit/3f04db891a353f4b127ed57279279f851c6b4917 +Suggested-by: Simon Glass +Signed-off-by: Nathan Chancellor +Reviewed-by: Tom Rini +Signed-off-by: Thomas Bogendoerfer +[nathan: Backport to 5.10, only apply to .its.S files that exist] +Signed-off-by: Nathan Chancellor +Signed-off-by: Greg Kroah-Hartman +--- + arch/mips/generic/board-boston.its.S | 10 +++++----- + arch/mips/generic/board-ni169445.its.S | 10 +++++----- + arch/mips/generic/board-ocelot.its.S | 20 ++++++++++---------- + arch/mips/generic/board-xilfpga.its.S | 10 +++++----- + arch/mips/generic/vmlinux.its.S | 10 +++++----- + 5 files changed, 30 insertions(+), 30 deletions(-) + +--- a/arch/mips/generic/board-boston.its.S ++++ b/arch/mips/generic/board-boston.its.S +@@ -1,22 +1,22 @@ + / { + images { +- fdt@boston { ++ fdt-boston { + description = "img,boston Device Tree"; + data = /incbin/("boot/dts/img/boston.dtb"); + type = "flat_dt"; + arch = "mips"; + compression = "none"; +- hash@0 { ++ hash { + algo = "sha1"; + }; + }; + }; + + configurations { +- conf@boston { ++ conf-boston { + description = "Boston Linux kernel"; +- kernel = "kernel@0"; +- fdt = "fdt@boston"; ++ kernel = "kernel"; ++ fdt = "fdt-boston"; + }; + }; + }; +--- a/arch/mips/generic/board-ni169445.its.S ++++ b/arch/mips/generic/board-ni169445.its.S +@@ -1,22 +1,22 @@ + / { + images { +- fdt@ni169445 { ++ fdt-ni169445 { + description = "NI 169445 device tree"; + data = /incbin/("boot/dts/ni/169445.dtb"); + type = "flat_dt"; + arch = "mips"; + compression = "none"; +- hash@0 { ++ hash { + algo = "sha1"; + }; + }; + }; + + configurations { +- conf@ni169445 { ++ conf-ni169445 { + description = "NI 169445 Linux Kernel"; +- kernel = "kernel@0"; +- fdt = "fdt@ni169445"; ++ kernel = "kernel"; ++ fdt = "fdt-ni169445"; + }; + }; + }; +--- a/arch/mips/generic/board-ocelot.its.S ++++ b/arch/mips/generic/board-ocelot.its.S +@@ -1,40 +1,40 @@ + /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ + / { + images { +- fdt@ocelot_pcb123 { ++ fdt-ocelot_pcb123 { + description = "MSCC Ocelot PCB123 Device Tree"; + data = /incbin/("boot/dts/mscc/ocelot_pcb123.dtb"); + type = "flat_dt"; + arch = "mips"; + compression = "none"; +- hash@0 { ++ hash { + algo = "sha1"; + }; + }; + +- fdt@ocelot_pcb120 { ++ fdt-ocelot_pcb120 { + description = "MSCC Ocelot PCB120 Device Tree"; + data = /incbin/("boot/dts/mscc/ocelot_pcb120.dtb"); + type = "flat_dt"; + arch = "mips"; + compression = "none"; +- hash@0 { ++ hash { + algo = "sha1"; + }; + }; + }; + + configurations { +- conf@ocelot_pcb123 { ++ conf-ocelot_pcb123 { + description = "Ocelot Linux kernel"; +- kernel = "kernel@0"; +- fdt = "fdt@ocelot_pcb123"; ++ kernel = "kernel"; ++ fdt = "fdt-ocelot_pcb123"; + }; + +- conf@ocelot_pcb120 { ++ conf-ocelot_pcb120 { + description = "Ocelot Linux kernel"; +- kernel = "kernel@0"; +- fdt = "fdt@ocelot_pcb120"; ++ kernel = "kernel"; ++ fdt = "fdt-ocelot_pcb120"; + }; + }; + }; +--- a/arch/mips/generic/board-xilfpga.its.S ++++ b/arch/mips/generic/board-xilfpga.its.S +@@ -1,22 +1,22 @@ + / { + images { +- fdt@xilfpga { ++ fdt-xilfpga { + description = "MIPSfpga (xilfpga) Device Tree"; + data = /incbin/("boot/dts/xilfpga/nexys4ddr.dtb"); + type = "flat_dt"; + arch = "mips"; + compression = "none"; +- hash@0 { ++ hash { + algo = "sha1"; + }; + }; + }; + + configurations { +- conf@xilfpga { ++ conf-xilfpga { + description = "MIPSfpga Linux kernel"; +- kernel = "kernel@0"; +- fdt = "fdt@xilfpga"; ++ kernel = "kernel"; ++ fdt = "fdt-xilfpga"; + }; + }; + }; +--- a/arch/mips/generic/vmlinux.its.S ++++ b/arch/mips/generic/vmlinux.its.S +@@ -6,7 +6,7 @@ + #address-cells = ; + + images { +- kernel@0 { ++ kernel { + description = KERNEL_NAME; + data = /incbin/(VMLINUX_BINARY); + type = "kernel"; +@@ -15,18 +15,18 @@ + compression = VMLINUX_COMPRESSION; + load = /bits/ ADDR_BITS ; + entry = /bits/ ADDR_BITS ; +- hash@0 { ++ hash { + algo = "sha1"; + }; + }; + }; + + configurations { +- default = "conf@default"; ++ default = "conf-default"; + +- conf@default { ++ conf-default { + description = "Generic Linux kernel"; +- kernel = "kernel@0"; ++ kernel = "kernel"; + }; + }; + }; diff --git a/queue-5.10/series b/queue-5.10/series index 5225a392fec..39d402c8fef 100644 --- a/queue-5.10/series +++ b/queue-5.10/series @@ -7,3 +7,6 @@ drm-radeon-wait-for-moving-fence-after-pinning.patch drm-amdgpu-wait-for-moving-fence-after-pinning.patch arm-9081-1-fix-gcc-10-thumb2-kernel-regression.patch mmc-meson-gx-use-memcpy_to-fromio-for-dram-access-quirk.patch +mips-generic-update-node-names-to-avoid-unit-addresses.patch +arm64-ignore-any-dma-offsets-in-the-max_zone_phys-calculation.patch +arm64-force-no_block_mappings-if-crashkernel-reservation-is-required.patch -- 2.47.2